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Book Description

Embedded Computing for High Performance: Design Exploration and Customization Using High-level Compilation and Synthesis Tools provides a set of real-life example implementations that migrate traditional desktop systems to embedded systems. Working with popular hardware, including Xilinx and ARM, the book offers a comprehensive description of techniques for mapping computations expressed in programming languages such as C or MATLAB to high-performance embedded architectures consisting of multiple CPUs, GPUs, and reconfigurable hardware (FPGAs).

The authors demonstrate a domain-specific language (LARA) that facilitates retargeting to multiple computing systems using the same source code. In this way, users can decouple original application code from transformed code and enhance productivity and program portability.

After reading this book, engineers will understand the processes, methodologies, and best practices needed for the development of applications for high-performance embedded computing systems.

  • Focuses on maximizing performance while managing energy consumption in embedded systems
  • Explains how to retarget code for heterogeneous systems with GPUs and FPGAs
  • Demonstrates a domain-specific language that facilitates migrating and retargeting existing applications to modern systems
  • Includes downloadable slides, tools, and tutorials

Table of Contents

  1. Cover image
  2. Title page
  3. Table of Contents
  4. Copyright
  5. Dedication
  6. About the Authors
  7. Preface
  8. Acknowledgments
  9. Abbreviations
  10. Chapter 1: Introduction
    1. Abstract
    2. 1.1 Overview
    3. 1.2 Embedded Systems in Society and Industry
    4. 1.3 Embedded Computing Trends
    5. 1.4 Embedded Systems: Prototyping and Production
    6. 1.5 About LARA: An Aspect-Oriented Approach
    7. 1.6 Objectives and Target Audience
    8. 1.7 Complementary Bibliography
    9. 1.8 Dependences in Terms of Knowledge
    10. 1.9 Examples and Benchmarks
    11. 1.10 Book Organization
    12. 1.11 Intended Use
    13. 1.12 Summary
  11. Chapter 2: High-performance embedded computing
    1. Abstract
    2. 2.1 Introduction
    3. 2.2 Target Architectures
    4. 2.3 Core-Based Architectural Enhancements
    5. 2.4 Common Hardware Accelerators
    6. 2.5 Performance
    7. 2.6 Power and Energy Consumption
    8. 2.7 Comparing Results
    9. 2.8 Summary
    10. 2.9 Further Reading
  12. Chapter 3: Controlling the design and development cycle
    1. Abstract
    2. 3.1 Introduction
    3. 3.2 Specifications in MATLAB and C: Prototyping and Development
    4. 3.3 Translation, Compilation, and Synthesis Design flows
    5. 3.4 Hardware/Software Partitioning
    6. 3.5 LARA: a language for Specifying Strategies
    7. 3.6 Summary
    8. 3.7 Further Reading
  13. Chapter 4: Source code analysis and instrumentation
    1. Abstract
    2. 4.1 Introduction
    3. 4.2 Analysis and Metrics
    4. 4.3 Static Source Code Analysis
    5. 4.4 Dynamic Analysis: The Need for Instrumentation
    6. 4.5 Custom Profiling Examples
    7. 4.6 Summary
    8. 4.7 Further Reading
  14. Chapter 5: Source code transformations and optimizations
    1. Abstract
    2. 5.1 Introduction
    3. 5.2 Basic Transformations
    4. 5.3 Data Type Conversions
    5. 5.4 Code Reordering
    6. 5.5 Data Reuse
    7. 5.6 Loop-Based Transformations
    8. 5.7 Function-Based Transformations
    9. 5.8 Data structure-Based Transformations
    10. 5.9 From Recursion to Iterations
    11. 5.10 From Nonstreaming to Streaming
    12. 5.11 Data and Computation Partitioning
    13. 5.12 LARA Strategies
    14. 5.13 Summary
    15. 5.14 Further Reading
  15. Chapter 6: Code retargeting for CPU-based platforms
    1. Abstract
    2. 6.1 Introduction
    3. 6.2 Retargeting Mechanisms
    4. 6.3 Parallelism and Compiler Options
    5. 6.4 Loop Vectorization
    6. 6.5 Shared Memory (Multicore)
    7. 6.6 Distributed Memory (Multiprocessor)
    8. 6.7 Cache-based Program Optimizations
    9. 6.8 LARA Strategies
    10. 6.9 Summary
    11. 6.10 Further Reading
  16. Chapter 7: Targeting heterogeneous computing platforms
    1. Abstract
    2. 7.1 Introduction
    3. 7.2 Roofline Model Revisited
    4. 7.3 Workload Distribution
    5. 7.4 Graphics Processing Units
    6. 7.5 High-level Synthesis
    7. 7.6 LARA Strategies
    8. 7.7 Summary
    9. 7.8 Further Reading
  17. Chapter 8: Additional topics
    1. Abstract
    2. 8.1 Introduction
    3. 8.2 Design Space Exploration
    4. 8.3 Hardware/Software Codesign
    5. 8.4 Runtime Adaptability
    6. 8.5 Automatic Tuning (Autotuning)
    7. 8.6 Using LARA for Exploration of Code Transformation Strategies
    8. 8.7 Summary
    9. 8.8 Further Reading
  18. Glossary
  19. Index
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