Book Description
Why care about hardware/firmware interaction? These interfaces are critical, a solid hardware design married with adaptive firmware can access all the capabilities of an application and overcome limitations caused by poor communication. For the first time, a book has come along that will help hardware engineers and firmware engineers work together to mitigate or eliminate problems that occur when hardware and firmware are not optimally compatible. Solving these issues will save time and money, getting products to market sooner to create more revenue.
The principles and best practices presented in this book will prove to be a valuable resource for both hardware and firmware engineers. Topics include register layout, interrupts, timing and performance, aborts, and errors. Real world cases studies will help to solidify the principles and best practices with an aim towards cleaner designs, shorter schedules, and better implementation!- Reduce product development delays with the best practices in this book
- Concepts apply to ASICs, ASSPs, SoCs, and FPGAs
- Real-world examples and case studies highlight the good and bad of design processes
Table of Contents
- Cover image
- Table of Contents
- Copyright
- Preface
- CHAPTER 1. Introduction
- 1.1. What Is the Hardware/Firmware Interface?
- 1.2. What Is a Best Practice?
- 1.3. “First Time Right” Also Means…
- 1.4. Target Audience
- 1.5. Project Life Cycle
- 1.6. Case Study
- 1.7. Summary
- CHAPTER 2. Principles
- 2.1. Seven Principles of Hardware/Firmware Interface Design
- 2.2. Summary
- CHAPTER 3. Collaboration
- 3.1. First Steps
- 3.2. Formal Collaboration
- 3.3. Informal Collaboration
- 3.4. Summary
- CHAPTER 4. Planning
- 4.1. Industry Standards
- 4.2. Common Version
- 4.3. Compatibility
- 4.4. Defects
- 4.5. Analysis
- 4.6. Postmortem
- 4.7. Summary
- CHAPTER 5. Documentation
- 5.1. Types
- 5.2. Document Management
- 5.3. Reviews
- 5.4. Content
- 5.5. Registers
- 5.6. Bits
- 5.7. Interrupts
- 5.8. Time
- 5.9. Errors
- 5.10. Information
- 5.11. Summary
- CHAPTER 6. Superblock
- 6.1. Benefits of a Superblock
- 6.2. Consolidation
- 6.3. I/O Signals
- 6.4. Parameterization
- 6.5. Summary
- CHAPTER 7. Design
- 7.1. Event Notification
- 7.2. Performance
- 7.3. Power-On
- 7.4. Communication and Control
- 7.5. Summary
- CHAPTER 8. Registers
- 8.1. Addressing
- 8.2. Bit Assignment
- 8.3. Data Types
- 8.4. Hardware Identification
- 8.5. Communication and Control
- 8.6. Summary
- CHAPTER 9. Interrupts
- 9.1. Design
- 9.2. Pending Register
- 9.3. Enable Register
- 9.4. Optional Registers
- 9.5. Interrupt Module Review
- 9.6. Triggering on Both Edges
- 9.7. Using the Interrupt Module
- 9.8. Summary
- CHAPTER 10. Aborts, etc.
- 10.1. Definitions
- 10.2. Halts
- 10.3. Resets
- 10.4. Aborts
- 10.5. Summary
- CHAPTER 11. Hooks
- 11.1. Designing for Hooks
- 11.2. Peek…
- 11.3. …And Poke
- 11.4. Monitor
- 11.5. More Hooks
- 11.6. Summary
- CHAPTER 12. Conclusion
- 12.1. Key Points
- 12.2. Benefits
- 12.3. Seven Principles of Hardware/Firmware Interface Design
- 12.4. It Finally Works! Let's Ship It!
- Appendix A. Best Practices
- Appendix B. Bicycle Controller Specification
- Glossary
- Index