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Book Description

The author has taught the design and use of microprocessor systems to undergraduate and technician level students for over 25 years.
  • A core text for academic modules on microprocessors, embedded systems and computer architecture
  • A practical design-orientated approach

Table of Contents

  1. Cover image
  2. Title page
  3. Table of Contents
  4. Copyright
  5. Preface
  6. Notation used in the text
  7. Part 1: The Building Blocks
    1. Chapter 1: Binary numbers
      1. 1.1 Numbers within a computing machine
      2. 1.2 Adding binary integers
      3. 1.3 Representing signed integers
      4. 1.4 Addition and subtraction of signed integers
      5. 1.5 Two’s complement theory*
      6. 1.6 Use of hexadecimal representation
      7. 1.7 Problems
    2. Chapter 2: Logic expressions
      1. 2.1 Logic – the bank vault
      2. 2.2 Evaluating the logic expression for the bank vault
      3. 2.3 Another solution
      4. 2.4 Simplifying logical expressions*
      5. 2.5 Rules for simplifying logical expressions using a map*
      6. 2.6 Karnaugh-Veitch program, KVMap*
      7. 2.7 Quine–McCluskey method*
      8. 2.8 Problems
    3. Chapter 3: Electronic logic circuits
      1. 3.1 Electronic controller
      2. 3.2 Development of the bank vault controller design
      3. 3.3 Gates – electronic circuits that perform logical operations
      4. 3.4 Decoder circuit
      5. 3.5 Multiplexer circuit
      6. 3.6 Flip-flops
      7. 3.7 Storage registers
      8. 3.8 State machines*
      9. 3.9 Programmable logic devices*
      10. 3.10 Problems
    4. Chapter 4: Computer arithmetic
      1. 4.1 Circuit to add numbers
      2. 4.2 Adder/Subtractor
      3. 4.3 Arithmetic and logic unit
      4. 4.4 Shifting data
      5. 4.4 Fast adders*
      6. 4.5 Floating-point numbers*
      7. 4.6 Problems
  8. Part 2: Computing Machines
    1. Chapter 5: Computer design
      1. 5.1 A manual computing system
      2. 5.2 Storing data and program instructions
      3. 5.3 Connecting the machine components
      4. 5.4 Architecture of Simple Machine
      5. 5.5 More general view of the design of Simple Machine*
      6. 5.6 Improvements to Simple Machine
      7. 5.7 Architecture of the G80 microprocessor
      8. 5.8 Problems
    2. Chapter 6: Instruction set and code assembly
      1. 6.1 Programmer’s model
      2. 6.2 Instruction format and addressing modes
      3. 6.3 Converting the source code to machine code – manual assembly
      4. 6.4 Using the assembler
      5. 6.5 Assembly language
      6. 6.6 Types of instruction
      7. 6.7 Problems
    3. Chapter 7: Program structures
      1. 7.1 Program control structures
      2. 7.2 Data structures
      3. 7.3 Subroutines
      4. 7.4 Problems
    4. Chapter 8: Simple computer circuits
      1. 8.1 G80 external connections
      2. 8.2 Read-only memory device – ROM
      3. 8.3 COMPI computer – G80 with ROM only
      4. 8.4 RAM device
      5. 8.5 COMP2 computer – G80 with ROM and RAM
      6. 8.6 COMP3 computer
      7. 8.7 Microprocessor control signals
      8. 8.8 Problems
    5. Chapter 9: Input and output ports
      1. 9.1 Simple output port
      2. 9.2 Port address space
      3. 9.3 A simple input port
      4. 9.4 Programmable ports*
      5. 9.5 Serial data transmission – UART*
      6. 9.6 Problems
    6. Chapter 10: Input and output methods
      1. 10.1 Simple input and output
      2. 10.2 Handshaking
      3. 10.3 Simple output to a slow device
      4. 10.4 Do-forever loop
      5. 10.5 Processor interrupt
      6. 10.6 Possible interrupt mechanisms
      7. 10.7 Interrupt priority mechanisms
      8. 10.8 Non-maskable interrupt
      9. 10.9 G80 interrupt mechanisms
      10. 10.10 Direct memory access
      11. 10.11 Problems
    7. Chapter 11: More devices
      1. 11.1 Counter device and its use in a conveyor belt
      2. 11.2 Timer device
      3. 11.3 Calendar device
      4. 11.4 Pottery kiln
      5. 11.5 Multitasking*
      6. 11.6 Problems
    8. Chapter 12: Assembler and linker tools
      1. 12.1 How an assembler works
      2. 12.2 Linker
      3. 12.3 Intel format file
      4. 12.4 High-level languages
      5. 12.5 Problems
    9. Chapter 13: The control unit
      1. 13.1 Requirements of the control unit
      2. 13.2 Register transfers
      3. 13.3 Instruction fetch
      4. 13.4 Examples of instruction execution
      5. 13.5 Hardwired controller
      6. 13.6 More about the hardwired controller
      7. 13.7 Microprogrammed control
      8. 13.8 Problems
  9. Part 3: Larger Computer
    1. Chapter 14: Larger computers
      1. 14.1 General-purpose computers
      2. 14.2 Memory bottleneck
      3. 14.3 Storage within a computer
      4. 14.4 Data bus width and memory address space
      5. 14.5 Addressing modes
      6. 14.6 Organization of 32-bit memory
      7. 14.7 Instruction queue
      8. 14.8 Locality of reference
      9. 14.9 Operating systems
    2. Chapter 15: Cache memory
      1. 15.1 Basic operation of cache
      2. 15.2 Cache organization – direct mapping
      3. 15.3 Cache organization – set-associative mapping
      4. 15.4 Cache organization – fully associative mapping
      5. 15.5 Problems
    3. Chapter 16: Memory management
      1. 16.1 Virtual and physical addresses – imaginary and real memory
      2. 16.2 Pages and page frames
      3. 16.3 Page Tables
      4. 16.4 Handling a page fault
      5. 16.5 Page size
      6. 16.6 Two-level paging*
      7. 16.7 Translation look-aside buffer
      8. 16.8 Memory protection
      9. 16.9 Problems
  10. Appendix A: G80 instruction set
  11. Appendix B: ASCII character codes
  12. Appendix C: Specifications of the input and output devices
  13. Appendix D: The GDS assembler and linker
  14. Index
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