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This IBM® Redbooks® publication describes the features and functions the latest member of the IBM Z® platform, the IBM z15™ Model T02 (machine type 8562). It includes information about the IBM z15 processor design, I/O innovations, security features, and supported operating systems.

The z15 is a state-of-the-art data and transaction system that delivers advanced capabilities, which are vital to any digital transformation. The z15 is designed for enhanced modularity, which is in an industry standard footprint.

This system excels at the following tasks:

  • Making use of multicloud integration services
  • Securing data with pervasive encryption
  • Accelerating digital transformation with agile service delivery
  • Transforming a transactional platform into a data powerhouse
  • Getting more out of the platform with IT Operational Analytics
  • Accelerating digital transformation with agile service delivery
  • Revolutionizing business processes
  • Blending open source and Z technologies

This book explains how this system uses new innovations and traditional Z strengths to satisfy growing demand for cloud, analytics, and open source technologies. With the z15 as the base, applications can run in a trusted, reliable, and secure environment that improves operations and lessens business risk.

Table of Contents

  1. Front cover
  2. Notices
    1. Trademarks
  3. Preface
    1. Authors
    2. Now you can become a published author, too!
    3. Comments welcome
    4. Stay connected to IBM Redbooks
  4. Chapter 1. Introduction
    1. 1.1 Design considerations for the IBM z15 T02
    2. 1.1.1 Complementing and augmenting cloud solutions
    3. 1.1.2 Compliance, resiliency, and performance
    4. 1.1.3 Pervasive encryption
    5. 1.1.4 IBM Z Data Privacy Passports
    6. 1.1.5 Secure Boot and Secure Execution for Linux
    7. 1.1.6 Blending open source with IBM Z state-of-the-art technologies
    8. 1.2 IBM z15 Model T02 highlights
    9. 1.2.1 Processor and memory
    10. 1.2.2 Models and upgrade paths
    11. 1.2.3 Frame and cabling
    12. 1.2.4 CPC drawers
    13. 1.2.5 PCIe+ I/O drawer
    14. 1.2.6 I/O subsystem and I/O features
    15. 1.2.7 Storage connectivity
    16. 1.2.8 Network connectivity
    17. 1.2.9 Coupling and Server Time Protocol connectivity
    18. 1.2.10 Cryptography
    19. 1.3 Capacity and performance
    20. 1.4 Virtualization
    21. 1.4.1 PR/SM mode
    22. 1.4.2 Dynamic Partition Manager mode
    23. 1.4.3 LPAR modes on z15 T02
    24. 1.5 Reliability, availability, and serviceability
    25. 1.6 Hardware Management Consoles and Support Elements
    26. 1.7 Supported operating systems and compilers
    27. 1.7.1 Supported operating systems
    28. 1.7.2 IBM compilers
  5. Chapter 2. Central processor complex hardware components
    1. 2.1 System overview: frames and drawers
    2. 2.1.1 z15 T02 system features
    3. 2.1.2 System configurations
    4. 2.2 CPC drawer
    5. 2.2.1 CPC drawer interconnect topology
    6. 2.2.2 Oscillator
    7. 2.2.3 System control
    8. 2.2.4 CPC drawer power
    9. 2.3 Single chip modules
    10. 2.3.1 Processor unit chip
    11. 2.3.2 Processor unit (core)
    12. 2.3.3 PU characterization
    13. 2.3.4 System Controller chip
    14. 2.3.5 Cache level structure
    15. 2.4 PCIe+ I/O drawer
    16. 2.5 Memory
    17. 2.5.1 Memory subsystem topology
    18. 2.5.2 Redundant array of independent memory
    19. 2.5.3 Memory configurations
    20. 2.5.4 Memory upgrades
    21. 2.5.5 Drawer replacement and memory
    22. 2.5.6 Virtual Flash Memory
    23. 2.6 Reliability, availability, and serviceability
    24. 2.6.1 RAS in the CPC memory subsystem
    25. 2.6.2 General z15 T02 RAS features
    26. 2.7 Connectivity
    27. 2.7.1 Redundant I/O interconnect
    28. 2.7.2 Enhanced drawer availability
    29. 2.7.3 CPC drawer upgrade
    30. 2.8 Model configurations
    31. 2.8.1 Upgrades
    32. 2.8.2 Model capacity identifier
    33. 2.8.3 Capacity Backup Upgrade
    34. 2.8.4 On/Off Capacity on Demand and CPs
    35. 2.9 Power and cooling
    36. 2.9.1 Power configurations
    37. 2.9.2 Power estimation tool
    38. 2.9.3 Cooling
    39. 2.10 Summary
  6. Chapter 3. Central processor complex design
    1. 3.1 Overview
    2. 3.2 Design highlights
    3. 3.3 CPC drawer design
    4. 3.3.1 Cache levels and memory structure
    5. 3.3.2 CPC drawer interconnect topology
    6. 3.4 Processor unit design
    7. 3.4.1 Simultaneous multithreading
    8. 3.4.2 Single-instruction multiple-data
    9. 3.4.3 Out-of-Order execution
    10. 3.4.4 Superscalar processor
    11. 3.4.5 Compression and cryptography accelerators on a chip
    12. 3.4.6 Decimal floating point accelerator
    13. 3.4.7 IEEE floating point
    14. 3.4.8 Processor error detection and recovery
    15. 3.4.9 Branch prediction
    16. 3.4.10 Wild branch
    17. 3.4.11 Translation lookaside buffer
    18. 3.4.12 Instruction fetching, decoding, and grouping
    19. 3.4.13 Extended Translation Facility
    20. 3.4.14 Instruction set extensions
    21. 3.4.15 Transactional Execution
    22. 3.4.16 Runtime Instrumentation
    23. 3.5 Processor unit functions
    24. 3.5.1 Overview
    25. 3.5.2 Central processors
    26. 3.5.3 Integrated Facility for Linux (FC 1945)
    27. 3.5.4 Internal Coupling Facility (FC 1946)
    28. 3.5.5 IBM Z Integrated Information Processor (FC 1947)
    29. 3.5.6 System assist processors
    30. 3.5.7 Reserved processors
    31. 3.5.8 Integrated firmware processor
    32. 3.5.9 Processor unit assignment
    33. 3.5.10 Sparing rules
    34. 3.5.11 CPC drawer numbering
    35. 3.6 Memory design
    36. 3.6.1 Overview
    37. 3.6.2 Main storage
    38. 3.6.3 Hardware system area
    39. 3.6.4 Virtual Flash Memory (FC 0643)
    40. 3.7 Logical partitioning
    41. 3.7.1 Overview
    42. 3.7.2 Storage operations
    43. 3.7.3 Reserved storage
    44. 3.7.4 Logical partition storage granularity
    45. 3.7.5 LPAR dynamic storage reconfiguration
    46. 3.8 Intelligent Resource Director
    47. 3.9 Clustering technology
    48. 3.9.1 CF Control Code
    49. 3.9.2 Coupling Thin Interrupts
    50. 3.9.3 Dynamic CF dispatching
    51. 3.10 Virtual Flash Memory
    52. 3.10.1 IBM Z Virtual Flash Memory overview
    53. 3.10.2 VFM feature
    54. 3.10.3 VFM administration
    55. 3.11 Secure Service Container
  7. Chapter 4. Central processor complex I/O structure
    1. 4.1 Introduction to I/O infrastructure
    2. 4.1.1 I/O infrastructure
    3. 4.1.2 PCIe Generation 3
    4. 4.2 I/O system overview
    5. 4.2.1 Characteristics
    6. 4.2.2 Supported I/O features
    7. 4.3 PCIe+ I/O drawer
    8. 4.3.1 PCIe+ I/O drawer offerings
    9. 4.4 CPC drawer fanouts
    10. 4.4.1 PCIe+ Generation 3 fanout (FC 0175)
    11. 4.4.2 Integrated Coupling Adapter (FC 0172 and 0176)
    12. 4.4.3 Fanout considerations
    13. 4.5 I/O features
    14. 4.5.1 I/O feature card ordering information
    15. 4.5.2 Physical channel ID report
    16. 4.6 Connectivity
    17. 4.6.1 I/O feature support and configuration rules
    18. 4.6.2 Storage connectivity
    19. 4.6.3 Network connectivity
    20. 4.6.4 Parallel Sysplex connectivity
    21. 4.7 Cryptographic functions
    22. 4.7.1 CPACF functions (FC 3863)
    23. 4.7.2 Crypto Express7S feature (FC 0898 and FC 0899)
    24. 4.7.3 Crypto Express6S feature (FC 0893) as carry forward only
    25. 4.7.4 Crypto Express5S feature (FC 0890) as carry forward only
    26. 4.8 Integrated Firmware Processor
  8. Chapter 5. Central processor complex channel subsystem
    1. 5.1 Channel subsystem
    2. 5.1.1 Multiple logical channel subsystems
    3. 5.1.2 Multiple subchannel sets
    4. 5.1.3 Channel path spanning
    5. 5.2 I/O configuration management
    6. 5.3 Channel subsystem summary
  9. Chapter 6. Cryptographic features
    1. 6.1 Cryptography enhancements on IBM z15 T02
    2. 6.2 Cryptography overview
    3. 6.2.1 Modern cryptography
    4. 6.2.2 Kerckhoffs’ principle
    5. 6.2.3 Keys
    6. 6.2.4 Algorithms
    7. 6.3 Cryptography on IBM z15 T02
    8. 6.4 CP Assist for cryptographic functions
    9. 6.4.1 Cryptographic synchronous functions
    10. 6.4.2 CPACF protected key
    11. 6.5 Crypto Express7S
    12. 6.5.1 Cryptographic asynchronous functions
    13. 6.5.2 Crypto Express7S as a CCA coprocessor
    14. 6.5.3 Crypto Express7S as an EP11 coprocessor
    15. 6.5.4 Crypto Express7S as an accelerator
    16. 6.5.5 Managing Crypto Express7S
    17. 6.6 Trusted Key Entry workstation
    18. 6.6.1 Logical partition, TKE host, and TKE target
    19. 6.6.2 Optional smart card reader
    20. 6.6.3 TKE hardware support and migration information
    21. 6.7 Cryptographic functions comparison
    22. 6.8 Cryptographic operating system support for z15
    23. 6.8.1 Crypto Express7S Toleration
    24. 6.8.2 Crypto Express7S support of VFPE
    25. 6.8.3 Crypto Express7S support of greater than 16 domains
  10. Chapter 7. Operating system support
    1. 7.1 Operating systems summary
    2. 7.2 Support by operating system
    3. 7.2.1 z/OS
    4. 7.2.2 z/VM
    5. 7.2.3 z/VSE
    6. 7.2.4 z/TPF
    7. 7.2.5 Linux on IBM Z (Linux on Z)
    8. 7.2.6 KVM hypervisor
    9. 7.3 z15 features and function support overview
    10. 7.3.1 Supported CPC functions
    11. 7.3.2 Coupling and clustering
    12. 7.3.3 Network connectivity
    13. 7.3.4 Cryptographic functions
    14. 7.4 Support by features and functions
    15. 7.4.1 LPAR Configuration and Management
    16. 7.4.2 Base CPC features and functions
    17. 7.4.3 Coupling and clustering features and functions
    18. 7.4.4 Storage connectivity-related features and functions
    19. 7.4.5 Networking features and functions
    20. 7.4.6 Cryptography Features and Functions Support
    21. 7.5 z/OS migration considerations
    22. 7.5.1 General guidelines
    23. 7.5.2 Hardware Fix Categories (FIXCATs)
    24. 7.5.3 Coupling links
    25. 7.5.4 z/OS XL C/C++ considerations
    26. 7.5.5 z/OS V2.4
    27. 7.5.6 z/OS V2.3
    28. 7.6 z/VM migration considerations
    29. 7.6.1 z/VM 7.2
    30. 7.6.2 z/VM 7.1
    31. 7.6.3 z/VM V6.4
    32. 7.6.4 z/VM support summary
    33. 7.6.5 ESA/390-compatibility mode for guests
    34. 7.6.6 Capacity
    35. 7.7 z/VSE migration considerations
    36. 7.8 Software licensing
    37. 7.9 References
  11. Chapter 8. System upgrades
    1. 8.1 Upgrade types
    2. 8.1.1 Overview of upgrade types
    3. 8.1.2 Capacity on Demand (CoD) terminology
    4. 8.1.3 Permanent upgrades
    5. 8.1.4 Temporary upgrades
    6. 8.2 Concurrent upgrades
    7. 8.2.1 Upgrades
    8. 8.2.2 Customer Initiated Upgrade facility
    9. 8.2.3 Concurrent upgrade functions summary
    10. 8.3 Miscellaneous equipment specification upgrades
    11. 8.3.1 MES upgrade for PUs
    12. 8.3.2 MES upgrades for memory
    13. 8.3.3 MES upgrades for I/O
    14. 8.3.4 Feature on Demand
    15. 8.4 Permanent upgrade through the CIU facility
    16. 8.4.1 Ordering
    17. 8.4.2 Retrieval and activation
    18. 8.5 On/Off Capacity on Demand
    19. 8.5.1 Overview
    20. 8.5.2 Capacity Provisioning Manager
    21. 8.5.3 Ordering
    22. 8.5.4 On/Off CoD testing
    23. 8.5.5 Activation and deactivation
    24. 8.5.6 Termination
    25. 8.5.7 z/OS capacity provisioning
    26. 8.6 Capacity for Planned Event
    27. 8.7 Capacity Backup
    28. 8.7.1 Ordering
    29. 8.7.2 CBU activation and deactivation
    30. 8.7.3 Automatic CBU enablement for GDPS
    31. 8.8 Nondisruptive upgrades
    32. 8.8.1 Components
    33. 8.8.2 Concurrent upgrade considerations
    34. 8.9 Summary of Capacity on-Demand offerings
  12. Chapter 9. Reliability, availability, and serviceability
    1. 9.1 RAS strategy
    2. 9.2 Technology
    3. 9.2.1 Processor Unit chip
    4. 9.2.2 System Controller and main memory
    5. 9.2.3 I/O and service
    6. 9.3 Structure
    7. 9.4 Reducing complexity
    8. 9.5 Reducing touches
    9. 9.6 z15 T02 availability characteristics
    10. 9.7 z15 T02 RAS functions
    11. 9.7.1 Scheduled outages
    12. 9.7.2 Unscheduled outages
    13. 9.8 z15 T02 enhanced drawer availability
    14. 9.8.1 Enhanced drawer availability processing
    15. 9.9 z15 Enhanced Driver Maintenance
    16. 9.9.1 Resource Group and native PCIe features MCLs
    17. 9.10 RAS capability for the HMC and SE
  13. Chapter 10. Hardware Management Console and Support Element
    1. 10.1 HMC and SE introduction
    2. 10.1.1 Dynamic Partition Manager support
    3. 10.2 HMC and SE changes and new features
    4. 10.2.1 Driver Level 41 HMC and SE new features
    5. 10.2.2 New Rack-mounted HMC and Tower HMC
    6. 10.2.3 New Support Element
    7. 10.2.4 New service and functional operations for HMCs and SEs
    8. 10.2.5 SE driver support with the HMC driver
    9. 10.2.6 Standalone HMC feature codes
    10. 10.2.7 User interface
    11. 10.2.8 Customize Product Engineering Access: Best practice
    12. 10.3 HMC and SE connectivity
    13. 10.3.1 Standard HMC connectivity
    14. 10.3.2 Hardware Management Appliance
    15. 10.3.3 Network planning for the HMC and SE
    16. 10.3.4 Hardware considerations
    17. 10.3.5 TCP/IP Version 6 on the HMC and SE
    18. 10.3.6 OSA Support Facility
    19. 10.3.7 Assigning addresses to the HMC and SE
    20. 10.3.8 HMC Multi-factor authentication
    21. 10.4 Remote Support Facility
    22. 10.4.1 Security characteristics
    23. 10.4.2 RSF connections to IBM and Enhanced IBM Service Support System
    24. 10.4.3 HMC and SE remote operations
    25. 10.5 HMC and SE capabilities
    26. 10.5.1 Central processor complex management
    27. 10.5.2 LPAR management
    28. 10.5.3 Operating system communication
    29. 10.5.4 HMC and SE microcode
    30. 10.5.5 Monitoring
    31. 10.5.6 Capacity on-demand support
    32. 10.5.7 Server Time Protocol support
    33. 10.5.8 CTN Split and Merge
    34. 10.5.9 NTP client and server support on the HMC
    35. 10.5.10 Security and user ID management
    36. 10.5.11 System Input/Output Configuration Analyzer on the SE and HMC
    37. 10.5.12 Automated operations
    38. 10.5.13 Cryptographic support
    39. 10.5.14 Installation support for z/VM that uses the HMC
    40. 10.5.15 Dynamic Partition Manager
  14. Chapter 11. Environmentals
    1. 11.1 Power and Cooling
    2. 11.1.1 Power infrastructure
    3. 11.1.2 Cooling requirements
    4. 11.2 Physical specifications
    5. 11.3 Physical planning
    6. 11.3.1 Raised floor or non-raised floor
    7. 11.3.2 Top Exit cabling feature (optional)
    8. 11.3.3 Frame cable management
    9. 11.3.4 Bottom Exit cabling feature
    10. 11.3.5 Frame Bolt-down kit
    11. 11.3.6 Service clearance areas
    12. 11.4 Energy management
    13. 11.4.1 Environmental monitoring
  15. Chapter 12. Performance
    1. 12.1 IBM z15 T02 performance characteristics
    2. 12.1.1 IBM Integrated Accelerator for zEnterprise Data Compression
    3. 12.1.2 Primary performance improvement drivers with z15
    4. 12.2 z15 T02 Large System Performance Reference ratio
    5. 12.2.1 LSPR workload suite
    6. 12.3 Fundamental components of workload performance
    7. 12.3.1 Instruction path length
    8. 12.3.2 Instruction complexity
    9. 12.3.3 Memory hierarchy and memory nest
    10. 12.4 Relative Nest Intensity
    11. 12.5 LSPR workload categories based on RNI
    12. 12.6 Relating production workloads to LSPR workloads
    13. 12.7 CPU MF counter data and LSPR workload type
    14. 12.8 Workload performance variation
    15. 12.9 Capacity planning consideration for z15 T02
    16. 12.9.1 Collect CPU MF counter data
    17. 12.9.2 Creating EDF file with CP3KEXTR
    18. 12.9.3 Loading EDF file to the capacity planning tool
    19. 12.9.4 Tips to maximize z15 T02 server capacity
  16. Appendix A. Channel options
  17. Appendix B. System Recovery Boost
    1. B.1 Overview
    2. B.2 Functions
    3. B.3 Delivering extra capacity
    4. B.4 Setting up the System Recovery Boost
    5. B.5 Monitoring system recovery boost
    6. B.6 Automation
    7. B.7 Pricing
    8. B.8 Software support
  18. Appendix C. IBM Integrated Accelerator for zEnterprise Data Compression
    1. Client value of Z compression
    2. z15 IBM Integrated Accelerator for zEDC
    3. z15 migration considerations
    4. Software support
    5. Compression acceleration and Linux on Z
  19. Related publications
    1. IBM Redbooks
    2. Other publications
    3. Online resources
    4. Help from IBM
  20. Back cover
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