Microprogramming and Microarchitecture 297
The reader must have noted by now that for the two-Bus version, SP is sent to ALU for
increment to generate the address of stack-top, even before the first byte of opcode reached
within IR. We know that after receiving the first byte of any opcode, the processor can decide
further course of action. In that case, the present scheme of sending SP to ALU for processing
before decoding the current opcode seems to be unjustified.
However, in some special cases, like pipeline operation, the advance look out may send
some prior information about some instructions specially branching instructions, which helps
the processor to be prepared for this type of advanced treatment of instruction code bytes.
F
O
O
D
F
O
R
T
H
O
U
G
H
T
SUMMARY
Each of the instructions executed by any microprocessor or microcontroller is expected to carry out
many sub-instructions, known as micro-operations, for its implementation. Different organizational
modules of the processor are to receive different control signals generated for this and react accord-
ingly. In most of the cases, these reactions of different modules must follow a sequence depending upon
various internal and external features of the processor. These control signals are generated by the control
unit of the processor with the help of the instruction decoder and the system clock.
Generation of control signals for micro-operations may be carried out either by hardware or by
software. In either case, system clock signal contributes for maintaining the time requirements. The
opcode of the active instruction is decoded by the instruction decoder to select necessary control
signals. In software controlled unit, all necessary control signals for each instruction is stored within
a memory system interfaced with a tiny processor, which nds out and emits these control signals in
proper sequence using the system clock and decoded opcode. In this case the decoded opcode helps
to target the correct entry point (starting address) within the storage area of microinstructions. In
hardwired controlled units, all these are undertaken by the hardware circuit specially designed for this
purpose. In general, hardwired controlled units are faster in instruction execution than software con-
trolled units. However, modi cations are implemented with minimum overhead expenditure in case of
software controlled units.
Data paths are related with ALU and multiple number of data paths helps to make the operation
faster. The C-Bus is, generally, related with the result of ALU while A-Bus and B-Bus are related with
ALU operands.
POINTS TO REMEMBER
R Hardwired controlled units are faster in execution.
R Software controlled units are easier to modify.
R System clock governs the duty-cycle of every control signal.
R Opcode of ongoing instruction selects active control signals.
M09_GHOS1557_01_SE_C09.indd 297M09_GHOS1557_01_SE_C09.indd 297 4/29/11 5:17 PM4/29/11 5:17 PM
..................Content has been hidden....................
You can't read the all page of ebook, please click here login for view all page.