18 Computer Architecture and Organization
is, how so many devices function properly and concurrently? For that, we have to investigate the basic
operational concepts of a computer.
2.3 BASIC OPERATIONAL CONCEPTS
What is the duty of any computer when it is operational? As a matter of fact, there are two duties, as follows:
R Execute the software by fetching instructions from memory.
R Look for any external signal and react accordingly.
Both these duties are entrusted upon and carried out by the microprocessor (or processor), which is
the central controller of the whole system. The second part deals with eventual external interrupts or
other input signals, e.g., from keyboard or mouse, which will be discussed later. However, the major
duty of the processor is to run (or execute) the software, and this program execution is done continu-
ously until the computer is switched off. The question is how this execution is done? Several steps are
to be combined together to respond to this question. The following sections describe these steps.
2.3.1 Processor Clock
The heart of any processor is its clock, which starts almost the moment a computer is switched on (powered).
This clock is a simple digital signal producing on and off states alternately, at equal time intervals, as shown
in Figure 2.4 . In this diagram, the X-axis indicates time and the Y-axis represent DC voltage. This oscillating
phenomenon generates two different edges of the clock signal, rising edge (positive edge) and falling edge
(negative edge). In Chapter 3, it would be explained how these edges or transitions may be used to increment
or decrement any binary counter. Presently, let us assume that the clock signal is capable of running this phe-
nomenon. Which counter is affected by this process? The answer is–the Program Counter.
Figure 2.4 Processor clock
2.3.2 Program Counter
Inside every processor, there is a binary counter, known as Program Counter (popularly known as PC).
The width (number of bits accommodated) of this counter varies from processor to processor. However,
its basic operation is identical in all cases. With every falling edge (or rising edge, depending upon the
processor) of the clock signal, this counter is incremented by one.
Believe it or not, this simple looking clock signal of Figure 2.4 is the basic driving force for all types
of computers available on the earth. Stop this signal and not a single computer would function.
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Overview of Computer 19
What purpose does this incrementing serve? Well, the content of the PC, the group of bits, is
immediately sent out to the memory area (main memory). This bunch of signals, which moves out from
the PC to the memory is known as address signal . What is its function? After reaching the memory section,
depending upon the pattern of the signal generated by combinations of 1s and 0s of different bits, it targets
one unique memory location. The content of that memory location is then brought within the processor. This
process is known as memory reading , and this is illustrated in Figure 2.5 . In this diagram, the thick arrow
from the PC, representing multiple address signals, is directed to the memory, represented by the rectangle at
the right. Inside this memory unit, there are various address spaces (known as locations) and every address
space contains some data. To obtain or read any data, its address along with a memory-read command is
necessary. It is the duty of the CPU to generate the read-memory command, which is designated as a control
signal . After receiving the address and read command, the memory unit releases the related data through the
data path, as shown by the thick arrow at bottom of the diagram. Note that the thick arrows indicate multiple
signals or a bunch of signals while the thin single-lined arrow indicates only one signal, like read-memory.
Figure 2.5 Reading from memory
The direct relation between the total number of instructions offered by the processor and the
time required to decode had resulted in two different processor types—reduced instruction
set computer (RISC) and complex instruction set computer (CISC). We shall deal with this
topic in Chapter 5.
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2.3.3 Instruction Fetch
If we now assume that the original content of the PC was that address of memory, which contains the
executable program, then the memory reading by the above-mentioned process must be to fetch an
instruction of the program, and the procedure is known as instruction fetch . After completion of this
instruction fetch, the binary content of the memory location (instruction byte) is available within the
processor itself. It is needless to mention that in the next clock cycle the PC would be incremented by
one and the whole process would be repeated, as we shall see a little later.
2.3.4 Instruction Decode
Now the processor becomes busy with the instruction byte, freshly fetched from the memory, to
understand what it is all about. After all, for every instruction, the processor must do something special
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20 Computer Architecture and Organization
as per that instruction. This concept of ‘ understanding the instruction ’ is also known as decoding the
instruction or instruction decode . The more the total number of instructions offered by the processor,
the more complex would be this instruction decoding unit. At a later chapter, we shall be familiar with
the microprogramming and other techniques for instruction decoding and its execution.
2.3.5 Instruction Execute
From the instruction decoding module, after the processor knows what to do, it immediately starts to
carry out the order. This execution may be of various types, depending upon the instruction and the
processor, like
R Fetch an operand from memory or
R Add two registers.
Whatever be the job, once it is executed, the procedure, which started with the increment of
the PC, becomes complete. The cycle of incrementing PC and so on. is repeated, as shown in
Figure 2.6 .
Figure 2.6 Major functions of a processor
In earlier processors, fetching, decoding and executing occupied different time slots. In modern
processors, they overlap each other, which is known as pipelining. In other words, during
decoding or execution stage, some instruction fetch is carried out simultaneously. In Chapter 12,
we shall discuss about pipelining.
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