E
MIPS R4000
This appendix introduces MIPS R4000 processor and discusses some of its salient features.
After completion of this chapter, the reader would know about
R General architectural features and register details of R4000.
R Different instruction formats and instruction set of this processor.
R Essential characteristics of pipeline architecture of MIPS R-series processors.
O BJECTIVES
E.1 INTRODUCTION
MIPS R-series processors were developed by MIPS Technology Inc. and one of the rst commer-
cially available RISC processor (R of R-series stands for RISC). Microprocessor revolution was
initialled by Intel around early 70s and by late 70s and early 80s, the silicon market was ooded
with microprocessor chips from almost every manufacturer. Right from the beginning, the target was
to improve the design so that it can execute more instructions per second offering a larger and ever
increasing set of instructions so that the processor becomes operating-system-designer-friendly. In
short, the goal was set to fabricate a small silicon wafer to compete with a room-sized VAX or simi-
lar machines.
However, almost at the same time, a different school of thought started emerging, with the same
target of making a faster processor, but through a different approach. It was pointed out that complex
instructions, which are rarely executed by the machine, invariably make the instruction format more
complicated, demanding more amount of time for its decoding and, therefore, slowing down the speed
of the processor. Not only the number of executable instructions should be limited to a bare minimum,
but also the time required for their execution to be minimized. Considering various parameters and their
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