A-bus One of the major buses within the proces-
sor, generally connecting the register array and the
ALU.
AC characteristics Electrical signal character-
istics of devices with respect to time and ampli-
tude (voltage or logic level).
Accelerometer Sensor or device to indicate ac-
celeration of motion.
Access time Time required after sending a read/
write command for a disc and getting/writing the
rst information (byte) from/in the disc. Also
known as latency.
Accumulator One of the CPU registers to hold
result of ALU operations and also the related
operand.
Address Unique bit-pattern to target a location
within an array of memory area. Also applicable
for I/O area.
Ageing Time spent by a process within short
term queue.
Algorithm Step-wise solution technique of a
problem.
Arithmetic right shift Right shift of all bits
keeping the most signi cant bit unchanged.
Array processing Using multiple processors to
execute identical instruction for all processors at the
same time with individual independent data sets.
Assembler Software to translate assembly lan-
guage program written for a processor into exe-
cutable machine language version by one or more
passes but generally by two.
Assembly language Low level processor-speci c
language.
Assembly line An array for sequential fabrica-
tion, generally adopted in manufacturing process.
Asynchronous Running on individual indepen-
dent clock.
Auxiliary carry Carry from bit 3 to bit 4.
B-bus Internal bus of a processor, generally
dedicated with address or related information.
Backward compatibility Compatibility with
already existing devices of the same group by
same manufacturer.
Bandwidth The maximum rate in Mbps at
which information may be transferred to or from
memory unit or through a bus.
Batch processing A method of multiple pro-
gram execution in sequential manner practiced
during early days of computers.
Baud rate Number of transmitted symbols
(logic levels) per second.
Best fi t Selection of a vacant memory slot for a
program so that minimum memory area is wasted
(left vacant).
Binary Number system with base as two.
Bit Binary digit. Contains either 1 or 0.
Bit-map Bit-wise representation.
Boolean 2-state system (generally number)
Booting Starting a computer system from
switched-off condition by loading initializing
program-segments.
Boot-strap ROM The ROM within mother-
board to initiate the booting procedure.
Bouncing Oscillation of output signal from any
mechanical key due to its mechanical property.
Branch-penalty Delay in instruction fetch and
execution related to a conditional branch instruc-
tion due to incorrect prediction of branching.
Branch-prediction Indicating program- ow di-
rection following any conditional branch instruction
without prior information of branching condition.
Break point The execution is to stop and all
processor status saved after arrival at this location,
which is pre-de ned by the user. (Generally used
during program debugging stage).
Buffer Current booster (hardware) or temporary
storage area (software).
Bus Bunch of electrical signal lines.
Bus-arbiter The electronic device that performs
bus arbitration.
Bus arbitration Deciding which one module
out of multiple modules to use the bus for some
time.
Bus cycle Time to transact one set of data-bus
contents to or from memory or I/O device inter-
faced externally with the processor.
Glossary
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Glossary 525
Byte An array of 8 bits.
C-bus Communicates ALU-result to register le
Cache coherence For a multiprocessor system,
the problem of maintaining consistency in all
other caches when one cache is altered, is known
as cache coherence.
Cache controller The device to interact bet-
ween cache and processor.
Cache directory The place where the latest
usage map of cache is maintained.
Cache hit Instruction or data being available
within the targeted cache.
Cache memory Smaller portion of main mem-
ory of SRAM to store instruction or data for faster
access by the processor.
Cache miss Instruction or data not being avail-
able within the targeted cache.
Carry Over ow from most signi cant bit from
an array of bits due to arithmetic or logical opera-
tion. Generally accommodated within 1-bit ag
known as carry ag.
Chassis Outer box to house any instrument.
Child node Nodes generated later from the par-
ent node.
Chip enable An input to make the chip active.
Same as Chip select.
Chip select An input to make the chip active.
Same as Chip enable.
Cluster robot A group of small autonomous ro-
bots capable of interacting between group mem-
bers through wireless. Generally functions for a
common goal.
Combinational circuit The circuit that does not
change with time. Generally does not have any
clock signal as one of the inputs.
Comment statement Non-executable informa-
tion to increase the readability of any program.
Compiler Software to translate a program writ-
ten in high level language to assembly language
for a particular processor. It is both high level lan-
guage as well as processor speci c.
Computer architecture The branch of com-
puter science dealing with overall (broad) design
concepts of a computer.
Computer organization The branch of computer
science dealing with detailed design of a computer.
Contiguous memory Primary memory area of
a computer without any discontinuity of the ad-
dress space.
Control hazard Non-availability of instruction
on time for a pipeline architecture (also known as
Instruction hazard).
Control signal Signals used by a processor oth-
er than address and data signals to communicate
with its externally interfaced peripheral devices.
Control unit The part of a processor controlling
the entire processor.
Controller (HPIB) The device (computer) capa-
ble of assigning the appropriate device to interface
with the HPIB bus to send data (Talker) and the ap-
propriate device that would receive it (Listener).
Core The part of any processor responsible of
decoding its instructions before execution. Also
the name of microarchitecture adopted by Intel in
its Core2Duo processor.
Counter The electronic circuit composed of
ip- ops to count in binary the number of digital
pulse inputs and echo it out.
CPU-bound Software programs needing more
CPU time than I/O time.
CPU burst time Total time used by a software
keeping the processor busy.
Critical section The section of a software that
uses any shared data.
Daisy chaining Connecting same type of pins
together. Generally applicable for input pins of
hardware devices.
Data Binary information generally stored in
registers or memory and processed by ALU.
Data-cache The high speed RAM earmarked to
store data for the processor’s use.
Data dependency When the output from one
module is necessary as input for another module,
it becomes a case of data dependency.
Data hazard Non-availability of data on time
related to pipeline architecture.
Data packet Several bytes of data that are com-
municated together.
Data path The route to be followed by the
bunch of data signals for a processor.
Data sheets The documentation of all technical
details related with a device from its manufacturer.
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526 Computer Architecture and Organization
DC characteristics Indication of quantities of
voltage and current related with signals of elec-
tronic devices.
De-bouncing The method (either hardware or
software) to avoid the unwanted signal oscillations
generated by closure or release of mechanical keys.
De-bugger The software tool that helps in nd-
ing out any suspected error(s) in any program.
Decimal Number system with base of 10.
Decoder The device that generates individual
signals from encoded signals.
De-fragmentation Re-ordering of previously
randomly occupied disc spaces so that all unused
disc spaces are at one continuous place, for ef -
cient usage.
De-multiplex Separating out signals that have
been combined phase-wise.
Device driver The software (generally used by
the operating system) to communicate with an ex-
ternal I/O device interfaced with a computer.
Device selection Making a device active. Gen-
erally carried out by asserting a signal attached
with the device.
Digitizer A device capable of echoing the digi-
tal co-ordinate indicated by the current position of
its stylus.
Diode An electronic device that allows ow of
current in one direction but restricts the ow in the
opposite direction.
Disable Making a device inactive by de-assert-
ing its related selection or activating signal.
Disc, Disk A at circular magnetic media ca-
pable of recording electronic signals.
Display Electronic device to show numbers and
characters or graphical images.
Display raster The memory area containing bit
mapped image of the present display, generally
through CRT or similar devices, capable of pixel-
wise display.
Distributed memory system In a multiprocessor
system when every processor is allowed to have its
own local memory, which is also shared with other
processors if necessary, the system is designated as
a distributed memory system.
Distributed processing When the execution of
program is shared by different computers located
at different places interconnected with a network,
it is designated as distributed processing.
Dynamic RAM Low-cost low-speed RAM to
be continuously refreshed to maintain its electri-
cal charge with its capacitors.
Editor The software responsible for generating
any data le or text le providing real-time inter-
acting facility for correction and alteration.
Embedded controller A controller with built-in
software and all necessary hardware to perform
the desired operation of any dedicated system.
Embedded system An electronic system with
all necessary hardware, software and controller to
perform any dedicated operation.
Enable Allowing an electronic device to be ac-
tive by asserting its related signal.
Fan-out parameter The number indicating
how many electronic inputs may be catered by
the concerned output, whose fan-out parameter to
be found out.
Fat tree A method of computer networking with
multiple number of interconnecting nodes at root
level.
Feedback To make output or result of an operation
available at the input stage for further processing.
Fetch-unit The module within the processor,
responsible for bringing the target instruction (and
related data, if required) from external memory or
internal cache to the processor.
First fi t An algorithm to place a new set of
executable code of the selected program within
the rst available adequate area within the main
memory.
Flip-fl op An electronic circuit capable of retain-
ing binary information in form of electrical volt-
age state.
Flowchart Pictorial representation of an algo-
rithm.
Flynn’s classifi cation
A classi cation of differ-
ent possible combination of multiple processors
and multiple memory units with different combi-
nations of instruction ow and data sets. These are
SISD, SIMD, MISD and MIMD.
For-next The general structure of a program
loop capable of iterations. It starts with FOR com-
mand and terminates with NEXT command.
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Glossary 527
FORTRAN A general purpose high level lan-
guage originated around 1956–1957 for solving
common engineering problems. Its name is be-
lieved to be the short form of FORmula TRANsla-
tion.
Forwarding path The data path used for pass-
ing on the result from ALU to ALU’s input regis-
ters, for faster processing.
Fragmentation Transformation of a contiguous
free memory space into discontinuous void spaces
or random sizes due to placement and deletion of
multiple program segments over a period of time.
Frame A part of USB transmission protocol
Full-adder An electronic circuit capable of ac-
cepting two one-bit binary operands and a carry-in
bit and generating the result of their addition in
form of one result bit and a carry-out bit.
Full-Duplex A method of simultaneous, inde-
pendent bidirectional communication
Gate An electronic circuit capable of imple-
menting Boolean operation.
Half-adder Same as full-adder without any
carry-in input. (Only two inputs and two outputs).
Half-carry Any eventual carry from bit 3 to bit
4 of a byte.
Half-Duplex A method of timeshared bidirec-
tional communication with any one directional
communication possible at any time.
Handshaking signal Extra control signals re-
quired for asynchronous communication related
to ascertain and acknowledgement.
Harvard architecture It distinguishes between
program memory and data memory.
Hazard Discontinuity between stages of pipe-
line execution for various reasons.
Hexadecimal Number system with base 16.
High level language Computer programming
language with English-like words and syntax.
Hit rate The rate at which searched data be-
comes immediately or readily available within
cache.
Host Computer
Hypercube An n -dimensional cube.
I
2
C bus Inter-integrated circuit bus, a serial bus
developed by Philips Semiconductor.
IEEE488 Same as GPIB and HPIB
Instruction-cache The static RAM area within
the processor to contain instructions only.
Instruction fi eld Number of bits allotted for
each function within the instruction format.
Instruction format Speci cation of number of
elds within an instruction byte/word.
Instruction hazard Stalling of pipeline execu-
tion due to non-availability of any instruction at
appropriate time.
Instruction queue The FIFO array of prefetched
instructions.
Interrupt An unscheduled event needing im-
mediate attention for processing.
Interrupt controller The device capable of at-
tending and granting interrupt requests.
Interrupt driven I/O Data input or output
from/to external devices through interrupt.
I/O-bound Software programs needing more
I/O time than CPU time.
I/O decoder The electronic circuit or device ca-
pable of selecting the target I/O device as per the
present requirement of the processor.
I/O wait The phase of any software during its
execution stage to wait for any eventual I/O opera-
tion, when the related I/O unit is busy in some other
operation.
Iteration Repeated execution of several pro-
gram-commands as per the direction of the pro-
gram itself.
Keyboard Input device for a computer.
Label Indicator of a program command’s loca-
tion, replacing the original address of that location.
Latency For memory devices, it indicates the
time required to receive or write data starting from
the instant of sending a valid address to it.
Leaf node Terminal nodes of a tree structure.
Least signifi cant (bit) Bit 0 of a byte or word.
Linker The software that connects resident li-
brary routines or other similar routines with an as-
sembled program.
Linux An open source operating system
Liquid crystal display A type of low-power de-
manding display based on crystallization property,
capable of re ecting light.
Listener The identi ed receiving device inter-
faced through IEEE488 interface.
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528 Computer Architecture and Organization
Loader The software that loads an assembled
program within main memory before its execution.
Locality of reference Repeated execution of a
program segment within a smaller zone of main
memory area.
Logical address The address, generally ob-
tained by adding a base address with an offset
address, which is to be modi ed to the physical
address before execution.
Loop Going back to the starting of a program-
segment and re-execiting all program instructions
from that instruction.
Loop-body The set of instruction within a loop
to be executed repeatedly.
Loop-variable The variables that change with
every iteration of the loop.
Machine cycle The part of an instruction cycle
of a processor, necessary to read or write a byte or
word from or to external memory.
Machine language Binary language in form
of 1s and 0s, known and executable by the pro-
cessor.
Macro A group of instructions of any program
that may be re-used at any other part of the pro-
gram by just referring its name and during program
assembly, automatically converted to the same in-
struction set by the assembler.
Magnetic tape drive Storage device for sec-
ondary memory.
Main frame Computer with very large storage
area and higher computing power.
Manual reset Re-starting the processor by man-
ually activating its reset key.
Memory Data storage device for a processor or
a computer.
Memory decoder The device that selects one
particular memory device from a group of memo-
ry devices through the pattern of received address
signals from the processor.
Memory management Identifying available
free areas within memory space and keeping the
track of occupied areas of system memory and its
page segments.
Memory manager The software or hardware
or the combination of both, dedicated for memory
management.
Memory oriented processor Processor with
lesser internal registers and depends on external
memory for operand and result storage.
Micro-controller A processor with on-chip pro-
gram and data memory, I/O ports, timers and other
devices, designed for stand-alone operation as an
independent computer.
Micro-instruction Instructions for micro-oper-
ations within a processor.
Microprocessor An electronic device capable
of fetching and executing arithmetic and logical
instructions through its ALU and control unit as
long as it is switched on.
Micro-programming Arranging the set of mi-
cro-instructions for some micro-operation within
a processor.
Micro-step Turning a stepper motor through a
small angle than its prescribed minimum angle of
rotation.
Micro switch Miniature 2-state switches. Gen-
erally available commercially in groups of two,
four and eight.
Mnemonic Symbolic form of a processor’s in-
struction without any operand.
Modem Electronic device to communicate digi-
tal signals through telephone lines by modulation
and demodulation.
Most signifi cant (bit) The left most or highest
order bit within a byte or a word.
Motherboard The circuit board containing pro-
cessor and other essential peripheral devices used
for a computer.
Mouse A locator device for a computer.
Multi-bus A standard system bus developed by
Intel for multiprocessing con gurations.
Multimedia Capability of storing and handling
both analog as well as digital signals through the
same media.
Multiplexer An electronic device capable of al-
ternately selecting any one of its multiple inputs
as the output.
Multi-processing Processing using multiple
processors.
Multi-programming When multiple programs
are loaded within the system and the processor picks
up one program to execute for a small amount of
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