Instruction Set and Assembly Language Programming 179
Every processor offers some scope to implement these types of procedures. It may or may not be
implemented by a single instruction. For example, 8051 offers DJNZ instruction, which may be directly
used to implement the for–next loop. However, no such single instruction is available in 8085. Therefore,
in the case of 8085 processor, it has to be implemented by ‘DCR reg’ followed by ‘JNZ’ instruction.
6.9.6 Program Branching
Both conditional as well as unconditional program branching instructions are offered by all processors.
However, their number varies with the processor. Conditional program branching instructions are essen-
tial for all programs. The type of conditions used for branching depends upon speci c programming
domain. However, carry and zero are most widely used conditions for program branching.
Intel 8085 microprocessor provided conditional branching instructions for all of its ags of its ag
register. The same is valid for 8086 processor, which offers more number of ags. In 8051, conditional
branching instructions are offered at optimum level, because its bit-condition oriented jump instruction
(e.g., JB bit addr., rel. addr. ) may check its ag-register (PSW) bit-wise and then take the decision.
Both conditional as well as unconditional program branching are generally implemented by reload-
ing the program counter (PC) with the branching address. In normal conditions, PC is incremented by
one to fetch the next instruction’s code. This reloading forces the processor to fetch the next instruction
from the target address according to the reloaded information.
6.9.7 Subroutine Calls
No software instruction set can be complete without instructions for subroutine call and return instruc-
tions. However, whether conditioned call and conditioned return instructions are genuinely required or
not (as in case of 8085 instruction set) is a matter of debate.
Subroutine calls may be visualized as a special type of jump instruction. Just like the normal jump
instruction, the PC, in this case, is loaded with the address of the subroutine being called and the con-
trol branches to that location and starts executing from there. However, the basic difference may be
observed in subroutine calls is that the return address (the address of the next executable instruction
just after the call instruction) is stored on the stack top by the processor before branching. As every
subroutine has to execute a return instruction at its end, this return address, saved on the stack top, is
reloaded in the PC and the processor starts executing from the very location that it had left at the time
of branching for the call instruction.
6.10 ASSEMBLER
We have already indicated that programs, developed in assembly language using the instruction set of
any processor, to be converted to its machine language format before its execution by that processor.
This translation may be carried out in two ways, either by hand assembly or through an assembler .
In the case of hand assembly, a conversion table is used to translate each instruction to its corre-
sponding binary form, which is also known as machine code. Moreover, the branching addresses and
relative addresses are also calculated by long hand. Essentially, this is a tedious process and suitable
only for those programs that are very small, say within 10 to 15 instructions. For longer programs, it is
preferable to use an assembler to get the job done, unless the assembly language software developer is
an adventurous one.
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