194 Computer Architecture and Organization
nibble of opcode is neither 1111 nor 1110, then it must be a 2-nibble instruction. Therefore, by
decoding the rst nibble itself, the processor would immediately know how many more nibble to be
fetched for the ongoing instruction. Moreover, the total number of nibbles in any instruction would
be 2, 3 or 5.
The register identi er eld (rrr) is always accommodated in least signi cant three bits of the second
nibble of instruction. This consideration would make the instruction decoding more simpli ed, needing
lesser number of transistors.
To conclude, the reader must remember that the solution of any design problem may have many vari-
ations, depending upon assumptions and solution methodology. Therefore, the present solution should
not be accepted as the only solution or the best solution.
SUMMARY
Every processor offers its own instruction set to develop assembly language program using these
instructions. However, any executable program must be in the form of machine language (binary
form) of that processor. This demands the conversion of programs developed in either assembly
language or any high level language to the machine language of the processor, which would be
executing it.
Assembly language instruction set of any processor may be divided into three major subdivisions:
data move type, arithmetic and logical type and program branching type. Depending upon the processor,
various addressing modes are offered to locate any target data. Some of these addressing modes are:
immediate, direct, register direct, register indirect, indexed, and so on.
For every processor, the allowable instruction length is subdivided into several elds, upon the
requirement of the instruction set and addressing modes. Combination of required elds generates the
instruction format. For variable length instruction formats, instructions may occupy one, two, three or
more bytes. For a xed length instruction format, all instructions have the same length or same number
of bytes. Uniformity in instruction length makes instruction decoding more ef cient.
Instruction set of 8085 processor offers 80 instructions divided into ve major groups. The maxi-
mum length of instruction is limited to three bytes. Being an 8-bit processor, all instructions necessary
to develop simple programs are offered through its instruction set, with adequate number of addressing
modes. Its instruction set includes data moving, arithmetic, logical, branching and machine control
groups.
The 16-bit 8086 processor offers a richer instruction set of 90 instructions, divided into six major
groups, namely data transfer, arithmetic, logical, branching, string manipulation and machine control.
In this case, more number of addressing modes and larger variety of instructions, like string movement,
and multiply and divide are offered for the program developer. Individual instruction’s length varies
from one to four bytes, with some special instructions occupying more number of bytes than 4.
As compared with 80 instructions of 8085, 8051 microcontroller offers 49 instructions, which are
more advanced instruction set with bit manipulation facilities and multiply and divide instructions. Its
instructions may be divided in ve major groups, e.g., data transfer, arithmetic, logical, bit manipulation
and program branching. Comparatively, simpler addressing modes and straightforward instruction set
makes it ef cient for software developers.
With respect to high level language, assembly language programs may generate optimum codes to meet
time-restriction demands for real-time systems, at the expense of more attention from its programmer.
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