238 Computer Architecture and Organization
However, apart from keyboard and display there are other types of devices, which are frequently
interfaced with a computer. Many a times they need some special considerations for their interfacing
and one of such important consideration is the maximum allowable speed of data transfer, popularly
known as bandwidth . For example, a video interface needs data input at very high speed to maintain the
quality of the on-screen animation at a reasonably acceptable standard. The same demand is applicable
for any hard disc drive also. On the other hand, a keyboard may be taken as a very slow interface for data
transaction. In this chapter, we discuss about various techniques to interface all these widely different
input and output devices. However, details of some of these devices would be discussed in Chapter 15.
8.2 BASIC INPUT/OUTPUT STRUCTURE OF COMPUTERS
From any processor’s point of view, any device around it, which is not a memory device, is taken as an
input/output (I/O) device. For example, within the motherboard of any computer, we nd devices like
timer, interrupt controller, USART, DMA controller and so on. From processor’s view point all these
are I/O devices. However, from user’s point of view, I/O devices are something like keyboard, printer,
mouse, CRT and so on. In this chapter, we shall concentrate on both types of peripheral units and study
the method of communication necessary for smooth operation of the computer.
8.2.1 Interfacing and Communication Techniques
All peripheral devices, which are externally interfaced with computer (sometimes called as host ) through
its chassis, have their own processors within the devices. Therefore, communication between a host and
any one of its peripheral unit is essentially the communication between two processors. This communica-
tion link is always established through the external world with the help of wire-connections. This means
that the processors are not placed within the same circuit and may only be interconnected, but some cable
(multiple wires) are essential to interconnect them. The general structure of such an interface is shown in
Figure 8.1 .
Introduction of computers in our daily life has generated several interesting acronyms, e.g.,
CAD, CADD, CNC, whose full-form are well known to all of us. Two more similar acronyms have
creped up in our jargon, CAC and CCC. The first one stands for Computer Aided Confusion and
the second one for Computer Created Confusion.
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Power supply module of any computer is assumed to belong to a special category, which obvi-
ously falls neither in the memory group nor within input/output group.
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Input / Output Organization 239
Figure 8.1 General structure of any link between a host and its peripheral unit
Host motherboard Peripheral PCB
Certain special points may be observed in Figure 8.1 . First, the processors in motherboard of the
host (computer) and all other processors within peripherals are generally different and have their own
operating frequencies. Second, these processors are never directly interconnected and but through some
I/O ports. All necessary signals and data between any two processors are transferred through these ports.
Third, and most important point is, the method of data communication between host and its peripheral
may be any one of the following three
R Programmed I/O
R Interrupt driven I/O
R Direct Memory Access (DMA)
The quantity of data transacted by rst two cases is comparatively lesser than that by the third method,
i.e., DMA, which we have discussed in Chapter 7.
In programmed I/O, the processor knows when to transmit, but generally has no idea when to receive
the data from the external source and, therefore, sometimes the processor waits for data reception. It is
dif cult to place an example of programmed I/O for modern computers as in most of the cases its I/O
transactions are interrupt-driven. In interrupt driven I/O, the transaction begins with an interrupt from
the peripheral device, which receives or transmits data from or to the host (processor). Both of these
types of transactions are controlled by the processor of the host. In the third case, the processor of the
host temporarily lends the system bus to the DMA controller, which takes care of the mass data transac-
tion between a peripheral device and the memory of the host (computer).
Can DMA be taken as a special type of interrupt? Consider the case of 8085 microprocessor,
where a HOLD request (generated for a DMA) is assigned a higher priority than that of TRAP,
the external interrupt with the highest priority.
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