Index
Note: Page numbers followed by f indicate figures and t indicate tables.
A
Abstract Interpretation 275
Advanced Data Encryption Scheme (AES) 509
Aeronautical engineering 2
Aerospace DO-178B standard 323
Agile development process 48
ART Flow 76–77
daily Scrum 69
detailed thinkers 68
feature writing, decomposition, and grooming 67–68
release demo 69–70
sprint backlog grooming 68–69
sprint demo 69
sprint retro 70
team meetings 68
definition 52–53
design cycle 52
life cycle tooling 65
management program 65
Waterfall process documentation 65
Wiki-type tools 66
flow 67
organization’s roles See Organization’s roles
program management 63
project plan 62–63
quarterly release planning 63–64
sprint planning 64
system-of-systems approach 52
“unplanned” work flavors 64
upstream and downstream functional flows 52
user scenarios and activities 63
Amazon Web Services (AWS) 239
Android 225–226
Application Layer Gateways 432
Application programming interfaces (APIs) 206
ARM TrustZone technology 530
Artificial intelligence (AI) See Machine learning (ML)
Asymmetric cryptography 509
Asynchronous real-time events 17
Automatic static analysis 50
Automobile antilock braking system 7
B
Bagging 571
Berkley Packet Filter (BPF) 446
Big data 494–495
Binary semaphores 187
Binary trees 569
Black box testing 50
Block ciphers 508–509
Boosting, decision tree 571
BPF See Berkley Packet Filter (BPF)
Brute-force attack 507–508
C
CASE tools See Computer-aided software engineering (CASE) tools
Certification killers 396–397
Chemical engineering 2
Civil engineering 2
definition 181
hardware timer 181
low-power applications 181
Cloud-computing development 497–498
Cloud-computing nodes 484
CM system See Configuration management (CM) system
CNNs See Convolutional neural networks (CNNs)
Caveat Emptor 262–263
compilation process 259
compiler flags and flag mining 259–260
Freescale Semiconductor 261
premium- encoded instruction 261
reduced-footprint premium encoding 261
target architectures 260
variable-length instruction encoding 260–261
code whitespace 140–141
Motor Industry Software Reliability Association (MISRA-C) 140
personal preference 139–140
source alignment 141
source files 141
Computer-aided software engineering (CASE) tools 34
Conceptual thinkers 56–57
Conditional compilation 148–149
Configuration management (CM) system 136
code 170
execution time 173
interrupt stack pointer points 171
ISR stack 170–171
process 169
task stack pointer points 171
Convolutional neural networks (CNNs) 572
advantage 580
definition 581
transfer learning 592
CRC See Cyclic redundancy check (CRC)
algorithms, types 508
asymmetric cryptography 509
brute-force attack 507–508
hash functions 509
implementation 510
algorithm registration interface 512
dynamic algorithm loader 512
random number generator (RNG) 509–510
block ciphers 508–509
key distribution 508
stream ciphers 508
Cyclic redundancy check (CRC) 396
D
DAG See Directed acyclic graph (DAG)
Daily Scrum 69
application-specific domains 495
Big data 494–495
sensor collection 494–495
Data augmentation 560–561
Data Encryption Scheme (DES) 508
encryption key protection 543
definition 544
IPSec 544–545
security services 544
SSL/TLS 545
definition 542
directory/file level encryption/authentication 543
data alignment 266
data types selection 267
instruction sets 263
padding elements 266–267
format 265
legacy code 265–266
Decision tree 570f
bagging 571
benefit 569–570
binary trees 569
boosting 571
disadvantage 570
ensemble learning 570
graph theory 569
Deep-learning frameworks 593–594
DES See Data Encryption Scheme (DES)
compiler configuration 247–248
embedded applications 246
features 246
peripheral applications 249
Device-computing nodes 485–486
Device-to-device communications 487–489
definition 487
Discretionary Access Control (DAC) 534–535
DPDK See Data Path Development Kit (DPDK)
Drug and Device Accountability Act 303
Dynamic algorithm loader 512
integration testing 293
module test 293
quick fix solution 278
Dynamic messaging subsystem interfaces 40–41
E
Edge learning/training 598–599
Edge routing 429
Electrical engineering 2
Embedded device development 498
Application Layer Gateways 432
edge routing 429
ethtool 432–433
Firewalls 432
Hub 431
ifconfig 433–434
IoT domain 429
IP address 431–432
nettools package 434
open-source utilities 432
requirement 428
Routers 431–432
Switch 431
tcpdump 435
wireshark 435
analog I/O 8
definition 7
emulation and diagnostics 9
HALs See Hardware abstraction layers (HALs)
hardware acceleration 9
hardware and software components 8
processor core 8
reactive systems See Reactive systems
sensors and actuators 8
software 9
advantages 22
relocation process 22
source code 22
user interfaces 9
volatile and nonvolatile memory 9
Engineering, definition 2
Ensemble learning, decision tree 570
Ethtool 432–433
F
data architecture model 473
factors 475
overhead crane 473–474
Failure mode and effects analysis (FMEA) 401
avoidance 403–404
prediction 405
removal 404
tolerance 404
types 403
File-scope variables 145–146
Firewalls 432
Fog/edge-computing nodes 484–485
FPU registers See Floating-point unit (FPU) registers
add-on software products 243
Amazon Web Services (AWS) 239
debugging 243
debugging 242
IPC and synchronizations 242
low power 241–242
memory management 243
licensing 239
portability 240–241
real-time kernel 239
SAFERTOS 239
support 243
supported architectures 240
G
Global variables 143–145
Graph theory 569
H
HALs See Hardware abstraction layers (HALs)
characteristics 16
computing system 16
deadline first algorithm 17
feasibility and costs 16
monotonic algorithms 17
Nyquist 15
resource allocation 17
sampling period 15
scheduling algorithms 17
signal sample 16
timeliness 16
code compliant creation 29
real-time operating system (RTOS) 28
DSPLIB documentation 94–95
FIR algorithm component 93–94
I/O interface 95–96
sampling frequency 95
Hash functions 509
fail-safe 405
subsystem design 405–406
Hub 431
I
IEC 62304 standard 303
Integration testing 50
factory automation 472–475
market segments 472
rail transportation 475–479
applications 483
cloud-computing nodes 484
device-computing nodes 485–486
fog/edge-computing nodes 484–485
disadvantages 469
fog-oriented architectures 469–470
RFID-enabled device 468
cloud-based fitness server 467–468
device-to-device communications 487–489
factors 486
multiple technologies 486
application-specific domains 495
Big data 494–495
sensor collection 494–495
definition 466
development 496
cloud-computing development 497–498
embedded device development 498
mobile app developer 497
silos integration 499
power storage 483
relay node 466
“smart” device 466
asynchronous event 173
“global” interrupts 174
ISR epilog 176
models 174
worst-case interrupt stack 175–176
disabling interrupts 173
interrupt vectors 180–181
ISR process 173
microprocessors 173
recovery 173
response 173
task latency 173
“while” loop 180
Interrupt nesting 166
Interrupt recovery 173
Interrupt response 173
Interrupt service routines (ISRs) 155
Isochronous real-time events 17
ASILs levels 306
demands 306
E/E/PE systems 306
objectives 307–308
automotive-embedded applications 311
functional safety 311–312
safety-critical system development 311
sound development process 311
K
Kerckhoffs’s principle 508
blocks and control flow branches 286–287
control flow graphs 287
cyclomatic complexity value 289
dynamic flow graphs 287
knots value 287
modified static flow graph 290
static flow graphs 287
L
Linaro 225
Linux See also Networking software
acceptance of 209
communication protocol stack 219
components 217
hardware components 216
interrupt 218–219
memory management 219
object-oriented languages 216
privileged mode 216–217
schedulers 218
unprivileged mode 217
user interface (UI) 219–220
free of cost 213
no “vendor lock-in” 214–215
software driver and Linux kernel version 215–216
software maintenance 215
software releases, product shipping 215
stable operating system 215
time to market 214
boot performance 222
buffers 223
core affinity 222
interrupt coalescing 222–223
latencies 224
low memory footprint 221
user space drivers 223–224
desktop operating systems 208–209
Android 225–226
community releases 224
Linaro 225
Linux Foundation 225
long-term support (LTS) 225
Ubuntu 226
versions 225
and embedded systems 209–210
complete network stack solution 211
CPU architectures 211
debuggability 213
endianness 213
peripheral devices 211
portability 210–211
POSIX compliance 211
security 212
task schedulers 212
user space drivers 212–213
GNU General Public License (GPL) 229–230
kernel compilation 220
applications 220
Yocto 220–221
Linux Unified Key Setup (LUKS) 543
Local variables 146
Lock mechanism 187
multi-ALU processors 256
multisampling 257–258
advantages 603
application peripheral interface (API) 607
configuration 605
EEMBC benchmark 603
“heap deallocation” loop 608–609
microbenchmarks 604
MIMXRT1050-EVK board 607
mutex lock and unlock 612–613
performance analysis 603
partial summation 258
software pipelining 258–259
Low-Power Timer (LPTMR) 123
application 127
interrupt handler routine 125–126
program debugging 128
LUKS See Linux Unified Key Setup (LUKS)
M
MAC See Mandatory Access Control (MAC)
architecture design 597–598
artificial intelligence (AI) 551–552
binary classification 553–554
coding 550–551
computational resources 594
data 557
augmentation 560–561
classification algorithm 563
grooming 558
preparation 558
preprocessing 558
probability theory and statistics 557
training/test 558–559
validation data split 558–559
decision tree 570f
bagging 571
benefit 569–570
binary trees 569
boosting 571
disadvantage 570
ensemble learning 570
graph theory 569
definition 552
edge learning/training 598–599
low-rank factorization 596–597
memory footprint 594
multiclass classification 554
multilabel classification 554
neural networks (NNs) 551
classifications 572
CNNs See Convolutional neural networks (CNNs)
deep-learning frameworks 593–594
pruning 595–596
synapses 573–574
power efficiency 594
quantization 594–595
regularization techniques 555
semisupervised learning 553
supervised learning 553
code sample 566
quadratic programming 565
training criteria 564
unsupervised learning 553
Maintenance costs 3–4
Mandatory Access Control (MAC) 534–535
Market Functional Requirements (MFRs) 60
Measured boot 532–533
Mechanical engineering 2
global variables 199–200
intertask communication 199
messages 200–201
Message Passing Interface (MPI) 361
blocked work 78
life cycle cost estimation 78–79
micromanagement 79
size estimation 78
spanning work items 78
statistical process control 78–79
and tooling 81–82
unorganized data 79–80
unplanned work 78
Microcontrollers 427
Minimal viable product (MVP) 53–54
ML See Machine learning (ML)
Motor Industry Software Reliability Association (MISRA-C) 140
MPI See Message Passing Interface (MPI)
algorithm 340
code segments 355
data locality 354
data reuse 352
architectural styles 340
code optimization 382
exploration 382
results 387–388
loops 380
multithreading method 378
runtime system 381
specification 379
parallelism See Parallelism, multicore processor system
communication latencies 372–373
concurrency abstractions 376–378
latency-oriented core 363
load balancing (SMP Linux) and scheduling 366–367
synchronization barrier 372
thread count management 374–375
control 360
data 360
factors 361
Message Passing Interface (MPI) 361
shared memory 361
synchronization 360–361
requirements 381
sequential analysis 381
types 340
algorithmic components selection 98
high-level language 96–97
estimation results 96
DSPLIB documentation 94–95
FIR algorithm component 93–94
I/O interface 95–96
sampling frequency 95
implementation and analysis 89–90
informed decision making 90
optimization 90–91
batch and buffer 99–100
code and data placement 99
code size 99
coprocessors 99
direct memory access 99
interrupt driven design 99
over calculation 99
software architecture 98–99
speed and idle modes 99
voltage and frequency 100
processing components 92–93
system performance 93
centralized resource allocation and management 24
hardware processing elements 24
load distribution 24
processor interfaces 24
system initialization 24
MVP See Minimal viable product (MVP)
N
NATO conference 3
Nettools package 434
autonomous packet 428
Application Layer Gateways 432
edge routing 429
ethtool 432–433
Firewalls 432
Hub 431
ifconfig 433–434
IoT domain 429
IP address 431–432
nettools package 434
open-source utilities 432
requirement 428
Routers 431–432
Switch 431
tcpdump 435
wireshark 435
Berkley Packet Filter (BPF) 446
compliance and quality assurance 436
network stack 436
polling/events 440
protocols and devices 436
stack unsuitability 437
virtual I/O layer and HugePages 439–440
low-end single-core network processors 448
implementation 449–450
resource utilization 457–458
ultra-low-end microcontrollers 448
implementation 449–450
resource utilization 457–458
Neural networks (NNs) 551
classifications 572
CNNs See Convolutional neural networks (CNNs)
deep-learning frameworks 593–594
pruning 595–596
synapses 573–574
Next Generation Firewalls 432
NNs See Neural networks (NNs)
Nuclear engineering 2
NXP KW41Z512VHT4 System on Chip (SoC) device 102–103
advantages 603
application peripheral interface (API) 607
configuration 605
EEMBC benchmark 603
“heap deallocation” loop 608–609
microbenchmarks 604
MIMXRT1050-EVK board 607
mutex lock and unlock 612–613
performance analysis 603
O
aerospace DO-178B standard 323
application 322
industry standards 322–323
applications 331
automated OCV solutions 330
basic block 325
compiler/assembler code 326–327
DO-178C standard 327
source code 324
source code coverage 329–330
unit level 330–331
requirements traceability 322
software certification 322–323
benefits 43
class identification 45
class variable 43
object variable 43
types 43
OCV See Object code verification (OCV)
loops 380
multithreading method 378
runtime system 381
specification 379
FreeRTOS See FreeRTOS
Linux See Linux
U-Boot See U-Boot
application programming interfaces (APIs) 206
definition 181
hardware timer 181
low-power applications 181
code 170
execution time 173
interrupt stack pointer points 171
ISR stack 170–171
process 169
task stack pointer points 171
embedded systems 154
hard real-time systems 154
interrupt management See Interrupt management
global variables 199–200
intertask communication 199
messages 200–201
central processing unit (CPU) 156
functions 156
multitasking 156
tasks and managing system resources 157
critical region 158
preemption lock 158
task management See Task management
critical section 185
semaphore See Semaphores
shared resource 184
round-robin scheduling 169
scheduling points 168–169
soft real-time systems 154
floating-point unit (FPU) registers 163
idle task 166
interrupt nesting 166
link map 164
priority levels 166–167
ready list 167
safety factor 164
ISR execution 196
cache accesses 255–256
C optimization techniques 250
data types 250
features 251
function inlining 256
memory alignment 252
memory contention 255
unaligned memory accesses 255
architect 57
conceptual thinkers 56–57
detailed thinkers 57
Market Functional Requirements (MFRs) 60
product managers 56
project leader/manager 57
proposal cycle testers 61
proposal sprinters 61–62
proposal thinkers 56
quality 61
safety engineer 59
Scrum Master 55–56
software developer 59
software tester 59
systems engineer 58
validation engineer 60
P
Pair programming approach 48
antidependencies 346–347
benefits 344
capacitance 343
execution time 350–351
granularity, types 351
instructions per cycle (IPC) 343
loop-carried dependence 346
output dependency 346
power 343
power comsumption 343
work 343
Performance testing 51
Periodic Interrupt Timer (PIT) 123
Periodic messaging subsystem interfaces 41
Periodic waveforms (PWM) 123
Physical tampering 520–521
PIT See Periodic Interrupt Timer (PIT)
Priority inversion 191
Program management 63
characteristics 134
embedded system, definition 134–135
hardware features 135
performance 135
resources 135
hardware platform input 136
project files/organization 136–138
safety requirements, source code 142–143
source code 135
syntax standard 139–141
team programming guidelines 138–139
maintainability 133
performance characteristics 132
readability 133
testability 133–134
maintainability and project length 132
programmer experience and background 132
project size 131–132
safety-critical code development 132
syntax-oriented approach 131
variable structure See Variable structure
control 360
data 360
factors 361
Message Passing Interface (MPI) 361
shared memory 361
synchronization 360–361
“bare metal” designs 102
“behind the scenes” actions 102
file saving 119
project and source folder expansion 117
application 127
interrupt handler routine 125–126
program debugging 128
NXP KW41Z512VHT4 System on Chip (SoC) device 102–103
onboard JTAG debugging interface 102–103
operating system 101–102
high-level library routines 120–122
implementations 119
interrupt-driven mode 119
logic levels 119–120
program debugging 122–123
cross-development tools 103
download and installation 105
target system configuration See Target system configuration
compiler/debugger/linker suite 136
configuration management (CM) system 136
compiler/linker toolsets 138
third parties 137–138
company libraries 137
in local 137
team preference/file organization 136
Project kickoff meeting 37
assessment communication 398
assessor’s role 398
built-in-test (BIT) capability 400
certification basis 398
certification block diagram 399
certification plan 401
communication integrity objectives 399
documents and artifacts 400–401
fault annunciation coverage 400
feasibility 397
“fit and purpose,” product 398–399
independent assessor 397–398
integrity level 400
Interface Control Document 399
labor-intensive analysis 401
project certification scope 397
reliance and expectation, operator/user 400
residual activity 401
safety-defensive strategies 399
user-level documentation 401
Proposal cycle testers 61
Proposal sprinters 61–62
Proposal thinkers 56
Pruning neural networks 595–596
PWM See Periodic waveforms (PWM)
R
factors 478–479
intermodal containers 475–476
subnetworks 476
Random number generator (RNG) 509–510
Rate monotonic scheduling (RMS) 162
application 11–12
application specific 11–12
characteristics 10–11
control 11
monitoring 10–11
multirate 11–12
processing information 11
real time 11–12
resource constrained 11–12
tire-pressure monitoring system (TPMS) 9–10
automobile motor, electronic injector control 46
C++ programming language 47
dataflow diagrams 46
microcontrollers 47
“soft” system 46
system constraints 46
asynchronous 17
efficiency 18
isochronous 17
offline scheduling 17–18
resource allocation 17–18
resource management 18–19
synchronous 17
central processing unit (CPU) 156
functions 156
multitasking 156
tasks and managing system resources 157
Real-time operating system (RTOS) 28
critical region 158
preemption lock 158
task management See Task management
characteristics 19
failures detection and overcome 20–21
response time 19–20
Receive Flow Steering (RFS) 457
Receive Packet Steering (RPS) 457
Reentrant function 161
Relay node 466
Release demo 69–70
Release testing 50–51
host-based verification 283
principles 282
target-based verification 283
critical section 185
semaphore See Semaphores
shared resource 184
RMS See Rate monotonic scheduling (RMS)
RNNs See Recurrent neural networks (RNNs)
applications 220
Yocto 220–221
Root of trust 531–532
Round-robin scheduling 169
Routers 431–432
RTOS See Real-time operating system (RTOS)
S
automotive-embedded applications 311
functional safety 311–312
safety-critical system development 311
sound development process 311
SAFERTOS 239
availability 403
certification killers 396–397
avoidance 403–404
prediction 405
removal 404
tolerance 404
types 403
fail-safe 405
subsystem design 405–406
assessment communication 398
assessor’s role 398
built-in-test (BIT) capability 400
certification basis 398
certification block diagram 399
certification plan 401
communication integrity objectives 399
documents and artifacts 400–401
fault annunciation coverage 400
feasibility 397
“fit and purpose,” product 398–399
independent assessor 397–398
integrity level 400
Interface Control Document 399
labor-intensive analysis 401
project certification scope 397
reliance and expectation, operator/user 400
residual activity 401
safety-defensive strategies 399
user-level documentation 401
reliability 403
requirements 395–396
risk analysis 407–408
code sections marking 416–417
coding standards 412–414
“dead” code removal 424–425
execution order 420–421
input data 414–415
nonvolatile data checking 422–423
permissive state forces 420
specific variable value checking 415–416
stale data 417–418
static code analysis 425–426
system running 423–424
timing execution checking 417
unused memory 425
volatile data checking 421–422
standards 394
SCAs See Side-channel attacks (SCAs)
Scheduling algorithms 17
SDKs See Software development kits (SDKs)
Secure element (SE) 529
access control 534–535
attacker’s ability, mitigation 530
authenticity 537–538
data security See Data security
execution 540–542
measured boot 532–533
operating system 533–534
root of trust 531–532
TPM 533
Trustworthy Embedded System 530
definitions 501
embedded security 502
systems complexity 502–503
embedded system 502
design and development phase 514
software development life cycle (SDLC) See Software development life cycle (SDLC)
threat analysis 514
definition 503
information flow 504
physical security 505
attack vectors 520–525
Bound Check Bypass 526
branch target injection 527
identification 518–519
Meltdown attack 525–526
mitigation strategy 519
modeling 519
threat matrix 519
ASCII 188–189
binary semaphores 187
buffer manager 189–190
lock mechanism 187
mutual exclusion 186–187
priority inversion 191
shared data structures 190
types 187
Semisupervised learning 553
Shared memory 361
Side-channel attacks (SCAs) 521–522
SIL See Software integrity level (SIL)
data alignment 266
data types selection 267
instruction sets 263
padding elements 266–267
“Smart” device 466
SMP See Symmetric multiprocessing (SMP)
Soft real-time systems 154
Software developer 59
cross-development tools 103
download and installation 105
I/O helper routines 116
design 515
peer reviews 517
secure coding guidelines 515–517
static analysis 517
testing and verification 518
architecture/design 5
implementation 5–6
problem definition 4–5
software components 6
verification and validation (V&V) 6
Agile development process See Agile development process
availability 42
factors 39
operating performance 40–41
performance-critical dataflows 40
reliability 42
safety-critical elements 40
security 41
computer-aided software engineering (CASE) tools 34
logical data/object flows 42
fluid/ad hoc process 34–35
implementation 48
programming languages 34
project kickoff meeting 37
project planning 35–36
requirements 34
definition 37–38
operation and functioning 38
system requirements 39
user requirements 38–39
risk analysis 36–37
risk classification 36
risk mitigation 37
automatic static analysis 50
integration testing 50
performance testing 51
release testing 50–51
software inspection 49
types 49
validation 49
verification 49
code sections marking 416–417
coding standards 412–414
“dead” code removal 424–425
execution order 420–421
input data 414–415
nonvolatile data checking 422–423
permissive state forces 420
specific variable value checking 415–416
stale data 417–418
static code analysis 425–426
system running 423–424
timing execution checking 417
unused memory 425
volatile data checking 421–422
Software inspection 49
Software integrity level (SIL) 271
call graphs 320
code coverage 320–321
code review analysis 320
coding standards 319
dangers of 319–320
flow graphs 320
functionality 321–322
static and dynamic analysis 320–322
structure and modularity 321
Software production 3–4
Software systems 2
devices 2
properties 2
automated code review 280
automatically generating test cases 300–302
configuration management and process 280
decisions 272–273
definition 270
integration testing 293
module test 293
quick fix solution 278
dynamic testing 271
high-integrity systems 292
quality metrics 270
quantification 270
regression testing 300
host-based verification 283
principles 282
target-based verification 283
risk outcomes 271
safety- and security-critical standards 281
software integrity level (SIL) 271
source code 270–271
array-out-of-bounds error 285
code review 274
dynamic behavior prediction 275–276
GCC/Microsoft Visual Studio 285
International Obfuscated C Code Contest 283
knots and cyclomatic complexity See Knots and cyclomatic complexity
peer review team 286
theorem proving 274–275
test-driven development (TDD) 300
validation and verification tasks 278
Software tester 59
SOUP See Software of unknown pedigree (SOUP)
Sprint backlog grooming 68–69
Sprint demo 69
Sprint retro 70
floating-point unit (FPU) registers 163
idle task 166
interrupt nesting 166
link map 164
priority levels 166–167
ready list 167
safety factor 164
autogenerated code 315–318
autonomous vehicles 302
Drug and Device Accountability Act 303
gap analysis 305
IEC 62304 303
ISO 26262 recognized process standard 305–308
risk-based approach 304
technical safety requirements 304
coding rule set 313
legacy code base 313–314
requirements traceability matrix (RTM) 312–313
software of unknown pedigree (SOUP) See Software of unknown pedigree (SOUP)
software test tools 318
aerospace DO-178B standard 323
application 322
industry standards 322–323
requirements traceability 322
software certification 322–323
process/coding standards 312
software development quality 302
terminology 303
software development life cycle (SDLC) 517
array-out-of-bounds error 285
code review 274
dynamic behavior prediction 275–276
GCC/Microsoft Visual Studio 285
International Obfuscated C Code Contest 283
knots and cyclomatic complexity See Knots and cyclomatic complexity
peer review team 286
theorem proving 274–275
code 578
Stream ciphers 508
Supervised learning 553
code sample 566
quadratic programming 565
training criteria 564
block ciphers 508–509
key distribution 508
stream ciphers 508
Synchronous real-time events 17
Systems engineer 58
T
initialization 113–115
SDK I/O helper routines 116
“C” programing language 111
factors 107–109
NXP SDK boot code 110
Task Control Block (TCB) 159
Task latency 173
central processing unit (CPU) 158
C function 160
design process 158
Ethernet controller 161–162
infinite loop 160–161
kernel’s services 158
multitasking 158
parameters 159
reentrant function 161
run-to-completion loop 160
signaling and message-passing mechanisms 161–162
“sleep”/“time delay” services 161
Task Control Block (TCB) 159
types 160
TCB See Task Control Block (TCB)
TCG See Trusted Computing Group (TCG)
Tcpdump 435
TDD See Test-driven development (TDD)
Team meetings 68
TensorFlow (TF) 593
Test-driven development (TDD) 300
automated code review 333
client organizations 332
robustness testing 333–334
unit test 334–335
tools 335
“V” development model 332
Thread count management 374–375
attack vectors 520–525
classification 520
physical tampering 520–521
side-channel attacks (SCAs) 521–522
timing attacks 522–523
Bound Check Bypass 526
branch target injection 527
identification 518–519
Meltdown attack 525–526
mitigation strategy 519
modeling 519
threat matrix 519
Timer/PWM Module (TPM) 123
Timing attacks 522–523
Tire-pressure monitoring system (TPMS) 9–10
TLS See Transport Layer Security (TLS)
“Toy” applications 3
Transport Layer Security (TLS) 545
Trusted Computing Group (TCG) 528
ARM TrustZone technology 530
secure element (SE) 529
Trustworthy Embedded System 530
U
types 234
boot loader 230
code and directory organization 233
autoboot process 232
environment variables 231
multiple boot source support 230–231
operating system boot commands 232
“sandbox” architecture 232
scripts 231
shell (user interface) 231
stand-alone applications 232
licensing 238–239
nonvolatile memory 230
open-source community 238
secure boot/chain-of-trust boot 237
“shell”-like interface 230
supported architectures and operating systems 238
Ubuntu 226
application and test environment 295
dynamic flow graph 296
“track” execution 296
test-driven development (TDD) 300
Unsupervised learning 553
V
Validation engineer 60
Variable-length instruction encoding 260–261
conditional compilation 148–149
data types 147–148
components 143
file-scope variables 145–146
global variables 143–145
local variables 146
types 143
#define 149–151
Virtual I/O layer and HugePages 439–440
W
Waterfall design 54
Wireshark 435
X
XDP See eXpress Data Path (XDP)
Z
advantages 603
application peripheral interface (API) 607
configuration 605
EEMBC benchmark 603
“heap deallocation” loop 608–609
microbenchmarks 604
MIMXRT1050-EVK board 607
mutex lock and unlock 612–613
performance analysis 603
..................Content has been hidden....................
You can't read the all page of ebook, please click here login for view all page.