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## Chapter 6. Mixers

In this chapter, our study of building blocks focuses on downconversion and upconversion mixers, which appear in the receive path and the transmit path, respectively. While a decade ago, most mixers were realized as a Gilbert cell, many more variants have recently been introduced to satisfy the specific demands of different RX or TX architectures. In other words, a stand-alone mixer design is no longer meaningful because its ultimate performance heavily depends on the circuits surrounding it. The outline of the chapter is shown below.

### 6.1 General Considerations

Mixers perform frequency translation by multiplying two waveforms (and possibly their harmonics). As such, mixers have three distinctly different ports. Figure 6.1 shows a generic transceiver environment in which mixers are used. In the receive path, the down-conversion mixer senses the RF signal at its “RF port” and the local oscillator waveform at its “LO port.” The output is called the “IF port” in a heterodyne RX or the “baseband port” in a direct-conversion RX. Similarly, in the transmit path, the upconversion mixer input sensing the IF or the baseband signal is called the IF port or the baseband port, and the output port is called the RF port. The input driven by the LO is called the LO port.

Figure 6.1 Role of mixers in a generic transceiver.

How linear should each input port of a mixer be? A mixer can simply be realized as depicted in Fig. 6.2(a), where VLO turns the switch on and off, yielding VIF = VRF or VIF = 0. As explained in Chapter 2, with abrupt switching, the operation can be viewed as multiplication of the RF input by a square wave toggling between 0 and 1, even if VLO itself is a sinusoid. Thus, as illustrated in Fig. 6.2(b), the circuit mixes the RF input with all of the LO harmonics, producing what we called “mixing spurs” in Chapter 4. In other words, the LO port of this mixer is very nonlinear. The RF port, of course, must remain sufficiently linear to satisfy the compression and/or intermodulation requirements.

Figure 6.2 (a) Mixer using an ideal switch, (b) input and output spectra.

The reader may wonder if the LO port of mixers can be linearized so as to avoid mixing with the LO harmonics. As seen later in this chapter, mixers suffer from a lower gain and higher noise as the switching in the LO port becomes less abrupt. We therefore design mixers and LO swings to ensure abrupt switching and deal with mixing spurs at the architecture level (Chapter 4).

#### 6.1.1 Performance Parameters

Let us now consider mixer performance parameters and their role in a transceiver.

##### Noise and Linearity

In a receive chain, the input noise of the mixer following the LNA is divided by the LNA gain when referred to the RX input. Similarly, the IP3 of the mixer is scaled down by the LNA gain. (Recall from Chapter 5 that the mixer noise and IP3 are divided by different gains.) The design of downconversion mixers therefore entails a compromise between the noise figure and the IP3 (or P1dB). Also, the designs of the LNA and the mixer are inextricably linked, requiring that the cascade be designed as one entity.

Where in the design space do we begin then? Since the noise figure of mixers is rarely less than 8 dB, we typically allocate a gain of 10 to 15 dB to the LNA and proceed with the design of the mixer, seeking to maximize its linearity while not raising its NF. If the resulting mixer design is not satisfactory, some iteration becomes necessary. For example, we may decide to further linearize the mixer even if the NF increases and compensate for the higher noise by raising the LNA gain. We elaborate on these points in various design examples in this chapter.

In direct-conversion receivers, the IP2 of the LNA/mixer cascade must be maximized. In Section 6.4, we introduce methods of raising the IP2 in mixers. Also, as mentioned in Chapter 4, the mixing spurs due to the LO harmonics become important in broadband receivers.

For upconversion mixers, the noise proves somewhat critical only if the TX output noise in the RX band must be very small (Chapter 4), but even such cases demand more relaxed mixer noise performance than receivers do. The linearity of upconversion mixers is specified by the type of modulation and the baseband signal swings.

##### Gain

Downconversion mixers must provide sufficient gain to adequately suppress the noise contributed by subsequent stages. However, low supply voltages make it difficult to achieve a gain of more than roughly 10 dB while retaining linearity. Thus, the noise of stages following the mixer still proves critical.

In direct-conversion transmitters, it is desirable to maximize the gain and hence the output swings of upconversion mixers, thereby relaxing the gain required of the power amplifier. In two-step transmitters, on the other hand, the IF mixers must provide only a moderate gain so as to avoid compressing the RF mixer.

The gain of mixers must be carefully defined to avoid confusion. The “voltage conversion gain” of a downconversion mixer is given by the ratio of the rms voltage of the IF signal to the rms voltage of the RF signal. Note that these two signals are centered around two different frequencies. The voltage conversion gain can be measured by applying a sinusoid at ωRF and finding the amplitude of the downconverted component at ωIF. For upconversion mixers, the voltage conversion gain is defined in a similar fashion but from the baseband or IF port to the RF port.

In traditional RF and microwave design, mixers are characterized by a “power conversion gain,” defined as the output signal power divided by the input signal power. But in modern RF design, we prefer to employ voltage quantities because the input impedances are mostly imaginary, making the use of power quantities difficult and unnecessary.

##### Port-to-Port Feedthrough

Owing to device capacitances, mixers suffer from unwanted coupling (feedthrough) from one port to another [Fig. 6.3(a)]. For example, if the mixer is realized by a MOSFET [Fig. 6.3(b)], then the gate-source and gate-drain capacitances create feedthrough from the LO port to the RF and IF ports.

Figure 6.3 (a) Feedthrough mechanisms in a mixer, (b) feedthrough paths in a MOS mixer.

The effect of mixer port-to-port feedthrough on the performance depends on the architecture. Consider the direct-conversion receiver shown in Fig. 6.4. As explained in Chapter 4, the LO-RF feedthrough proves undesirable as it produces both offsets in the baseband and LO radiation from the antenna. Interestingly, this feedthrough is entirely determined by the symmetry of the mixer circuit and LO waveforms (Section 6.2.2). The LO-IF feedthrough is benign because it is heavily suppressed by the baseband low-pass filter(s).

Figure 6.4 Effect of LO-RF feedthrough.

Consider the mixer shown in Fig. 6.5, where VLO = V1 cos ωLOt + V0 and CGS denotes the gate-source overlap capacitance of M1. Neglecting the on-resistance of M1 and assuming abrupt switching, determine the dc offset at the output for RS = 0 and RS > 0. Assume RL RS.

Figure 6.5 LO-RF feedthrough in a MOS device operating as a mixer.

#### Solution:

The LO leakage to node X is expressed as

(6.1)

because even when M1 is on, node X sees a resistance of approximately RS to ground. With abrupt switching, this voltage is multiplied by a square wave toggling between 0 and 1. The output dc offset results from the mixing of VX and the first harmonic of the square wave. Exhibiting a magnitude of 2 sin(π/2)/π = 2/π, this harmonic can be expressed as (2/π) cos ωLOt, yielding

(6.2)-(6.3)

where φ = (π/2) − tan−1(RSCGSωLO). The dc component is therefore equal to

(6.4)

As expected, the output dc offset vanishes if RS = 0.

The generation of dc offsets can also be seen intuitively. Suppose, as shown in Fig. 6.6, the RF input is a sinusoid having the same frequency as the LO. Then, each time the switch turns on, the same portion of the input waveform appears at the output, producing a certain average.

Figure 6.6 Offset generated by LO leakage.

The RF-LO and RF-IF feedthroughs also prove problematic in direct-conversion receivers. As shown in Fig. 6.7, a large in-band interferer can couple to the LO and injection-pull it (Chapter 8), thereby corrupting the LO spectrum. To avoid this effect, a buffer is typically interposed between the LO and the mixer. Also, as explained in Chapter 4, the RF-IF feedthrough corrupts the baseband signal by the beat component resulting from even-order distortion in the RF path. (This phenomenon is characterized by the IP2.)

Figure 6.7 Effect of RF-LO feedthrough in a direct-conversion receiver.

Now, consider the heterodyne RX depicted in Fig. 6.8. Here, the LO-RF feedthrough is relatively unimportant because (1) the LO leakage falls outside the band and is attenuated by the selectivity of the LNA, the front-end band-select filter, and the antenna; and (2) the dc offset appearing at the output of the RF mixer can be removed by a high-pass filter. The LO-IF feedthrough, on the other hand, becomes serious if ωIF and ωLO are too close to allow filtering of the latter. The LO feedthrough may then desensitize the IF mixers if its level is comparable with their 1-dB compression point.

Figure 6.8 Effect of LO feedthrough in a heterodyne RX.

Shown in Fig. 6.9 is a receiver architecture wherein ωLO = ωRF/2 so that the RF channel is translated to an IF of ωRFωLO = ωLO and subsequently to zero. Study the effect of port-to-port feedthroughs in this architecture.

Figure 6.9 Half-RF RX architecture.

#### Solution:

For the RF mixer, the LO-RF feedthrough is unimportant as it lies at ωRF/2 and is suppressed. Also, the RF-LO feedthrough is not critical because in-band interferers are far from the LO frequency, creating little injection pulling. (Interferers near the LO frequency are attenuated by the front end before reaching the mixer.) The RF-IF feedthrough proves benign because low-frequency beat components appearing at the RF port can be removed by high-pass filtering.

The most critical feedthrough in this architecture is that from the LO port to the IF port of the RF mixer. Since ωIF = ωLO, this leakage lies in the center of the IF channel, potentially desensitizing the IF mixers (and producing dc offsets in the baseband). Thus, the RF mixer must be designed for minimal LO-IF feedthrough (Section 6.1.3).

The IF mixers also suffer from port-to-port feedthroughs. Resembling a direct-conversion receiver, this section of the architecture follows the observations made for the topologies in Figs. 6.4 and 6.7.

The port-to-port feedthroughs of upconversion mixers are less critical, except for the LO-RF component. As explained in Chapter 4, the LO (or carrier) feedthrough corrupts the transmitted signal constellation and must be minimized.

#### 6.1.2 Mixer Noise Figures

The noise figure of downconversion mixers is often a source of great confusion. For simplicity, let us consider a noiseless mixer with unity gain. As shown in Fig. 6.10, the spectrum sensed by the RF port consists of a signal component and the thermal noise of RS in both the signal band and the image band. Upon downconversion, the signal, the noise in the signal band, and the noise in the image band are translated to ωIF. Thus, the output SNR is half the input SNR if the two noise components have equal powers, i.e., the mixer exhibits a flat frequency response at its input from the image band to the signal band. We therefore say the noise figure of a noiseless mixer is 3 dB. This quantity is called the “single-sideband” (SSB) noise figure to indicate that the desired signal resides on only one side of the LO frequency, a common case in heterodyne receivers.

Figure 6.10 SSB noise figure.

Now, consider the direct-conversion mixer shown in Fig. 6.11. In this case, only the noise in the signal band is translated to the baseband, thereby yielding equal input and output SNRs if the mixer is noiseless. The noise figure is thus equal to 0 dB. This quantity is called the “double-sideband” (DSB) noise figure to emphasize that the input signal resides on both sides of ωLO, a common situation in direct-conversion receivers.

Figure 6.11 DSB noise figure.

In summary, the SSB noise figure of a mixer is 3 dB higher than its DSB noise figure if the signal and image bands experience equal gains at the RF port of the mixer. Typical noise figure meters measure the DSB NF and predict the SSB value by simply adding 3 dB.

A student designs the heterodyne receiver of Fig. 6.12(a) for two cases: (1) ωLO1 is far from ωRF; (2) ωLO1 lies inside the band and so does the image. Study the noise behavior of the receiver in the two cases.

Figure 6.12 (a) Heterodyne RX, (b) downconversion of noise with image located out of band, (c) downconversion of noise with image located in band.

#### Solution:

In the first case, the selectivity of the antenna, the BPF, and the LNA suppresses the thermal noise in the image band. Of course, the RF mixer still folds its own noise. The overall behavior is illustrated in Fig. 6.12(b), where SA denotes the noise spectrum at the output of the LNA and Smix the noise in the input network of the mixer itself. Thus, the mixer downconverts three significant noise components to IF: the amplified noise of the antenna and the LNA around ωRF, its own noise around ωRF, and its image noise around ωim.

In the second case, the noise produced by the antenna, the BPF, and the LNA exhibits a flat spectrum from the image frequency to the signal frequency. As shown in Fig. 6.12(c), the RF mixer now downconverts four significant noise components to IF: the output noise of the LNA around ωRF and ωim, and the input noise of the mixer around ωRF and ωim. We therefore conclude that the noise figure of the second frequency plan is substantially higher than that of the first. In fact, if the noise contributed by the mixer is much less than that contributed by the LNA, the noise figure penalty reaches 3 dB. The low-IF receivers of Chapter 4, on the other hand, do not suffer from this drawback because they employ image rejection.

It is difficult to define a noise figure for receivers that translate the signal to a zero IF (even in a heterodyne system). To understand the issue, let us consider the direct-conversion topology shown in Fig. 6.13. We recognize that the noise observed in the I output consists of the amplified noise of the LNA plus the noise of the I mixer. (The mixer DSB NF is used here because the signal spectrum appears on both sides of ωLO.) Similarly, the noise in the Q output consists of the amplified noise of the LNA plus the noise of the Q mixer.

Figure 6.13 Direct-conversion RX for NF calculation.

But, how do we define the overall noise figure? Even though the system has two output ports, one may opt to define the NF with respect to only one,

(6.5)

where SNRI and SNRQ denote the SNRs measured at the I and Q outputs, respectively. Indeed, this is the most common NF definition for direct-conversion receivers. However, since the I and Q outputs are eventually combined (possibly in the digital domain), the SNR in the final combined output would serve as a more accurate measure of the noise performance. Unfortunately, the manner in which the outputs are combined depends on the modulation scheme, thus making it difficult to obtain the output SNR. For example, as described in Chapter 4, an FSK receiver may simply sample the binary levels in the I output by the data edges in the Q output, leading to a nonlinear combining of the baseband quadrature signals. For these reasons, the NF is usually obtained according to Eq. (6.5), a somewhat pessimistic value because the signal component in the other output is ignored. Ultimately, the sensitivity of the receiver is characterized by the bit error rate, thereby avoiding the NF ambiguity.

Consider the simple mixer shown in Fig. 6.14(a). Assuming RL RS and the LO has a 50% duty cycle, determine the output noise spectrum due to RS, i.e., assume RL is noiseless.

Figure 6.14 (a) Passive mixer, (b) input and output signals in time and frequency domains.

#### Solution:

Since Vout is equal to the noise of RS for half of the LO cycle and equal to zero for the other half, we expect the output power density to be simply equal to half of that of the input, i.e., . (This is the one-sided spectrum.) To prove this conjecture, we view Vn,out(t) as the product of Vn,RS(t) and a square wave toggling between 0 and 1. The output spectrum is thus obtained by convolving the spectra of the two [Fig. 6.14(b)]. It is important to note that the power spectral density of the square wave has a sinc2 envelope, exhibiting an impulse with an area of 0.52 at f = 0, two with an area of (1/π)2 at f = ±fLO, etc. The output spectrum consists of (a) 2kTRS × 0.52, (b) 2kTRS shifted to the right and to the left by ±fLO and multiplied by (1/π)2, (c) 2kTRS shifted to the right and to the left by ±3fLO and multiplied by [1/(3π)]2, etc. We therefore write

(6.6)-(6.7)

It can be proved that 1−2 + 3−2 + 5−2 + ... = π2/8. It follows that the two-sided output spectrum is equal to kTRS and hence the one-sided spectrum is given by

(6.8)

The above example leads to an important conclusion: if white noise is switched on and off with 50% duty cycle, then the resulting spectrum is still white but carries half the power. More generally, if white noise is turned on for ΔT seconds and off for T − ΔT seconds, then the resulting spectrum is still white and its power is scaled by ΔT/T. This result proves useful in the study of mixers and oscillators.

#### 6.1.3 Single-Balanced and Double-Balanced Mixers

The simple mixer of Fig. 6.2(a) and its realization in Fig. 6.3(b) operate with a single-ended RF input and a single-ended LO. Discarding the RF signal for half of the LO period, this topology is rarely used in modern RF design. Figure 6.15(a) depicts a more efficient approach whereby two switches are driven by differential LO phases, thus “commutating” the RF input to the two outputs. Called a “single-balanced” mixer because of the balanced LO waveforms, this configuration provides twice the conversion gain of the mixer of Fig. 6.2(a) (Section 6.2.1). Furthermore, the circuit naturally provides differential outputs even with a single-ended RF input, easing the design of subsequent stages. Also, as seen in Fig. 6.15(b), the LO-RF feedthrough at ωLO vanishes if the circuit is symmetric.1

Figure 6.15 (a) Single-balanced passive mixer, (b) implementation of (a).

The single-balanced mixer of Fig. 6.15(b) nonetheless suffers from significant LO-IF feedthrough. In particular, denoting the coupling of VLO to Vout1 by + αVLO and that from to Vout2 by −αVLO, we observe that Vout1Vout2 contains an LO leakage equal to 2αVLO. To eliminate this effect, we connect two single-balanced mixers such that their output LO feedthroughs cancel but their output signals do not. Shown in Fig. 6.16, such a topology introduces two opposing feedthroughs at each output, one from VLO and another from . The output signals remain intact because, when VLO is high, and , and when is high, and . That is, Vout1Vout2 is equal to for a high LO and for a low LO.

Figure 6.16 Double-balanced passive mixer.

Called a “double-balanced” mixer, the circuit of Fig. 6.16 operates with both balanced LO waveforms and balanced RF inputs. It is possible to apply a single-ended RF input (e.g., if the LNA is single-ended) while grounding the other, but at the cost of a higher input-referred noise.

##### Ideal LO Waveform

What is the “ideal” LO waveform, a sinusoid or a square wave? Since each LO in an RF transceiver drives a mixer,2 we note from the above observations that the LO waveform must ideally be a square wave to ensure abrupt switching and hence maximum conversion gain. For example, in the circuit of Fig. 6.16(b), if VLO and vary gradually, then they remain approximately equal for a substantial fraction of the period (Fig. 6.17). During this time, all four transistors are on, treating VRF as a common-mode input. That is, the input signal is “wasted” because it produces no differential component for roughly 2ΔT seconds each period. As explained later, the gradual edges may also raise the noise figure.

Figure 6.17 LO waveforms showing when the switches are on simultaneously.

At very high frequencies, the LO waveforms inevitably resemble sinusoids. We therefore choose a relatively large amplitude so as to obtain a high slew rate and ensure a minimum overlap time, ΔT.

Since mixers equivalently multiply the RF input by a square wave, they can down-convert interferers located at the LO harmonics, a serious issue in broadband receiver. For example, an interferer at 3fLO is attenuated by about only 10 dB as it appears in the baseband.

##### Passive and Active Mixers

Mixers can be broadly categorized into “passive” and “active” topologies; each can be realized as a single-balanced or a double-balanced circuit. We study these types in the following sections.

### 6.2 Passive Downconversion Mixers

The mixers illustrated in Figs. 6.15 and 6.16 exemplify passive topologies because their transistors do not operate as amplifying devices. We wish to determine the conversion gain, noise figure, and input impedance of a certain type of passive mixers. We first assume that the LO has a duty cycle of 50% and the RF input is driven by a voltage source.

#### 6.2.1 Gain

Let us begin with Fig. 6.18(a) and note that the input is multiplied by a square wave toggling between 0 and 1. The first harmonic of this waveform has a peak amplitude of 2/π and can be expressed as (2/π) cos ωLOt. In the frequency domain, this harmonic consists of two impulses at ±ωLO, each having an area of 1/π. Thus, as shown in Fig. 6.18(b), the convolution of an RF signal with these impulses creates the IF signal with a gain of 1/π (≈ −10 dB). The conversion gain is therefore equal to 1/π for abrupt LO switching. We call this topology a “return-to-zero” (RZ) mixer because the output falls to zero when the switch turns off.

Figure 6.18 (a) Input and output waveforms of a return-to-zero mixer, (b) corresponding spectra.

Explain why the mixer of Fig. 6.18 is ill-suited to direct-conversion receivers.

#### Solution:

Since the square wave toggling between 0 and 1 carries an average of 0.5, VRF itself also appears at the output with a conversion gain of 0.5. Thus, low-frequency beat components resulting from even-order distortion in the preceding stage directly go to the output, yielding a low IP2.

Determine the conversion gain if the circuit of Fig. 6.18(a) is converted to a single-balanced topology.

#### Solution:

As illustrated in Fig. 6.19, the second output is similar to the first but shifted by 180°. Thus, the differential output contains twice the amplitude of each single-ended output. The conversion gain is therefore equal to 2/π (≈ −4 dB). Providing differential outputs and twice the gain, this circuit is superior to the single-ended topology of Fig. 6.18(a).

Figure 6.19 Waveforms for passive mixer gain computation.

Determine the voltage conversion gain of a double-balanced version of the above topology [Fig. 6.20(a)]. (Decompose the differential output to return-to-zero waveforms.)

Figure 6.20 (a) Double-balanced passive mixer, (b) output waveforms.

#### Solution:

In this case, Vout1 is equal to for one half of the LO cycle and equal to for the other half, i.e., R1 and R2 can be omitted because the outputs do not “float.” From the waveforms shown in Fig. 6.20(b), we observe that Vout1Vout2 can be decomposed into two return-to-zero waveforms, each having a peak amplitude of 2V0 (why?). Since each of these waveforms generates an IF amplitude of (1/π)2V0 and since the outputs are 180° out of phase, we conclude that Vout1Vout2 contains an IF amplitude of (1/π)(4V0). Noting that the peak differential input is equal to 2V0, we conclude that the circuit provides a voltage conversion gain of 2/π, equal to that of the single-balanced counterpart.

The reader may wonder why resistor RL is used in the circuit of Fig. 6.18(a). What happens if the resistor is replaced with a capacitor, e.g., the input capacitance of the next stage? Depicted in Fig. 6.21(a) and called a “sampling” mixer or a “non-return-to-zero” (NRZ) mixer, such an arrangement operates as a sample-and-hold circuit and exhibits a higher gain because the output is held—rather than reset—when the switch turns off. In fact, the output waveform of Fig. 6.21(a) can be decomposed into two as shown in Fig. 6.21(b), where y1(t) is identical to the return-to-zero output in Fig. 6.18(a), and y2(t) denotes the additional output stored on the capacitor when S1 is off. We wish to compute the voltage conversion gain.

Figure 6.21 (a) Sampling mixer, (b) output waveform decomposition.

We first recall the following Fourier transform pairs:

(6.9)-(6.11)

where Π[t/(T/2) − 1/2] represents a square pulse with an amplitude of 1 between t = 0 and t = T/2 and zero elsewhere. The right-hand side of Eq. (6.11) can also be expressed as a sinc. Since y1(t) is equal to x(t) multiplied by a square wave toggling between zero and 1, and since such a square wave is equal to the convolution of a square pulse and a train of impulses [Fig. 6.22(a)], we have

(6.12)

Figure 6.22 (a) Decomposition of a square wave, (b) input and output spectra corresponding to y1(t).

where TLO denotes the LO period. It follows from Eqs. (6.9) and (6.11) that

(6.13)

Figure 6.22(b) shows the corresponding spectra. The component of interest in Y1(f) lies at the IF and is obtained by setting k to ±1:

(6.14)

The impulse, in essence, computes [1/()][1 − exp(−jωTLO/2)] at ±1/TLO, which amounts to ±TLO/(). Multiplying this result by (1/TLO)δ(f ± 1/TLO) and convolving it with X(f), we have

(6.15)

As expected, the conversion gain from X(f) to Y1(f) is equal to 1/π, but with a phase shift of 90°.

The second output in Fig. 6.21(b), y2(t), can be viewed as a train of impulses that sample the input and are subsequently convolved with a square pulse [Fig. 6.23(a)]. That is,

(6.16)

Figure 6.23 (a) Decomposition of y2(t), (b) corresponding spectrum.

and hence

(6.17)

Figure 6.23(b) depicts the spectrum, revealing that shifted replicas of X(f) are multiplied by a sinc envelope. Note the subtle difference between Y1(f) and Y2(f): in the former, each replica of X(f) is simply scaled by a factor, whereas in the latter, each replica experiences a “droop” due to the sinc envelope. The component of interest in Y2(f) is obtained by setting k to ±1:

(6.18)

The term in the second set of square brackets must be calculated at the IF. If the IF is much lower than 2fLO, then exp(−IFTLO/2) ≈ 1 − IFTLO/2. Thus,

(6.19)

Note that Y2(f) in fact contains a larger IF component than does Y1(f). The total IF output is therefore equal to

(6.20)-(6.21)

If realized as a single-balanced topology (Fig. 6.24), the circuit provides a gain twice this value, 1.186 ≈ 1.48 dB. That is, a single-balanced sampling mixer exhibits about 5.5 dB higher gain than its return-to-zero counterpart. It is remarkable that, though a passive circuit, the single-ended sampling mixer actually has a voltage conversion gain greater than unity, and hence is a more attractive choice. The return-to-zero mixer is rarely used in modern RF design.

Figure 6.24 Single-balanced sampling mixer.

Determine the voltage conversion gain of a double-balanced sampling mixer.

#### Solution:

Shown in Fig. 6.25, such a topology operates identically to the counterpart in Fig. 6.20(a). In other words, the capacitors play no role here because each output is equal to one of the inputs at any given point in time. The conversion gain is therefore equal to 2/π, about 5.5 dB lower than that of the single-balanced topology of Fig. 6.24.

Figure 6.25 Double-balanced sampling mixer.

The above example may rule out the use of double-balanced sampling mixers. Since most receiver designs incorporate a single-ended LNA, this is not a serious limitation. However, if necessary, double-balanced operation can be realized through the use of two single-balanced mixers whose outputs are summed in the current domain. Illustrated conceptually in Fig. 6.26 [1], the idea is to retain the samples on the capacitors, convert each differential output voltage to a current by means of M1M4, add their output currents, and apply the currents to load resistors, thus generating an output voltage. In this case, the mixer conversion gain is still equal to 1.48 dB.

Figure 6.26 Output combining of two single-balanced mixers in the current domain.

#### 6.2.2 LO Self-Mixing

Recall from Chapter 4 that the leakage of the LO waveform to the input of a mixer is added to the RF signal and mixed with the LO, generating a dc offset at the output. We now study this mechanism in the single-balanced sampling mixer. Consider the arrangement shown in Fig. 6.27(a), where RS denotes the output impedance of the previous stage (the LNA). Suppose the LO waveforms and the transistors are perfectly symmetric. Then, due to the nonlinearity of CGS1 and CGS2 arising from large LO amplitudes, VP does change with time but only at twice the LO frequency [Fig. 6.27(b)] (Problem 6.3). Upon mixing with the LO signal, this component is translated to fLO and 3fLO—but not to dc. In other words, with perfectly-symmetric devices and LO waveforms, the mixer exhibits no LO self-mixing and hence no output dc offsets.

Figure 6.27 (a) LO-RF leakage path in a sampling mixer, (b) LO and leakage waveforms.

In practice, however, mismatches between M1 and M2 and within the oscillator circuit give rise to a finite LO leakage to node P. Accurate calculation of the resulting dc offset is difficult owing to the lack of data on various transistor, capacitor, and inductor mismatches that lead to asymmetries. A rough rule of thumb is 10–20 millivolts at the output of the mixer.

#### 6.2.3 Noise

In this section, we study the noise behavior of return-to-zero and sampling mixers. Our approach is to determine the output noise spectrum, compute the output noise power in 1 Hz at the IF, and divide the result by the square of the conversion gain, thus obtaining the input-referred noise.

Let us begin with the RZ mixer, shown in Fig. 6.28. Here, Ron denotes the on-resistance of the switch. We assume a 50% duty cycle for the LO. The output noise is given by 4kT(Ron||RL) when S1 is on and by 4kTRL when it is off. As shown in Example 6.4, on the average, the output contains half of 4kT(Ron||RL) and half of 4kTRL:

(6.22)

Figure 6.28 RZ mixer for noise calculation.

If we select Ron RL so as to minimize the conversion loss, then

(6.23)

Dividing this result by 1/π2, we have

(6.24)-(6.25)

That is, the noise power of RL (= 4kTRL) is “amplified” by a factor of 5 when referred to the input.

If Ron = 100 Ω and RL = 1kΩ, determine the input-referred noise of the above RZ mixer.

#### Solution:

We have

(6.26)

This noise would correspond to a noise figure of 10 log[1 + (8.14/0.91)2] = 19 dB in a 50-Ω system.

The reader may wonder if our choice Ron RL is optimum. If RL is very high, the output noise decreases but so does the conversion gain. We now remove the assumption Ron RL and express the voltage conversion gain as (1/π)RL/(Ron + RL). Dividing Eq. (6.22) by the square of this value gives

(6.27)

This function reaches a minimum of

(6.28)-(6.29)

for . For example, if Ron = 100 Ω and , then the input-referred noise voltage is equal to (equivalent to an NF of 17.7 dB in a 50-Ω system).

In reality, the output noise voltages calculated above are pessimistic because the input capacitance of the following stage limits the noise bandwidth, i.e., the noise is no longer white. This point becomes clearer in our study of the sampling mixer.

We now wish to compute the output noise spectrum of a sampling mixer. The output noise at the IF can then be divided by the conversion gain to obtain the input-referred noise voltage. We begin with three observations. First, in the simple circuit of Fig. 6.29(a) (where R1 denotes the switch resistance), if Vin = 0,

(6.30)

Figure 6.29 (a) Equivalent circuit of sampling mixer for noise calculations, (b) noise in on and off states, and (c) decomposition of output waveform.

where (for − ∞ < ω < + ∞). We say the noise is “shaped” by the filter.3 Second, in the switching circuit of Fig. 6.29(b), the output is equal to the shaped noise of R1 when S1 is on and a sampled, constant value when it is off. Third, in a manner similar to the gain calculation in Fig. 6.21, we can decompose the output into two waveforms Vn1 and Vn2 as shown in Fig. 6.29(c).

It is tempting to consider the overall output spectrum as the sum of the spectra of Vn1 and Vn2. However, as explained below, the low-frequency noise components generated by R1 create correlation between the track-mode and hold-mode noise waveforms. For this reason, we proceed as follows: (1) compute the spectrum of Vn1 while excluding the low-frequency components in the noise of R1, (2) do the same for Vn2, and (3) add the contribution of the low-frequency components to the final result. In the derivations below, we refer to the first two as simply the spectra of Vn1 and Vn2 even though Vn1(t) and Vn2(t) in Fig. 6.29 are affected by the low-frequency noise of R1. Similarly, we use the notation even though its low-frequency components are removed and considered separately.

##### Spectrum of Vn1

To calculate the spectrum of Vn1, we view this waveform as the product of Vn,LPF(t) and a square wave toggling between 0 and 1. As shown in Fig. 6.30, the spectrum of Vn1 is given by the convolution of and the power spectral density of the square wave (impulses with a sinc2 envelope). In practice, the sampling bandwidth of the mixer, 1/(R1C1), rarely exceeds 3ωLO, and hence

(6.31)

where the factor of 2 on the right-hand side accounts for the aliasing of components at negative and positive frequencies. At low output frequencies, this expression reduces to

(6.32)

Note that this is the two-sided spectrum of .

Figure 6.30 Aliasing in Vn1.

##### Spectrum of Vn2

The spectrum of Vn2 in Fig. 6.29(c) can be obtained using the approach illustrated in Fig. 6.21 for the conversion gain. That is, Vn2 is equivalent to sampling Vn,LPF by a train of impulses and convolving the result with a square pulse, Π[t/(2TLO) − 1/2]. We must therefore convolve the spectrum of Vn,LPF with a train of impulses (each having an area of ) and multiply the result by a sinc2 envelope. As shown in Fig. 6.31, the convolution translates noise components around ±fLO, ±2fLO, etc., to the IF. The sum of these aliased components is given by

(6.33)-(6.34)

where a = 2πR1C1fLO. For the summation in Eq. (6.34), we have

(6.35)

Also, typically (2πR1C1)−1 > fLO and hence coth(2R1C1fLO)−1 ≈ 1. It follows that

(6.36)

Figure 6.31 Aliasing in Vn2.

This result must be multiplied by the sinc2 envelope, |()−1[1 − exp(−jωTLO/2)]|2, which has a magnitude of at low frequencies. Thus, the two-sided IF spectrum of Vn2 is given by

(6.37)

##### Correlation Between Vn1 and Vn2

We must now consider the correlation between Vn1 and Vn2 in Fig. 6.29. The correlation arises from two mechanisms: (1) as the circuit enters the track mode, the previous sampled value takes a finite time to vanish, and (2) when the circuit enters the hold mode, the frozen noise value, Vn2, is partially correlated with Vn1. The former mechanism is typically negligible because of the short track time constant. For the latter, we recognize that the noise frequency components far below fLO remain relatively constant during the track and hold modes (Fig. 6.32); it is as if they experienced a zero-order hold operation and hence a conversion gain of unity. Thus, the R1 noise components from 0 to roughly fLO/10 directly appear at the output, adding a noise PSD of 2kTR1.

Figure 6.32 Correlation between noise components in acquisition and hold modes.

Summing the one-sided spectra of Vn1 and Vn2 and the low-frequency contribution, 4kTR1, gives the total (one-sided) output noise at the IF:

(6.38)

The input-referred noise is obtained by dividing this result by 1/π2 + 1/4:

(6.39)

Note that [2] and [3] do not predict the dependence on R1 or C1.

For a single-balanced topology, the differential output exhibits a noise power twice that given by Eq. (6.38), but the voltage conversion gain is twice as high. Thus, the input-referred noise of a single-balanced passive (sampling) mixer is equal to

(6.40)-(6.41)

Let us now study the noise of a double-balanced passive mixer. As mentioned in Example 6.8, the behavior of the circuit does not depend much on the absence or presence of load capacitors. With abrupt LO edges, a resistance equal to R1 appears between one input and one output at any point in time [Fig. 6.33(a)]. Thus, from Fig. 6.33(b), . Since the voltage conversion is equal to 2/π,

(6.42)

Figure 6.33 (a) Equivalent circuit of double-balanced passive mixer, (b) simplified circuit.

The low gain of passive mixers makes the noise of the subsequent stage critical. Figure 6.34(a) shows a typical arrangement, where a quasi-differential pair (Chapter 5) serves as an amplifier and its input capacitance holds the output of the mixer. Each common-source stage exhibits an input-referred noise voltage of

(6.43)

Figure 6.34 (a) Passive mixer followed by gain stage, (b) bias path at the RF input, (c) bias path at the baseband output.

This power should be doubled to account for the two halves of the circuit and added to the mixer output noise power.

How is the circuit of Fig. 6.34(a) biased? Depicted in Fig. 6.34(b) is an example. Here, the bias of the preceding stage (the LNA) is blocked by C1, and the network consisting of RREF, MREF, and IREF defines the bias current of M1 and M2. As explained in Chapter 5, resistor RREF is chosen much greater than the output resistance of the preceding stage. We typically select WREF ≈ 0.2W1,2 so that ID1,2 ≈ 5IREF.

In the circuit of Fig. 6.34(b), the dc voltages at nodes A and B are equal to VP unless LO self-mixing produces a dc offset between these two nodes. The reader may wonder if the circuit can be rearranged as shown in Fig. 6.34(c) so that the bias resistors provide a path to remove the dc offset. The following example elaborates on this point.

A student considers the arrangement shown in Fig. 6.35(a), where Vin models the LO leakage to the input. The student then decides that the arrangement in Fig. 6.35(b) is free from dc offsets, reasoning that a positive dc voltage, Vdc, at the output would lead to a dc current, Vdc/RL, through RL and hence an equal current through RS. This is impossible because it gives rise to a negative voltage at node X. Does the student deserve an A?

Figure 6.35 (a) Sampling and (b) RZ mixer, (c) RZ mixer waveforms.

#### Solution:

The average voltage at node X can be negative. As shown in Fig. 6.35(c), VX is an attenuated version of Vin when S1 is on and equal to Vin when S1 is off. Thus, the average value of VX is negative while RL carries a finite average current as well. That is, the circuit of Fig. 6.35(b) still suffers from a dc offset.

#### 6.2.4 Input Impedance

Passive mixers tend to present an appreciable load to LNAs. We therefore wish to formulate the input impedance of passive sampling mixers.

Consider the circuit depicted in Fig. 6.36, where S1 is assumed ideal for now. Recall from Fig. 6.21 that the output voltage can be viewed as the sum of two waveforms y1(t) and y2(t), given by Eqs. (6.12) and (6.16), respectively. The current drawn by C1 in Fig. 6.36 is equal to

(6.44)

Figure 6.36 Input impedance of sampling mixer.

Moreover, iin(t) = iout(t). Taking the Fourier transform, we thus have

(6.45)

where Y(f) is equal to the sum of Y1(f) and Y2(f).

As evident from Figs. 6.22 and 6.23, Y(f) contains many frequency components. We must therefore reflect on the meaning of the “input impedance.” Since the input voltage signal, x(t), is typically confined to a narrow bandwidth, we seek frequency components in Iin(f) that lie within the bandwidth of x(t). To this end, we set k in Eqs. (6.13) and (6.17) to zero so that X(f) is simply convolved with δ(f) [i.e., the center frequency of X(f) does not change]. (This stands in contrast to gain and noise calculations, where k was chosen to translate X(f) to the IF of interest.) It follows that

(6.46)

In the square brackets in the first term, ω must be set to zero to evaluate the impulse at f = 0. Thus, the first term reduces to (1/2)X(f). In the second term, the exponential in the square brackets must also be calculated at ω = 0. Consequently, the second term simplifies to (1/TLO)X(f)[1/()][1−exp(−jωTLO/2)]. We then arrive at an expression for the input admittance:

(6.47)

Note that the on-resistance of the switch simply appears in series with the inverse of (6.47).

It is instructive to examine Eq. (6.47) for a few special cases. If ω (the input frequency) is much less than ωLO, then the second term in the square brackets reduces to 1/2 and

(6.48)

In other words, the entire capacitance is seen at the input [Fig. 6.37(a)]. If ω ≈ 2πfLO (as in direct-conversion receivers), then the second term is equal to 1/() and

(6.49)

Figure 6.37 Input impedance of passive mixer for (a) ω ωLO and (b) ωωLO.

The input impedance thus contains a parallel resistive component equal to 1/(2fC1) [Fig. 6.37(b)]. Finally, if ω 2πfLO, the second term is much less than the first, yielding

(6.50)

For the input impedance of a single-balanced mixer, we must add the switch on-resistance, R1, to the inverse of Eq. (6.47) and halve the result. If ωωLO, then

(6.51)

##### Flicker Noise

An important advantage of passive mixers over their active counterparts is their much lower output flicker noise. This property proves critical in narrowband applications, where 1/f noise in the baseband can substantially corrupt the downconverted channel.

MOSFETs produce little flicker noise if they carry a small current [4], a condition satisfied in a passive sampling mixer if the load capacitance is relatively small. However, the low gain of passive mixers makes the 1/f noise contribution of the subsequent stage critical. Thus, the baseband amplifier following the mixer must employ large transistors, presenting a large load capacitance to the mixer (Fig. 6.38). As explained above, CBB manifests itself in the input impedance of the mixer, Zmix, thereby loading the LNA.

Figure 6.38 Baseband input capacitance reflected at the input of passive mixer.

##### LO Swing

Passive MOS mixers require large (rail-to-rail) LO swings, a disadvantage with respect to active mixers. Since LC oscillators typically generate large swings, this is not a serious drawback, at least at moderate frequencies (up to 5 or 10 GHz).

In Chapter 13, we present the design of a passive mixer followed by a baseband amplifier for 11a/g applications.

#### 6.2.5 Current-Driven Passive Mixers

The gain, noise, and input impedance analyses carried out in the previous sections have assumed that the RF input of passive mixers is driven by a voltage source. If driven by a current source, such mixers exhibit different properties. Figure 6.39(a) shows a conceptual arrangement where the LNA has a relatively high output impedance, approximating a current source. The passive mixer still carries no bias current so as to achieve low flicker noise and it drives a general impedance ZBB. Voltage-driven and current-driven passive mixers entail a number of interesting differences.

Figure 6.39 (a) Current-driven passive mixer, (b) simplified model for input impedance calculation, (c) spectra at input and output.

First, the input impedance of the current-driven mixer in Fig. 6.39 is quite different from that of the voltage-driven counterpart. The reader may find this strange. Indeed, familiar circuits exhibit an input impedance that is independent of the source impedance: we can calculate the input impedance of an LNA by applying a voltage or a current source to the input port. A passive mixer, on the other hand, does not satisfy this intuition because it is a time-variant circuit. To determine the input impedance of a current-driven single-balanced mixer, we consider the simplified case depicted in Fig. 6.39(b), where the on-resistance of the switches is neglected. We wish to calculate Zin(f) = VRF(f)/Iin(f) in the vicinity of the carrier (LO) frequency, assuming a 50% duty cycle for the LO.

The input current is routed to the upper arm for 50% of the time and flows through ZBB. In the time domain [5],

(6.52)

where S(t) denotes a square wave toggling between 0 and 1, and h(t) is the impulse response of ZBB. In the frequency domain,

(6.53)

where S(f) is the spectrum of a square wave. As expected, upon convolution with the first harmonic of S(f), Iin(f) is translated to the baseband and is then subjected to the frequency response of ZBB(f). A similar phenomenon occurs in the lower arm.

We now make a critical observation [5]: the switches in Fig. 6.39(b) also mix the baseband waveforms with the LO, delivering the upconverted voltages to node A. Thus, V1(t) is multiplied by S(t) as it returns to the input, and its spectrum is translated to RF. The spectrum of V2(t) is also upconverted and added to this result.

Figure 6.39(c) summarizes our findings, revealing that the downconverted spectrum of Iin(f) is shaped by the frequency response of ZBB, and the result “goes back” through the mixer, landing around fc while retaining its spectral shape. In other words, in response to the spectrum shown for Iin(f), an RF voltage spectrum has appeared at the input that is shaped by the baseband impedance. This implies that the input impedance around fc resembles a frequency-translated version of ZBB(f). For example, if ZBB(f) is a low-pass impedance, then Zin(f) has a band-pass behavior [5].

The second property of current-driven passive mixers is that their noise and nonlinearity contribution are reduced [6]. This is because, ideally, a device in series with a current source does not alter the current passing through it.

Passive mixers need not employ a 50% LO duty cycle. In fact, both voltage-driven and current-driven mixers utilizing a 25% duty cycle provide a higher gain. Figure 6.40 shows the quadrature LO waveforms according to this scenario. Writing the Fourier series for LO waveforms having a duty cycle of d, the reader can show that the RF current entering each switch generates an IF current given by [6]:

(6.54)

where IRF0 denotes the peak amplitude of the RF current. As expected, d = 0.5 yields a gain of 2/π. More importantly, for d = 0.25, the gain reaches , 3 dB higher. Of course, the generation of these waveforms becomes difficult at very high frequencies. [Ideally, we would choose d ≈ 0 (impulse sampling) to raise this gain to unity.]

Figure 6.40 Quadrature LO waveforms with 25% duty cycle.

Another useful attribute of the 25% duty cycle in Fig. 6.40 is that the mixer switches driven by LO0 and LO180 (or by LO90 and LO270) are not on simultaneously. As a result, the mixer contributes smaller noise and nonlinearity [6].

### 6.3 Active Downconversion Mixers

Mixers can be realized so as to achieve conversion gain in one stage. Called active mixers, such topologies perform three functions: they convert the RF voltage to a current, “com-mutate” (steer) the RF current by the LO, and convert the IF current to voltage. These operations are illustrated in Fig. 6.41. While both passive and active mixers incorporate switching for frequency translation, the latter precede and follow the switching by voltage-to-current (V/I) and current-to-voltage (I/V) conversion, respectively, thereby achieving gain. We can intuitively observe that the input transconductance, IRF/VRF, and the output transresistance, VIF/IIF, can, in principle, assume arbitrarily large values, yielding an arbitrarily high gain.

Figure 6.41 Active mixer viewed as a V/I converter, a current switch, and an I/V converter.

Figure 6.42 depicts a typical single-balanced realization. Here, M1 converts the input RF voltage to a current (and is hence called a “transconductor”), the differential pair M2M3 commutates (steers) this current to the left and to the right, and R1 and R2 convert the output currents to voltage. We call M2 and M3 the “switching pair.” As with our passive mixer study in Section 6.2, we wish to quantify the gain, noise, and nonlinearity of this circuit. Note that the switching pair does not need rail-to-rail LO swings. In fact, as explained later, such swings degrade the linearity.

Figure 6.42 Single-balanced active mixer.

##### Double-Balanced Topology

If the RF input is available in differential form, e.g., if the LNA provides differential outputs, then the active mixer of Fig. 6.42 must be modified accordingly. We begin by duplicating the circuit as shown in Fig. 6.43(a), where and denote the differential phases of the RF input. Each half circuit commutates the RF current to its IF outputs. Since , the small-signal IF components at X1 and Y1 are equal to the negative of those at X2 and Y2, respectively. That is, VX1 = −VY1 = −VX2 = VY2, allowing us to short X1 to Y2 and X2 to Y1 and arrive at the double-balanced mixer in Fig. 6.43(b), where the load resistors are equal to RD/2. We often draw the circuit as shown in Fig. 6.43(c) for the sake of compactness. Transistors M2, M3, M5, and M6 are called the “switching quad.” We will study the advantages and disadvantages of this topology in subsequent sections.

Figure 6.43 (a) Two single-balanced mixers sensing differential RF inputs, (b) summation of output currents, (c) compact drawing of circuit.

One advantage of double-balanced mixers over their single-balanced counterparts stems from their rejection of amplitude noise in the LO waveform. We return to this property in Section 6.3.2.

Can the load resistors in the circuit of Fig. 6.43(b) be equal to RD so as to double the gain?

#### Solution:

No, they cannot. Since the total bias current flowing through each resistor is doubled, RD must be halved to comply with the voltage headroom.

#### 6.3.1 Conversion Gain

In the circuit of Fig. 6.42, transistor M1 produces a small-signal drain current equal to gm1 VRF. With abrupt LO switching, the circuit reduces to that shown in Fig. 6.44(a), where M2 multiplies IRF by a square wave toggling between 0 and 1, S(t), and M3 multiplies IRF by S(tTLO/2) because LO and are complementary. It follows that

(6.55)

(6.56)

Figure 6.44 (a) Equivalent circuit of active mixer, (b) switching waveforms.

Since Vout = VDDI1R1 − (VDDI2R2), we have for R1 = R2 = RD,

(6.57)

From Fig. 6.44(b), we recognize that the switching operation in Eq. (6.57) is equivalent to multiplying IRF by a square wave toggling between −1 and + 1. Such a waveform exhibits a fundamental amplitude equal to 4/π,4 yielding an output given by

(6.58)

If IRF(t) = gm1VRF cos ωRFt, then the IF component at ωRFωLO is equal to

(6.59)

The voltage conversion gain is therefore equal to

(6.60)

What limits the conversion gain? We assume a given power budget, i.e., a certain bias current, ID1, and show that the gain trades with the linearity and voltage headroom. The input transistor is sized according to the overdrive voltage, VGS1VTH1, that yields the required IP3 (Chapter 5). Thus, VDS1,min = VGS1VTH1. The transconductance of M1 is limited by the current budget and IP3, as expressed by gm1 = 2ID1/(VGS1VTH1) [or ID1/(VGS1VTH1) for velocity-saturated devices]. Also, the value of RD is limited by the maximum allowable dc voltage across it. In other words, we must compute the minimum allowable value of VX and VY in Fig. 6.42. As explained in Section 6.3.3, linearity requirements dictate that M2 and M3 not enter the triode region so long as both carry current.

Suppose the gate voltages of M2 and M3 in Fig. 6.42 are held at the common-mode level of the differential LO waveforms, VCM,LO [Fig. 6.45(a)]. If M1 is at the edge of saturation, then VNVGS1VTH1:

(6.61)

Figure 6.45 (a) Active mixer with LO at CM level, (b) required swing to turn one device off.

Now consider the time instant at which the gate voltages of M2 and M3 reach VCM,LO + V0 and VCM,LOV0, respectively, where , a value high enough to turn off M3 [Fig. 6.45(b)]. For M2 to remain in saturation up to this point, its drain voltage must not fall below :

(6.62)

which, from Eq. (6.61), reduces to

(6.63)

Thus, VX,min must accommodate the overdrive of M1 and about 1.7 times the “equilibrium” overdrive of each of the switching transistors. The maximum allowable dc voltage across each load resistor is equal to

(6.64)

Since each resistor carries half of ID1,

(6.65)

From (6.64) and (6.65), we obtain the maximum voltage conversion gain as

(6.66)-(6.67)

We therefore conclude that low supply voltages severely limit the gain of active mixers.

A single-balanced active mixer requires an overdrive voltage of 300 mV for the input V/I converter transistor. If each switching transistor has an equilibrium overdrive of 150 mV and the peak LO swing is 300 mV, how much conversion gain can be obtained with a 1-V supply?

#### Solution:

From Eq. (6.64), VR,max = 444 mV and hence

(6.68)-(6.69)

Owing to the relatively low conversion gain, the noise contributed by the load resistors and following stages may become significant.

How much room for improvement do we have? Given by IP3 requirements, the over-drive of the input transistor has little flexibility unless the gain of the preceding LNA can be reduced. This is possible if the mixer noise figure can also be lowered, which, as explained in Section 6.3.2, trades with the power dissipation and input capacitance of the mixer. The equilibrium overdrive of the switching transistors can be reduced by making the two transistors wider (while raising the capacitance seen at the LO port).

The conversion gain may also fall if the LO swing is lowered. As illustrated in Fig. 6.46, while M2 and M3 are near equilibrium, the RF current produced by M1 is split approximately equally between them, thus appearing as a common-mode current and yielding little conversion gain for that period of time. Reduction of the LO swing tends to increase this time and lower the gain (unless the LO is a square wave).

Figure 6.46 RF current as a CM component near LO zero crossings.

Figure 6.47 shows a “dual-gate mixer,” where M1 and M2 can be viewed as one transistor with two gates. Identify the drawbacks of this circuit.

Figure 6.47 Dual-gate mixer.

#### Solution:

For M2 to operate as a switch, its gate voltage must fall to VTH2 above zero (why?) regardless of the overdrive voltages of the two transistors. For this reason, the dual-gate mixer typically calls for larger LO swings than the single-balanced active topology does. Furthermore, since the RF current of M1 is now multiplied by a square wave toggling between 0 and 1, the conversion gain is half:

(6.70)

Additionally, all of the frequency components produced by M1 appear at the output without translation because they are multiplied by the average value of the square wave, 1/2. Thus, half of the flicker noise of M1—a high-frequency device and hence small—emerges at IF. Also, low-frequency beat components resulting from even-order distortion (Chapter 4) in M1 directly corrupt the output, leading to a low IP2. The dual-gate mixer does not require differential LO waveforms, a minor advantage. For these reasons, this topology is rarely used in modern RF design.

With a sinusoidal LO, the drain currents of the switching devices depart from square waves, remaining approximately equal for a fraction of each half cycle, ΔT [Fig. 6.48(a)]. As mentioned previously, the circuit exhibits little conversion gain during these periods. We now wish to estimate the reduction in the gain.

Figure 6.48 (a) Effect of gradual LO transitions, (b) magnified LO waveforms.

A differential pair having an equilibrium overdrive of (VGSVTH)eq steers most of its tail current for a differential input voltage, ΔVin, of (for square-law devices). We assume that the drain currents are roughly equal for ΔVin ≤ (VGSVTH)eq/5 and calculate the corresponding value of ΔT. We note from Fig. 6.48(b) that, if each single-ended LO waveform has a peak amplitude of Vp,LO, then LO and reach a difference of (VGSVTH)eq/5 in approximately ΔT/2 = (VGSVTH)eq/5/(2Vp,LOωLO) seconds. Multiplying this result by a factor of 4 to account for the total time on both rising and falling edges and normalizing to the LO period, we surmise that the overall gain of the mixer is reduced to

(6.71)-(6.72)

Repeat Example 6.12 but take the gradual LO edges into account.

#### Solution:

The gain expressed by Eq. (6.68) must be multiplied by 1 − 0.0318 ≈ 0.97:

(6.73)-(6.74)

Thus, the gradual LO transitions lower the gain by about 0.2 dB.

The second phenomenon that degrades the gain relates to the total capacitance seen at the drain of the input transistor. Consider an active mixer in one-half of the LO cycle (Fig. 6.49). With abrupt LO edges, M2 is on and M3 is off, yielding a total capacitance at node P equal to

(6.75)

Figure 6.49 Loss of RF current to ground through CP.

Note that CGS3 is substantially smaller than CGS2 in this phase (why?). The RF current produced by M1 is split between CP and the resistance seen at the source of M2, 1/gm2 (if body effect is neglected). Thus, the voltage conversion gain is reduced by a factor of gm2/(sCP + gm2); i.e., Eq. (6.72) must be modified as

(6.76)

How significant is this current division? In other words, how does compare with in the above expression? Note that gm2/CP is well below the maximum fT of M2 because (a) the sum of CDB1, CSB2, CSB3, and CGS3 is comparable with or larger than CGS2, and (b) the low overdrive voltage of M2 (imposed by headroom and gain requirements) also leads to a low fT. We therefore observe that the effect of CP may become critical for frequencies higher than roughly one-tenth of the maximum fT of the transistors.

If the output resistance of M2 in Fig. 6.49 is not neglected, how should it be included in the calculations?

#### Solution:

Since the output frequency of the mixer is much lower than the input and LO frequencies, a capacitor is usually tied from each output node to ground to filter the unwanted components (Fig. 6.50). As a result, the resistance seen at the source of M2 in Fig. 6.50 is simply equal to (1/gm2)||rO2 because the output capacitor establishes an ac ground at the drain of M2 at the input frequency.

Figure 6.50 Capacitors tied to output nodes to limit the bandwidth.

Compare the voltage conversion gains of single-balanced and double-balanced active mixers.

#### Solution:

From Fig. 6.43(a), we recognize that is equal to the voltage conversion gain of a single-balanced mixer. Also, VX1 = VY2 and VY1 = VX2 if . Thus, if Y2 is shorted to X1, and X2 to Y1, these node voltages remain unchanged. In other words, VXVY in Fig. 6.43(b) is equal to VX1VY1 in Fig. 6.43(a). The differential voltage conversion gain of the double-balanced topology is therefore given by

(6.77)

which is half of that of the single-balanced counterpart. This reduction arises because the limited voltage headroom disallows a load resistance of RD in Fig. 6.43(b) (Example 6.11).

#### 6.3.2 Noise in Active Mixers

The analysis of noise in active mixers is somewhat different from the study undertaken in Section 6.2.3 for passive mixers. As illustrated conceptually in Fig. 6.51, the noise components of interest lie in the RF range before downconversion and in the IF range after downconversion. Note that the frequency translation of RF noise by the switching devices prohibits the direct use of small-signal ac and noise analysis in circuit simulators (as is done for LNAs), necessitating simulations in the time domain. Moreover, the noise contributed by the switching devices exhibits time-varying statistics, complicating the analysis.

Figure 6.51 Partitioning of active mixer for noise analysis.

##### Qualitative Analysis

To gain insight into the noise behavior of active mixers, we begin with a qualitative study. Let us first assume abrupt LO transitions and consider the representation in Fig. 6.52(a) for half of the LO cycle. Here,

(6.78)

Figure 6.52 (a) Effect of noise when one transistor is off, (b) equivalent circuit of (a).

In this phase, the circuit reduces to a cascode structure, with M2 contributing some noise because of the capacitance at node P (Chapter 5). Recall from the analysis of cascode LNAs in Chapter 5 that, at frequencies well below fT, the output noise current generated by M2 is equal to Vn,M2CPs [Fig. 6.52(b)]. This noise and the noise current of M1 (which is dominant) are multiplied by a square wave toggling between 0 and 1. Transistor M3 plays an identical role in the next half cycle of the LO.

Now consider a more realistic case where the LO transitions are not abrupt, allowing M2 and M3 to remain on simultaneously for part of the period. As depicted in Fig. 6.53, the circuit now resembles a differential pair near equilibrium, amplifying the noise of M2 and M3—while the noise of M1 has little effect on the output because it behaves as a common-mode disturbance.

Figure 6.53 Effect of noise of M2 and M3 near equilibrium.

Compare single-balanced and double-balanced active mixers in terms of their noise behavior. Assume the latter’s total bias current is twice the former’s.

#### Solution:

Let us first study the output noise currents of the mixers [Fig. 6.54(a)]. If the total differential output noise current of the single-balanced topology is , then that of the double-balanced circuit is equal to (why?). Next, we determine the output noise voltages, bearing in mind that the load resistors differ by a factor of two [Fig. 6.54(b)]. We have

(6.79)

(6.80)

Figure 6.54 (a) Output noise currents of single-balanced and double-balanced mixers, (b) corresponding output noise voltages.

But recall from Example 6.16 that the voltage conversion gain of the double-balanced mixer is half of that of the single-balanced topology. Thus, the input-referred noise voltages of the two circuits are related by

(6.81)

In this derivation, we have not included the noise of the load resistors. The reader can show that Eq. (6.81) remains valid even with their noise taken into account. The single-balanced mixer therefore exhibits less input noise and consumes less power.

It is important to make an observation regarding the mixer of Fig. 6.53. The noise generated by the local oscillator and its buffer becomes indistinguishable from the noise of M2 and M3 when these two transistors are around equilibrium. As depicted in Fig. 6.55, a differential pair serving as the LO buffer may produce an output noise much higher than that of M2 and M3. It is therefore necessary to simulate the noise behavior of mixers with the LO circuitry present.

Figure 6.55 Effect of LO buffer noise on single-balanced mixer.

Study the effect of LO noise on the performance of double-balanced active mixers.

#### Solution:

Drawing the circuit as shown in Fig. 6.56, we note that the LO noise voltage is converted to current by each switching pair and summed with opposite polarities. Thus, the double-balanced topology is much more immune to LO noise—a useful property obtained at the cost of the 3-dB noise penalty expressed by Eq. (6.81) and the higher power dissipation. Here, we have assumed that the noise components in LO and are differential. We study this point in Problem 6.6, concluding that this assumption is reasonable for a true differential buffer but not for a quasi-differential circuit.

Figure 6.56 Effect of LO noise on double-balanced mixer.

##### Quantitative Analysis

Consider the single-balanced mixer depicted in Fig. 6.51. From our qualitative analysis, we identify three sections in the circuit: the RF section, the time-varying (switching) section, and the IF section. To estimate the input-referred noise voltage, we apply the following procedure: (1) for each source of noise, determine a “conversion gain” to the IF output; (2) multiply the magnitude of each noise by the corresponding gain and add up all of the resulting powers, thus obtaining the total noise at the IF output; (3) divide the output noise by the overall conversion gain of the mixer to refer it to the input.

Let us begin the analysis by assuming abrupt LO transitions with a 50% duty cycle. In each half cycle of the LO, the circuit resembles that in Fig. 6.57, i.e., the noise of M1 (In1,M1) and each of the switching devices is multiplied by a square wave toggling between 0 and 1. We have seen in Example 6.4 that, if white noise is switched on and off with 50% duty cycle, the resulting spectrum is still white while carrying half of the power. Thus, half of the noise powers (squared current quantities) of M1 and M2 is injected into node X, generating an output noise spectral density given by , where denotes the noise current injected by M2 into node X. The total noise at node X is therefore equal to

(6.82)

Figure 6.57 Noise of input device and one switching device in an active mixer.

The noise power must be doubled to account for that at node Y and then divided by the square of the conversion gain. From Eq. (6.76), the conversion gain in the presence of a capacitance at node P is equal to for abrupt LO edges (i.e., if Vp,LO → ∞). Note that the CP’s used for the noise contribution of M2 and gain calculation are given by (6.75) and (6.78), respectively, and slightly different. Nonetheless, we assume they are approximately equal. The input-referred noise voltage is therefore given by

(6.83)-(6.84)

If the effect of CP is negligible, then

(6.85)

Compare Eq. (6.85) with the input-referred noise voltage of a common-source stage having the same transconductance and load resistance.

#### Solution:

For the CS stage, we have

(6.86)

Thus, even if the second term in the parentheses is negligible, the mixer exhibits 3.92 dB higher noise power. With a finite CP and LO transition times, this difference becomes even larger.

The term π2kTγ/gm1 in (6.85) represents the input-referred contribution of M1. This appears puzzling: why is this contribution simply not equal to the gate-referred noise of M1,4kTγ/gm1? We investigate this point in Problem 6.7.

We now consider the effect of gradual LO transitions on the noise behavior. Similar to the gain calculations in Section 6.3.1, we employ a piecewise-linear approximation (Fig. 6.58): the switching transistors are considered near equilibrium for 2 ΔT = 2(VGSVTH)eq/(5VP,LOωLO) seconds per LO cycle, injecting noise to the output as a differential pair. During this time period, M1 contributes mostly common-mode noise, and the output noise is equal to

(6.87)

where we assume gm2gm3. Now, this noise power must be weighted by a factor of 2ΔT/TLO, and that in the numerator of Eq. (6.83) by a factor of 1 − 2ΔT/TLO. The sum of these weighted noise powers must then be divided by the square of (6.76) to refer it to the input. The input-referred noise is thus given by

(6.88)

Figure 6.58 Piecewise-linear waveforms for mixer noise calculation.

Equation (6.88) reveals that the equilibrium overdrive voltage of the switching devices plays a complex role here: (1) in the first term in the numerator, (for a given bias current), whereas ΔT ∝ (VGSVTH)eq; (2) the noise power expressed by the second term in the numerator is proportional to 1 − 2 ΔT/TLO while the squared gain in the denominator varies in proportion to (1 − 2 ΔT/TLO)2, suggesting that ΔT must be minimized.

A single-balanced mixer is designed for a certain IP3, bias current, LO swing, and supply voltage. Upon calculation of the noise, we find it unacceptably high. What can be done to lower the noise?

#### Solution:

The overdrive voltages and the dc drop across the load resistors offer little flexibility. We must therefore sacrifice power for noise by a direct scaling of the design. Illustrated in Fig. 6.59, the idea is to scale the transistor widths and currents by a factor of α and the load resistors by a factor of 1/α. All of the voltages thus remain unchanged, but the input-referred noise voltage, , falls by a factor of . Unfortunately, this scaling also scales the capacitances seen at the RF and LO ports, making the design of the LNA and the LO buffer more difficult and/or more power-hungry.

Figure 6.59 Effect of scaling on noise.

##### Flicker Noise

Unlike passive mixers, active topologies suffer from substantial flicker noise at their output, a serious issue if the IF signal resides near zero frequency and has a narrow bandwidth.

Consider the circuit shown in Fig. 6.60(a). With perfect symmetry, the 1/f noise of ISS does not appear at the output because it is mixed with ωLO (and its harmonics). Thus, only the flicker noise of M2 and M3 must be considered. The noise of M2, , experiences the gain of the differential pair as it propagates to the output. Fortunately, the large LO swing heavily saturates (desensitizes) the differential pair most of the time, thereby lowering the gain seen by .

Figure 6.60 (a) Flicker noise of switching device, (b) LO and drain current waveforms, (c) modulation of zero crossing due to flicker noise, (d) equivalent pulsewidth modulation.

In order to compute the gain experienced by Vn2 in Fig. 6.60(a), we assume a sinusoidal LO but also a small switching time for M2 and M3 such that ISS is steered almost instantaneously from one to the other at the zero crossings of LO and [Fig. 6.60(b)]. How does Vn2 alter this behavior? Upon addition to the LO waveform, the noise modulates the zero crossings of the LO [7]. This can be seen by computing the time at which the gate voltages of M1 and M2 are equal; i.e., by equating the instantaneous gate voltages of M2 and M3:

(6.89)

obtaining

(6.90)

In the vicinity of t = 0, we have

(6.91)

The crossing of LO and is displaced from its ideal point by an amount of ΔT (ωLO ΔT 1 rad) [Fig. 6.60(c)]:

(6.92)

That is,

(6.93)

Note that 2Vp,LOωLO is the slope of the differential LO waveform,5 SLO, and hence |ΔT| = |Vn2(t)|/SLO.

We now assume nearly abrupt drain current switching for M2 and M3 and consider the above zero-crossing deviation as pulsewidth modulation of the currents [Fig. 6.60(d)]. Drawing the differential output current as in Fig. 6.60(d), we note that the modulated output is equal to the ideal output plus a noise waveform consisting of a series of narrow pulses of height 2ISS and width ΔT and occurring twice per period [7]. If each narrow pulse is approximated by an impulse, the noise waveform in ID2ID3 can be expressed as

(6.94)

In the frequency domain, from Eq. (6.9),

(6.95)

The baseband component is obtained for k = 0 because Vn2(f) has a low-pass spectrum. It follows that

(6.96)

and hence

(6.97)

In other words, the flicker noise of each transistor is scaled by a factor of ISSRD/(πVp,LO) as it appears at the output. It is therefore desirable to minimize the bias current of the switching devices. Note that this quantity must be multiplied by to account for the flicker noise of M3 as well.

Refer the noise found above to the input of the mixer.

#### Solution:

Multiplying the noise by to account for the noise of M3 and dividing by the conversion gain, (2/π)gm1RD, we have

(6.98)-(6.99)

For example, if (VGSVTH)1 = 250 mV and Vp,LO = 300 mV, then Vn2(f) is reduced by about a factor of 3.4 when referred to the input. Note, however, that (1) Vn2(f) is typically very large because M2 and M3 are relatively small, and (2) the noise voltage found above must be multiplied by to account for the noise of M3.

The above study also explains the low 1/f noise of passive mixers. Since ISS = 0 in passive topologies, a noise voltage source in series with the gate experiences a high attenuation as it appears at the output. (Additionally, MOSFETs carrying negligible current produce negligible flicker noise.)

The reader may wonder if the above results apply to the thermal noise of M2 and M3 as well. Indeed, the analysis is identical [7] and the same results are obtained, with Vn2(f) replaced with 4kTγ/gm2. The reader can show that this method and our earlier method of thermal noise analysis yield roughly equal results if πVp,LO ≈ 5(VGSVTH)eq2,3.

Another flicker noise mechanism in active mixers arises from the finite capacitance at node P in Fig. 6.60(a) [7]. It can be shown that the differential output current in this case includes a flicker noise component given by [7]

(6.100)

Thus, a higher tail capacitance or LO frequency intensifies this effect. Nonetheless, the first mechanism tends to dominate at low and moderate frequencies.

#### 6.3.3 Linearity

The linearity of active mixers is determined primarily by the input transistor’s overdrive voltage. As explained in Chapter 5, the IP3 of a common-source transistor rises with the overdrive, eventually reaching a relatively constant value.

The input transistor imposes a direct trade-off between nonlinearity and noise because

(6.101)-(6.102)

We also noted in Section 6.3.1 that the headroom consumed by the input transistor, VGSVTH, lowers the conversion gain [Eq. (6.67)]. Along with the above example, these observations point to trade-offs among noise, nonlinearity, gain, and power dissipation in active mixers.

The linearity of active mixers degrades if the switching transistors enter the triode region. To understand this phenomenon, consider the circuit shown in Fig. 6.61, where M2 is in the triode region while M3 is still on and in saturation. Note that (1) the load resistors and capacitors establish an output bandwidth commensurate with the IF signal, and (2) the IF signal is uncorrelated with the LO waveform. If both M2 and M3 operate in saturation, then the division of IRF between the two transistors is given by their transconductances and is independent of their drain voltages.6 On the other hand, if M2 is in the triode region, then ID2 is a function of the IF voltage at node X, leading to signal-dependent current division between M2 and M3. To avoid this nonlinearity, M2 must not enter the triode region so long as M3 is on and vice versa. Thus, the LO swings cannot be arbitrarily large.

Figure 6.61 Effect of output waveform on current steering when one device enters the triode region.

##### Compression

Let us now study gain compression in active mixers. The above effect may manifest itself as the circuit approaches compression. If the output swings become excessively large, the circuit begins to compress at the output rather than at the input, by which we mean the switching devices introduce nonlinearity and hence compression while the input transistor has not reached compression. This phenomenon tends to occur if the gain of the active mixer is relatively high.

An active mixer exhibits a voltage conversion gain of 10 dB and an input 1-dB compression point of 355 mVpp (= −5 dBm). Is it possible that the switching devices contribute compression?

#### Solution:

At an input level of −5 dBm, the mixer gain drops to 9 dB, leading to an output differential swing of 355 mVpp × 2.82 ≈ 1 Vpp. Thus, each output node experiences a peak swing of 250 mV; i.e., node X in Fig. 6.61 falls 250 mV below its bias point. If the LO drive is large enough, the switching devices enter the triode region and compress the gain.

The input transistor may introduce compression even if it satisfies the quadratic characteristics of long-channel MOSFETs. This is because, with a large input level, the gate voltage of the device rises while the drain voltage falls, possibly driving it into the triode region. From Fig. 6.51, we can write the RF voltage swing at node P as

(6.103)

where RP denotes the “average resistance” seen at the common source node of M2 and M3.7 We can approximate RP as (1/gm2)||(1/gm3), where gm2 and gm3 represent the equilibrium transconductances of M2 and M3, respectively. In a typical design, gm1RP is on the order of unity. Thus, in the above example, as the input rises by 355 mV/2 = 178 mV from its bias value, the drain voltage of the input device falls by about 178 mV. If M1 must not enter the triode region, then the drain-source headroom allocated to M1 must be 355 mV higher than its quiescent overdrive voltage. Note that we did not account for this extra drain voltage swing in Example 6.12. If we had, the conversion gain would have been even lower.

The IP2 of active mixers is also of great interest. We compute the IP2 in Section 6.4.3.

Design a 6-GHz active mixer in 65-nm technology with a bias current of 2 mA from a 1.2-V supply. Assume direct downconversion with a peak single-ended sinusoidal LO swing of 400 mV.

#### Solution:

The design of the mixer is constrained by the limited voltage headroom. We begin by assigning an overdrive voltage of 300 mV to the input transistor, M1, and 150 mV to the switching devices, M2 and M3 (in equilibrium) (Fig. 6.62). From Eq. (6.64), we obtain a maximum allowable dc drop of about 600 mV for each load resistor, RD. With a total bias current of 2 mA, we conservatively choose RD = 500 Ω. Note that the LO swing well exceeds the voltage necessary to switch M2 and M3, forcing ID2 or ID3 to go from 2 mA to zero in about 5 ps.

Figure 6.62 Active mixer design for the 6-GHz band.

The overdrives chosen above lead to W1 = 15 μm and W2,3 = 20 μm. According to the gm-ID characteristic plotted in Chapter 5 for W = 10 μm, gm reaches approximately 8.5 mS for ID = 2mA × (10/15) = 1.33 mA. Thus, for W1 = 15 μm and ID1 = 2 mA, we have gm1 = 8.5mS × 1.5 = 12.75 mS = (78.4 Ω)−1. Capacitors C1 and C2 have a value of 2 pF to suppress the LO component at the output (which would otherwise help compress the mixer at the output).

We can now estimate the voltage conversion gain and the noise figure of the mixer. We have

(6.104)-(6.105)

To compute the noise figure due to thermal noise, we first estimate the input-referred noise voltage as

(6.106)-(6.107)

where γ ≈ 1. Note that, at a given IF ≠ 0, this noise results from both the signal band and the image band, ultimately yielding the single-sideband noise figure. We now write the NF with respect to RS = 50 Ω as

(6.108)-(6.109)

The double-sideband NF is 3 dB less.

In the simulation of mixers, we consider nonzero baseband frequencies even for direct-conversion receivers. After all, the RF signal has a finite bandwidth, producing nonzero IF components upon downconversion. For example, a 20-MHz 11a channel occupies a bandwidth of ±10 MHz in the baseband. Simulations therefore assume an LO frequency, fLO, of, say, 6 GHz, and an input frequency, fRF, of, say, 6.01 GHz. The time-domain simulation must then be long enough to capture a sufficient number of IF cycles for an accurate Fast Fourier Transform (FFT). If the bandwidth at the mixer output nodes permits, we may choose a higher IF to shorten the simulation time.

Figure 6.63 plots the simulated conversion gain of the mixer as a function of the peak input voltage, Vin,p. Here, fLO = 6 GHz, fin = 5.95 GHz, and Vin,p is increased in each simulation. The uncompressed gain is 10.3 dB, about 2 dB less than our estimate, falling by 1dB at Vin,p = 170 mV (= −5.28 dBm). Note that LO feedthrough and signal distortion make it difficult to measure the amplitude of the 50-MHz IF in the time domain. For this reason, the FFTs of the input and the output are examined so as to measure the conversion gain.

Figure 6.63 Compression characteristic of 6-GHz mixer.

Does this mixer design first compress at the input or at the output? As a test, we reduce the load resistors by a factor of 5, scaling the output voltage swings proportionally, and perform the above simulation again. We observe that the gain drops by only 0.5 dB at Vin,p = 170 mV. Thus, the output port, i.e., the switching transistors, reach compression first.

In order to measure the input IP3 of the mixer, we apply to the input two sinusoidal voltage sources in series with frequencies equal to 5.945 GHz and 5.967 GHz. The peak amplitude of each tone is chosen after some iteration: if it is too small, the output IM3 components are corrupted by the FFT noise floor, and if it is too large, the circuit may experience higher-order nonlinearity. We choose a peak amplitude of 40 mV. Figure 6.64 plots the downconverted spectrum, revealing a difference of ΔP = 50 dB between the fundamentals and the IM3 tones. We divide this value by 2 and by another factor of 20, compute 10ΔP/40 = 17.8, and multiply the result by the input peak voltage, obtaining IIP3 = 711 mVp (= +7 dBm in a 50-Ω system). The IIP3 is 12.3 dB higher than the input P1dB in this design—perhaps because when the mixer approaches P1dB, its nonlinearity has higher-order terms.

Figure 6.64 Two-tone test of 6-GHz mixer.

Figure 6.65 plots the simulated DSB noise figure of the mixer. The flicker noise heavily corrupts the baseband up to several megahertz. The NF at 100 MHz is equal to 5.5 dB, about 0.7 dB higher than our prediction.

Figure 6.65 Noise figure of 6-GHz mixer.

### 6.4 Improved Mixer Topologies

The mixer performance envelope defined by noise, nonlinearity, gain, power dissipation, and voltage headroom must often be pushed beyond the typical scenarios studied thus far in this chapter. For this reason, a multitude of circuit techniques have been introduced to improve the performance of mixers, especially active topologies. In this section, we present some of these techniques.

#### 6.4.1 Active Mixers with Current-Source Helpers

The principal difficulty in the design of active mixers stems from the conflicting requirements between the input transistor current (which must be high enough to meet noise and linearity specifications) and the load resistor current (which must be low enough to allow large resistors and hence a high gain). We therefore surmise that adding current sources (“helpers”) in parallel with the load resistors (Fig. 6.66) alleviates this conflict by affording larger resistor values. If ID1 = 2I0 and each current source carries a fraction, αI0, then RD can be as large as V0/[(1 − α)I0], where V0 is the maximum allowable drop across RD [as formulated by Eq. (6.64)]. Consequently, the voltage conversion gain rises as α increases. For example, if α = 0.5, then RD can be doubled and so can the gain. A higher RD also reduces its input-referred noise contribution [Eq. (6.85)].

But how about the noise contributed by M4 and M5? Assuming that these devices are biased at the edge of saturation, i.e., |VGSVTH|4,5 = V0, we write the noise current of each as 4kTγgm = 4kTγ(2αI0)/V0, multiply it by to obtain the (squared) noise voltage at each output node,8 and sum the result with the noise of RD itself:

(6.110)

where the noise due to other parts of the mixer is excluded. Since the voltage conversion gain is proportional to RD, the above noise power must be normalized to [and eventually the other factors in Eq. (6.85)]. We thus write

(6.111)-(6.113)

Interestingly, the total noise due to each current-source helper and its corresponding load resistor rises with α, beginning from 4kTI0/V0 for α = 0 and reaching (4kTI0/V0)(2γ) for α = 1.

Study the flicker noise contribution of M4 and M5 in Fig. 6.66.

#### Solution:

Modeled by a gate-referred voltage, , the flicker noise of each device is multiplied by , as it appears at the output. As with the above derivation, we normalize this result to :

(6.114)

Since the voltage headroom, V0, is typically limited to a few hundred millivolts, the helper transistors tend to contribute substantial 1/f noise to the output, a serious issue in direct-conversion receivers.

The addition of the helpers in Fig. 6.66 also degrades the linearity. In the calculations leading to Eq. (6.113), we assumed that the helpers operate at the edge of saturation so as to minimize their transconductance and hence their noise current, but this bias condition readily drives them into the triode region in the presence of signals. The circuit is therefore likely to compress at the output rather than at the input.

#### 6.4.2 Active Mixers with Enhanced Transconductance

Following the foregoing thought process, we can insert the current-source helper in the RF path rather than in the IF path. Depicted in Fig. 6.67 [8], the idea is to provide most of the bias current of M1 by M4, thereby reducing the current flowing through the load resistors (and the switching transistors). For example, if |ID4| = 0.75ID1, then RD and hence the gain can be quadrupled. Moreover, the reduction of the bias current switched by M2 and M3 translates to a lower overdrive voltage and more abrupt switching, decreasing ΔT in Figs. 6.48(a) and 6.58 and lessening the gain and noise effects formulated by Eqs. (6.72) and (6.88). Finally, the output flicker noise falls (Problem 6.10).

Figure 6.67 Addition of current source to tail of switching pair.

The above approach nonetheless faces two issues. First, transistor M4 contributes additional capacitance to node P, exacerbating the difficulties mentioned earlier. As a smaller bias current is allocated to M2 and M3, raising the impedance seen at their source [≈ 1/(2gm)], CP “steals” a greater fraction of the RF current generated by M1, reducing the gain. Second, the noise current of M4 directly adds to the RF signal. We can readily express the noise currents of M1 and M4 as

(6.115)-(6.116)

A student eager to minimize the noise of M4 in the above equation selects |VGSVTH|2 = 0.75 V with VDD = 1 V. Explain the difficulty here.

#### Solution:

The bias current of M4 must be carefully defined so as to track that of M1. Poor matching may “starve” M2 and M3, i.e., reduce their bias currents considerably, creating a high impedance at node P and forcing the RF current to ground through CP. Now, consider the simple current mirror shown in Fig. 6.68. If |VGSVTH|4 = 0.75 V, then |VGS4| may exceed VDD, leaving no headroom for IREF. In other words, |VGSVTH|4 must be chosen less than VDD − | VGS4| − VIREF, where VIREF denotes the minimum acceptable voltage across IREF.

Figure 6.68 Current mirror voltage limitations.

In order to suppress the capacitance and noise contribution of M4 in Fig. 6.68, an inductor can be placed in series with its drain. Illustrated in Fig. 6.69(a) [9], such an arrangement not only enhances the input transconductance but allows the inductor to resonate with CP. Additionally, capacitor C1 acts as a short at RF, shunting the noise current of M4 to ground. As a result, most of the RF current produced by M1 is commutated by M2 and M3, and the noise injected by M2 and M3 is also reduced (because they switch more abruptly).

Figure 6.69 (a) Use of inductive resonance at tail with helper current source, (b) equivalent circuit of inductor.

In the circuit of Fig. 6.69(a), the inductor parasitics must be managed carefully. First, L1 contributes some capacitance to node P, equivalently raising CP. Second, the loss of L1 translates to a parallel resistance, “wasting” the RF current and adding noise. Depicted in Fig. 6.69(b), this resistance, R1, must remain much greater than 1/(2gm2,3) so as to negligibly shunt the RF current. Also, its noise current must be much less than that of M1. Thus, the choice of the inductor is governed by the following conditions:

(6.117)-(6.119)

where CP,tot includes the capacitance of L1.

The circuits of Figs. 6.67 and 6.69 suffer from a drawback in deep-submicron technologies: since M1 is typically a small transistor, it poorly matches the current mirror arrangement that feeds M4. As a result, the exact current flowing through the switching pair may vary considerably.

Figure 6.70 shows another topology wherein capacitive coupling permits independent bias currents for the input transistor and the switching pair [10]. Here, C1 acts as a short circuit at RF and L1 resonates with the parasitics at nodes P and N. Furthermore, the voltage headroom available to M1 is no longer constrained by (VGSVTH)2,3 and the drop across the load resistors. In a typical design, ID1/I0 may fall in the range of 3 to 5 for optimum performance. Note that if I0 is excessively low, the switching pair does not absorb all of the RF current. Another important attribute is that, as formulated by Eq. (6.97), a smaller I0 leads to lower flicker noise at the output.

Figure 6.70 Active mixer using capacitive coupling with resonance.

#### 6.4.3 Active Mixers with High IP2

As explained in Chapter 4, the second intercept point becomes critical in direct-conversion and low-IF receivers as it signifies the corruption introduced by the beating of two interferers or envelope demodulation of one interferer. We also noted that capacitive coupling between the LNA and the mixer removes the low-frequency beat, making the mixer the bottleneck. Thus, a great deal of effort has been expended on high-IP2 mixers.

It is instructive to compute the IP2 of a single-balanced mixer in the presence of asymmetries. (Recall from Chapter 4 that a symmetric mixer has an infinite IP2.) Let us begin with the circuit of Fig. 6.71(a), where VOS denotes the offset voltage associated with M2 and M3. We wish to compute the fraction of ISS that flows to the output without frequency translation. As with the flicker noise calculations in Section 6.3.2, we assume LO and exhibit a finite slope but M2 and M3 switch instantaneously, i.e., they switch the tail current according to the sign of VAVB.

Figure 6.71 (a) Active mixer with offset voltage, (b) effect of offset on LO waveforms, (c) duty cycle distortion of drain currents, (d) circuit for IP2 computation.

As shown in Fig. 6.71(b), the vertical shift of VLO displaces the consecutive crossings of LO and by ± ΔT, where ΔT = VOS/SLO and SLO denotes the differential slope of the LO (= 2Vp,LOωLO). This forces M2 to remain on for TLO/2 + 2 ΔT seconds and M3 for TLO/2 − 2 ΔT seconds. It follows from Fig. 6.71(c) that the differential output current, ID2ID3 contains a dc component equal to (4 ΔT/TLO)ISS = VOSISS/(πVp,LO), and the differential output voltage a dc component equal to VOSISSRD/(πVp,LO). As expected, this result agrees with Eq. (6.97) because the offset can be considered a very slow noise component.

An interesting observation offered by the output 1/f noise and offset equations is as follows. If the bias current of the switching pair is reduced but that of the input transconductor is not, then the performance improves because the gain does not change but the output 1/f noise and offset fall. For example, the current helpers described in the previous section prove useful here.

We now replace ISS with a transconductor device as depicted in Fig. 6.71(d) and assume

(6.120)

where VGS0 is the bias gate-source voltage of M1. With a square-law device, the IM2 product emerges in the current of M1 as

(6.121)

Multiplying this quantity by VOSRD/(πVp,LO) yields the direct feedthrough to the output:

(6.122)

To calculate the IP2, the value of Vm must be raised until the amplitude of VIM2,out becomes equal to the amplitude of the main downconverted components. This amplitude is simply given by (2/π)gm1RDVm. Thus,

(6.123)

Writing gm1 as μnCox(W/L)(VGSVTH)1, we finally obtain

(6.124)

For example, if (VGSVTH)1 = 250 mV, Vp,LO = 300 mV, and VOS = 10 mV, then VIIP2 = 30 VP (= 39.5 dBm in a 50-Ω system). Other IP2 mechanisms are described in [12].

The foregoing analysis also applies to asymmetries in the LO waveforms that would arise from mismatches within the LO circuitry and its buffer. If the duty cycle is denoted by (TLO/2 − ΔT)/TLO (e.g., 48%), then the dc component in ID1ID2 is equal to (2 ΔT/TLO)ISS, yielding an average of (2 ΔT/TLO)ISSRD at the output. We therefore replace ISS with the IM2 component given by Eq. (6.121), arriving at

(6.125)

Equating the amplitude of this component to (2/π)gm1RDVm and substituting μnCox(W/L)(VGSVTH)1 for gm1, we have

(6.126)

For example, a duty cycle of 48% along with (VGSVTH)1 = 250 mV gives rise to VIIP2 = 7.96 VP (= 28 dBm in a 50-Ω system).

In order to raise the IP2, the input transconductor of an active mixer can be realized in differential form, leading to a double-balanced topology. Shown in Fig. 6.72, such a circuit produces a finite IM2 product only as a result of mismatches between M1 and M2. We quantify this effect in the following example. Note that, unlike the previous double-balanced mixers, this circuit employs a tail current source.

Figure 6.72 Input offset in a double-balanced mixer.

Assuming square-law devices, determine the IM2 product generated by M1 and M2 in Fig. 6.72 if the two transistors suffer from an offset voltage of VOS1.

#### Solution:

For an RF differential voltage, ΔVin, the differential output current can be expressed as

(6.127)

Assuming that the second term under the square root is much less than the first, we write :

(6.128)

The cubic term in the square brackets produces an IM2 component if ΔVin = Vm cos ω1t + Vm cos ω2t because the term leads to the cross product of the two sinusoids:

(6.129)-(6.130)

where (VGSVTH)eq represents the equilibrium overdrive of each transistor. Of course, only a small fraction of this component appears at the output of the mixer. For example, if only the offset of the switching quad, VOS2, is considered,9 then the IM2 amplitude must be multiplied by VOS2RD/(πVp,LO), yielding an IIP2 of

(6.131)

For example, if (VGSVTH)eq = 250 mV, Vp,LO = 300 mV, and VOS1 = VOS2 = 10 mV, then VIIP2 = 1000 Vp (= + 70 dBm in a 50-Ω system).

While improving the IP2 significantly, the use of a differential pair in Fig. 6.72 degrades the IP3. As formulated in Chapter 5, a quasi-differential pair (with the sources held at ac ground) exhibits a higher IP3. We now repeat the calculations leading to Eq. (6.131) for such a mixer (Fig. 6.73), noting that the input pair now has poor common-mode rejection. Let us apply and , obtaining

(6.132)

(6.133)

Figure 6.73 Effect of offsets in a double-balanced mixer using a quasi-differential input pair.

While independent of VOS1, the low-frequency beat in ID1 is multiplied by a factor of VOS2RD/(πVp,LO) and that in ID2 by VOS3RD/(πVp,LO). Here, VOS2 and VOS3 denote the offsets of M3M4 and M5M6, respectively. The output thus exhibits an IM2 component given by

(6.134)

Noting that the output amplitude of each fundamental is equal to (2/π)2Vmgm1RD and that gm1 = μnCox(W/L)1(VGS0VTH), we have

(6.135)

For example, if VGSVTH = 250 mV, Vp,LO = 300 mV, and VOS2 = VOS3 = + 10 mV, then VIIP2 = 30 Vp (= + 39.5 dBm in a 50-Ω system). Comparison of the IIP2’s obtained for the differential and quasi-differential mixers indicates that the latter is much inferior, revealing a trade-off between IP2 and IP3.

We have thus far considered one mechanism leading to a finite IP2: the passage of the low-frequency beat through the mixer’s switching devices. On the other hand, even with no even-order distortion in the transconductor, it is still possible to observe a finite low-frequency beat at the output if (a) the switching devices (or the LO waveforms) exhibit asymmetry and (b) a finite capacitance appears at the common source node of the switching devices [11, 12]. In this case, two interferers, Vm cos ω1t + Vm cos ω2t, arriving at the common source node experience nonlinearity and mixing with the LO harmonics, thereby generating a component at ω1ω2 after downconversion. The details of this mechanism are described in [11, 12].

While conceived for noise and gain optimization reasons, the mixer topology in Fig. 6.70 also exhibits a high IP2. The high-pass filter consisting of L1, C1, and the resistance seen at node P suppresses low-frequency beats generated by the even-order distortion in M1. From the equivalent circuit shown in Fig. 6.74, we have

(6.136)-(6.137)

Figure 6.74 Effect of low-frequency beat in a mixer using capacitive coupling and resonance.

At low frequencies, this result can be approximated as

(6.138)

revealing a high attenuation.

Another approach to raising the IP2 is to degenerate the transconductor capacitively. As illustrated in Fig. 6.75 [10], the degeneration capacitor, Cd, acts as a short circuit at RF but nearly an open circuit at the low-frequency beat components. Expressing the transconductance of the input stage as

(6.139)-(6.140)

we recognize that the gain at low frequencies falls in proportion to Cds, making M1 incapable of generating second-order intermodulation components.

Figure 6.75 Effect of capacitive degeneration on IP2.

The mixer of Fig. 6.75 is designed for a 900-MHz GSM system. What is the worst-case attenuation that capacitive degeneration provides for IM2 products that would otherwise be generated by M1? Assume a low-IF receiver (Chapter 4).

#### Solution:

We must first determine the worst-case scenario. We may surmise that the highest beat frequency experiences the least attenuation, thereby creating the largest IM2 product. As depicted in Fig. 6.76(a), this situation arises if the two interferers remain within the GSM band (so that they are not attenuated by the front-end filter) but as far from each other as possible, i.e., at a frequency difference of 25 MHz. Let us assume that the pole frequency, gm/Cd, is around 900 MHz. The IM2 product therefore falls at 25 MHz and, therefore, experiences an attenuation of roughly 900 MHz/25 MHz = 36 (≈ 31 dB) by capacitive degeneration. However, in a low-IF receiver, the downconverted 200-kHz GSM channel is located near zero frequency. Thus, this case proves irrelevant.

Figure 6.76 Beat generation from (a) two blockers near the edges of GSM band, (b) two closely-spaced blockers in GSM band.

From the above study, we seek two interferers that bear a frequency difference of 200 kHz (i.e., adjacent channels). As shown in Fig. 6.76(b), we place the adjacent interferers near the edge of the GSM band. Located at a center frequency of 200 kHz, the beat experiences an attenuation of roughly 935 MHz/200 kHz = 4, 675 ≈ 73 dB. It follows that very high IP2’s can be obtained for low-IF 900-MHz GSM receivers.

As mentioned earlier, even with capacitive coupling between the transconductor stage and the switching devices, the capacitance at the common source node of the switching pair ultimately limits the IP2 (if the offset of the switching pair is considered). We therefore expect a higher IP2 if an inductor resonates with this capacitance. Figure 6.77 shows a double-balanced mixer employing both capacitive degeneration and resonance to achieve an IP2 of + 78 dBm [11].

Figure 6.77 Use of inductor at sources of switching quad to raise IP2.

#### 6.4.4 Active Mixers with Low Flicker Noise

Our study of noise in Section 6.3.2 revealed that the downconverted flicker noise of the switching devices is proportional to their bias current and the parasitic capacitance at their common source node. Since these trends also hold for the IP2 of active mixers, we postulate that the techniques described in Section 6.4.3 for raising the IP2 lower flicker noise as well. In particular, the circuit topologies in Figs. 6.69 and 6.74 both allow a lower bias current for the switching pair and cancel the tail capacitance by the inductor. This approach, however, demands two inductors (one for each quadrature mixer), complicating the layout and routing.

Let us return to the helper idea shown in Fig. 6.67 and ask, is it possible to turn on the helper only at the time when it is needed? In other words, can we turn on the PMOS current source only at the zero crossings of the LO so that it lowers the bias current of the switching devices and hence the effect of their flicker noise [13]? In such a scheme, the helper itself would inject only common-mode noise because it turns on only when the switching pair is in equilibrium.

Figure 6.78 depicts our first attempt in realizing this concept. Since large LO swings produce a reasonable voltage swing at node P at 2ωLO, the diode-connected transistor turns on when LO and cross and VP falls. As LO or rises, so does VP, turning MH off. Thus, MH can provide most of the bias current of M1 near the crossing points of LO and while injecting minimal noise for the rest of the period.

Figure 6.78 Use of a diode-connected device to reduce switching pair current.

Unfortunately, the diode-connected transistor in Fig. 6.78 does not turn off abruptly as LO and depart from their crossing point. Consequently, MH continues to present a low impedance at node P, shunting the RF current to ac ground. This issue can be resolved in a double-balanced mixer by reconfiguring the diode-connected devices as a cross-coupled pair [13]. As illustrated in Fig. 6.79 [13], MH1 and MH2 turn on and off simultaneously because VP and VQ vary identically—as if MH1 and MH2 were diode-connected devices. Thus, these two transistors provide most of the bias currents of M1 and M4 at the crossing points of LO and . On the other hand, as far as the differential RF current of M1 and M4 is concerned, the cross-coupled pair acts as a negative resistance (Chapter 8), partially cancelling the positive resistance presented by the switching pairs at P and Q. Thus, MH1 and MH2 do not shunt the RF current.

Figure 6.79 Use of cross-coupled pair to reduce current of switching quad.

The circuit of Fig. 6.79 nonetheless requires large LO swings to ensure that VP and VQ rise rapidly and sufficiently so as to turn off MH1 and MH2.10 Otherwise, these two devices continue to inject differential noise for part of the period. Another drawback of this technique is that it does not lend itself to single-balanced mixers.

The positive feedback around MH1 and MH2 in Fig. 6.79 may cause latchup, i.e., a slight imbalance between the two sides may pull P (or Q) toward VDD, turning MH2 (or MH1) off. Derive the condition necessary to avoid latchup.

#### Solution:

The impedance presented by the switching pairs at P and Q is at its highest value when either transistor in each differential pair is off (why?). Shown in Fig. 6.80 is the resulting worst case. For a symmetric circuit, the loop gain is equal to (gmH/gm2,5)2, where gmH represents the transconductance of MH1 and MH2. To avoid latchup, we must ensure that

(6.141)

Figure 6.80 Equivalent circuit for latchup calculation.

The notion of reducing the current through the switching devices at the crossing points of LO and can alternatively be realized by turning off the transconductor momentarily [14]. Consider the circuit shown in Fig. 6.81(a), where switch S1 is driven by a waveform having a frequency of 2fLO but a duty cycle of, say, 80%. As depicted in Fig. 6.81(b), S1 briefly turns the transconductor off twice per LO period. Thus, if the crossing points of LO and are chosen to fall at the times when IP is zero, then the flicker noise of M2 and M3 is heavily attenuated. Moreover, M2 and M3 inject no thermal noise to the output near the equilibrium. The concept can be extended to quadrature double-balanced mixers [14]. In Problem 6.12, we decide whether this circuit can also be viewed as a differential pair whose current is modulated (chopped) at a rate of 2fLO.

Figure 6.81 (a) Use of a switch to turn off the switching pair near LO zero crossings, (b) circuit waveforms.

The above approach entails a number of issues. First, the turn-off time of the transconductor must be sufficiently long and properly phased with respect to LO and so that it encloses the LO transitions. Second, at high frequencies it becomes difficult to generate 2fLO with such narrow pulses; the conversion gain thus suffers because the transconductor remains off for a greater portion of the period. Third, switch S1 in Fig. 6.81 does consume some voltage headroom if its capacitances must be negligible.

### 6.5 Upconversion Mixers

The transmitter architectures studied in Chapter 4 employ upconversion mixers to translate the baseband spectrum to the carrier frequency in one or two steps. In this section, we deal with the design of such mixers.

#### 6.5.1 Performance Requirements

Consider the generic transmitter shown in Fig. 6.82. The design of the TX circuitry typically begins with the PA and moves backward; the PA is designed to deliver the specified power to the antenna while satisfying certain linearity requirements (in terms of the adjacent-channel power or 1-dB compression point). The PA therefore presents a certain input capacitance and, owing to its moderate gain, demands a certain input swing. Thus, the upconversion mixers must (1) translate the baseband spectrum to a high output frequency (unlike downconversion mixers) while providing sufficient gain, (2) drive the input capacitance of the PA, (3) deliver the necessary swing to the PA input, and (4) not limit the linearity of the TX. In addition, as studied in Chapter 4, dc offsets in upconversion mixers translate to carrier feedthrough and must be minimized.

Figure 6.82 Generic transmitter.

Explain the pros and cons of placing a buffer before the PA in Fig. 6.82.

#### Solution:

The buffer relaxes the drive and perhaps output swing requirements of the upconverter. However, it may contribute significant nonlinearity. For this reason, it is desirable to minimize the number of stages between the mixers and the antenna.

The interface between the mixers and the PA entails another critical issue. Since the baseband and mixer circuits are typically realized in differential form, and since the antenna is typically single-ended, the designer must decide at what point and how the differential output of the mixers must be converted to a single-ended signal. As explained in Chapter 5, this operation presents many difficulties.

The noise requirement of upconversion mixers is generally much more relaxed than that of downconversion mixers. As studied in Problem 6.13, this is true even in GSM, wherein the amplified noise of the upconversion mixers in the receive band must meet certain specifications (Chapter 4).

The interface between the baseband DACs and the upconversion mixers in Fig. 6.82 also imposes another constraint on the design. Recall from Chapter 4 that high-pass filtering of the baseband signal introduces intersymbol interference. Thus, the DACs must be directly coupled to the mixers to avoid a notch in the signal spectrum.11 As seen below, this issue dictates that the bias conditions in the upconversion mixers be relatively independent of the output common-mode level of the DACs.

#### 6.5.2 Upconversion Mixer Topologies

##### Passive Mixers

The superior linearity of passive mixers makes them attractive for upconversion as well. We wish to construct a quadrature upconverter using passive mixers.

Our study of downconversion mixers has revealed that single-balanced sampling topologies provide a conversion gain that is about 5.5 dB higher than their return-to-zero counterparts. Is this true for upconversion, too? Consider a low-frequency baseband sinusoid applied to a sampling mixer (Fig. 6.83). The output appears to contain mostly the input waveform and little high-frequency energy. To quantify our intuition, we return to the constituent waveforms, y1(t) and y2(t), given by Eqs. (6.12) and (6.16), respectively, and reexamine them for upconversion, assuming that x(t) is a baseband signal. The component of interest in Y1(f) still occurs at k = ± 1 and is given by

(6.142)

Figure 6.83 Sampling mixer for upconversion.

For Y2(f), we must also set k to ±1:

(6.143)

However, the term in the second set of brackets must be evaluated at the upconverted frequency. If ω = ωLO + ωBB, where ωBB denotes the baseband frequency, then exp(−jωTLO/2) = exp(−) exp(−BBTLO/2), which, for ωBB 2fLO, reduces to −(1− BBTLO/2). Similarly, if ω = − ωLOωBB, then exp(−jωTLO/2) ≈ − (1 + BBTLO/2). Adding Y1(f) and Y2(f) gives

(6.144)

indicating that the upconverted output amplitude is proportional to ωBB/(ωLO + ωBB) ≈ ωBB/ωLO. Thus, such a mixer is not suited to upconversion.

In Problem 6.14, we study a return-to-zero mixer for upconversion and show that its conversion gain is still equal to 2/π (for a single-balanced topology). Similarly, from Example 6.8, a double-balanced passive mixer exhibits a gain of 2/π. Depicted in Fig. 6.84(a), such a topology is more relevant to TX design than single-balanced structures because the baseband waveforms are typically available in differential form. We thus focus on double-balanced mixers here.

Figure 6.84 (a) Double-balanced upconversion passive mixer, (b) use of resonance to increase bandwidth.

While simple and quite linear, the circuit of Fig. 6.84(a) must deal with a number of issues. First, the bandwidth at nodes X and Y must accommodate the upconverted signal frequency so as to avoid additional loss. This bandwidth is determined by the on-resistance of the switches (Ron), their capacitance contributions to the output nodes, and the input capacitance of the next stage (Cin). Wider switches increase the bandwidth up to the point where their capacitances overwhelm Cin, but they also present a greater capacitance at the LO ports.

It is possible to null the capacitance at nodes X and Y by means of resonance. As illustrated in Fig. 6.84(b) [15], inductor L1 resonates with the total capacitance at X and Y, and its value is chosen to yield

(6.145)

where CX,Y denotes the capacitances contributed by the switches at X or Y. At resonance, the mixers are loaded by the parallel equivalent resistance of the inductor, R1 = QL1ωIF. Thus, we require that 2Ron R1 to avoid additional loss. This technique becomes necessary only at very high frequencies, e.g., at 50 GHz and above.

The second issue relates to the use of passive mixers in a quadrature upconverter, where the outputs of two mixers must be summed. Unfortunately, passive mixers sense and produce voltages, making direct summation difficult. We therefore convert each output to current, sum the currents, and convert the result to voltage. Figure 6.85(a) depicts such an arrangement. Here, the quasi-differential pairs M1M2 and M3M4 perform V/I conversion, and the load resistors, I/V conversion. This circuit can provide gain while lending itself to low supply voltages. The grounded sources of M1M4 also yield a relatively high linearity.12

Figure 6.85 (a) Summation of quadrature outputs, (b) bias definition issue.

A drawback of the above topology is that its bias point is sensitive to the input common-mode level, i.e., the output CM level of the preceding DAC. As shown in Fig. 6.85(b), ID1 depends on VBB and varies significantly with process and temperature. For this reason, we employ ac coupling between the mixer and the V/I converter and define the latter’s bias by a current mirror. Alternatively, we can resort to true differential pairs, with their common-source nodes at ac ground (Fig. 6.86). Defined by the tail currents, the bias conditions now remain relatively independent of the input CM level, but each tail current source consumes voltage headroom.

Figure 6.86 Addition of tail current to define bias of upconversion V/I converters.

The trade-off between the voltage drop across RD in Fig. 6.85(a) and the voltage gain proves undesirable, especially because M1M4 must be biased with some margin with respect to the triode region so as to preserve their linearity in the presence of large signals. Explain how this trade-off can be avoided.

#### Solution:

Since the output center frequency of the upconverter is typically in the gigahertz range, the resistors can be replaced with inductors. Illustrated in Fig. 6.87, such a technique consumes little headroom (because the dc drop across the inductor is small) and nulls the total capacitance at the output by means of resonance.

Figure 6.87 Use of inductive loads to relax upconversion mixer headroom constraints.

The third issue concerns the available overdrive voltage of the mixer switches, a particularly serious problem in Fig. 6.85(b). We note that M5 can be ac coupled to M1, but still requiring a gate voltage of VTH5 + VGS1 + VBB to turn on. Thus, if the peak LO level is equal to VDD, the switch experiences an overdrive of only VDD − (VTH5 + VBB), thereby suffering from a tight trade-off between its on-resistance and capacitance. A small over-drive also degrades the linearity of the switch. For example, if VDD = 1 V, VTH5 = 0.3 V, and VBB = 0.5 V, then the overdrive is equal to 0.2 V. It is important to recognize that the use of inductors in Fig. 6.87 relaxes the headroom consumption from VDD through RD and M1, but the headroom limitation in the path consisting of VDD, VGS5, and VBB still persists.

The foregoing difficulty can be alleviated if the peak LO level can exceed VDD. This is accomplished if the LO buffer contains a load inductor tied to VDD (Fig. 6.88).

Now, the dc level of the LO is approximately equal to VDD, with the peak reaching VDD + V0. For example, if VDD = 1 V, VTH5 = 0.3 V, VBB = 0.5 V, and V0 = 0.5 V, then the overdrive of M5 is raised to 0.7 V.

The above-VDD swings in Fig. 6.88 do raise concern with respect to device voltage stress and reliability. In particular, if the baseband signal has a peak amplitude of Va and a CM level of VBB, then the gate-source voltage of M5 reaches a maximum of VDD + V0 − (VBBVa), possibly exceeding the value allowed by the technology. In the above numerical example, since the overdrive of M5 approaches 0.7 V, VGS5 = 0.7 V + VTH5 = 1 V in the absence of the baseband signal. Thus, if the maximum allowable VGS is 1.2 V, the baseband peak swing is limited to 0.2 V. As explained in Chapter 4, small baseband swings exacerbate the problem of carrier feedthrough in transmitters.

It is important to note that, by now, we have added quite a few inductors to the circuit: one in Fig. 6.84(b) to improve the bandwidth, one in Fig. 6.87 to save voltage headroom, and another in Fig. 6.88 to raise the overdrive of the switches. A quadrature upconverter therefore requires a large number of inductors. The LO buffer in Fig. 6.88 can be omitted if the LO signal is capacitively coupled to the gate of M5 and biased at VDD.

##### Carrier Feedthrough

It is instructive to study the sources of carrier feedthrough in a transmitter using passive mixers. Consider the baseband interface shown in Fig. 6.89, where the DAC output contains a peak signal swing of Va and an offset voltage of VOS,DAC.

Figure 6.89 Effect of baseband offset in upconversion mixing.

An ideal double-balanced passive mixer upconverts both the signal and the offset, producing at its output the RF (or IF) signal and a carrier (LO) component. If modeled as a multiplier, the mixer generates an output given by

(6.146)

where α is related to the conversion gain. Expanding the right-hand side yields

(6.147)

Since α/2 = 2/π for a double-balanced mixer, we note that the carrier feedthrough has a peak amplitude of αVOS,DAC = (4/π)VOS,DAC. Alternatively, we recognize that the relative carrier feedthrough is equal to αVOS,DAC/(αVa/2) = 2VOS,DAC/Va. For example, if VOS,DAC = 10mV and Va = 0.1 V, then the feedthrough is equal to −34 dB.

Let us now consider the effect of threshold mismatches within the switches themselves. As illustrated in Fig. 6.90(a), the threshold mismatch in one pair shifts the LO waveform vertically, distorting the duty cycle. That is, is multiplied by the equivalent waveforms shown in Fig. 6.90(b). Does this operation generate an output component at fLO? No, carrier feedthrough can occur only if a dc component in the baseband is mixed with the fundamental LO frequency. We therefore conclude that threshold mismatches within passive mixers introduce no carrier feedthrough.13

Figure 6.90 (a) Offset in a passive upconversion mixer, (b) effect on LO waveforms.

If asymmetries in the LO circuitry distort the duty cycle, does the passive mixer display carrier feedthrough?

#### Solution:

In this case, the two switching pairs in Fig. 6.90(a) experience the same duty cycle distortion. The above analysis implies that each pair is free from feedthrough, and hence so does the overall mixer.

The carrier feedthrough in passive upconversion mixers arises primarily from mismatches between the gate-drain capacitances of the switches. As shown in Fig. 6.91, the LO feedthrough observed at X is equal to

(6.148)

where CX denotes the total capacitance seen from X to ground (including the input capacitance of the following stage).

Figure 6.91 LO feedthrough paths in a passive mixer.

Calculate the relative carrier feedthrough for a CGD mismatch of 5%, CX ≈ 10CGD, peak LO swing of 0.5 V, and peak baseband swing of 0.1 V.

#### Solution:

At the output, the LO feedthrough is given by Eq. (6.148) and approximately equal to (5%/12)VLO = 2.1 mV. The upconverted signal has a peak amplitude of 0.1V × (2/π) = 63.7 mV. Thus, the carrier feedthrough is equal to −29.6 dB.

##### Active Mixers

Upconversion in a transmitter can be performed by means of active mixers, facing issues different from those of passive mixers. We begin with a double-balanced topology employing a quasi-differential pair (Fig. 6.92). The inductive loads serve two purposes, namely, they relax voltage headroom issues and raise the conversion gain (and hence the output swings) by nulling the capacitance at the output node. As with active downconversion mixers studied in Section 6.3, the voltage conversion gain can be expressed as

(6.149)

where Rp is the equivalent parallel resistance of each inductor at resonance.

Figure 6.92 Active upconversion mixer.

With only low frequencies present at the gates and drains of M1 and M2 in Fig. 6.92, the circuit is quite tolerant of capacitance at nodes P and Q, a point of contrast to downconversion mixers. However, stacking of the transistors limits the voltage headroom. Recall from downconversion mixer calculations in Section 6.3 that the minimum allowable voltage at X (or Y) is given by

(6.150)

if the dc drop across the inductors is neglected. For example, if VGS1VTH1 = 300mV and VGS3VTH3 = 200mV, then VX,min = 640mV, allowing a peak swing of VDDVX,min = 360mV at X if VDD = 1 V. This value is reasonable.

Equation 6.150 allocates a drain-source voltage to the input transistors equal to their overdrive voltage. Explain why this is inadequate.

#### Solution:

The voltage gain from each input to the drain of the corresponding transistor is about −1. Thus, as depicted in Fig. 6.93, when one gate voltage rises by Va, the corresponding drain falls by approximately Va, driving the transistor into the triode region by 2Va. In other words, the VDS of the input devices in the absence of signals must be at least equal to their overdrive voltage plus 2Va, further limiting Eq. (6.150) as

(6.151)

Figure 6.93 Voltage excursions in an active upconversion mixer.

The output swing is therefore small. If Va = 100 mV, then the above numerical example yields a peak output swing of 160 mV.

Unfortunately, the bias conditions of the circuit of Fig. 6.92 heavily depend on the DAC output common-mode level. Thus, we apply the modification shown in Fig. 6.86, arriving at the topology in Fig. 6.94(a) (a Gilbert cell). This circuit faces two difficulties. First, the current source consumes additional voltage headroom. Second, since node A cannot be held at ac ground by a capacitor at low baseband frequencies, the nonlinearity is more pronounced. We therefore fold the input path and degenerate the differential pair to alleviate these issues [Fig. 6.94(b)].

Figure 6.94 (a) Gilbert cell as upconversion mixer, (b) mixer with folded input stage.

Determine the maximum allowable input and output swings in the circuit of Fig. 6.94(b).

#### Solution:

Let us consider the simplified topology shown in Fig. 6.95. In the absence of signals, the maximum gate voltage of M1 with respect to ground is equal to VDD − |VGS1| − |VI1|, where |VI1| denotes the minimum allowable voltage across I1. Also, VP = VI3. Note that, due to source degeneration, the voltage gain from the baseband input to P is quite smaller than unity. We therefore neglect the baseband swing at node P. For M1 to remain in saturation as its gate falls by Va volts,

(6.152)

and hence

(6.153)

Figure 6.95 Simplified folded mixer diagram.

For the output swing, Eq. (6.150) is modified to

(6.154)

The tolerable output swing is thus greater than that of the unfolded circuit.

Despite degeneration, the circuit of Fig. 6.94(b) may experience substantial nonlinearity if the baseband voltage swing exceeds a certain value. We recognize that, if Vin1Vin2 becomes sufficiently negative, |ID1| approaches I3, starving M3 and M5. Now, if the differential input becomes more negative, M1 and I1 must enter the triode region so as to satisfy KCL at node P, introducing large nonlinearity. Since the random baseband signal occasionally assumes large voltage excursions, it is difficult to avoid this effect unless the amount of degeneration (e.g., RS) is chosen conservatively large, in which case the mixer gain and hence the output swing suffer.

The above observation indicates that the current available to perform upconversion and produce RF swings is approximately equal to the difference between I1 and I3 (or between I2 and I4). The maximum baseband peak single-ended voltage swing is thus given by

(6.155)-(6.156)

##### Mixer Carrier Feedthrough

Transmitters using active upconversion mixers potentially exhibit a higher carrier feedthrough than those incorporating passive topologies. This is because, in addition to the baseband DAC offset, the mixers themselves introduce considerable offset. In the circuits of Figs. 6.92 and 6.94(a), for example, the baseband input transistors suffer from mismatches between their threshold voltages and other parameters. Even more pronounced is the offset in the folded mixer of Fig. 6.94(b), as calculated in the following example.

Figure 6.96(a) shows a more detailed implementation of the folded mixer. Determine the input-referred offset in terms of the threshold mismatches of the transistor pairs. Neglect channel-length modulation and body effect.

Figure 6.96 (a) Role of bias current sources in folded mixer, (b) effect of offsets.

#### Solution:

As depicted in Fig. 6.96(b), we insert the threshold mismatches and seek the total mismatch between IP and IQ. To obtain the effect of VOS10, we first recognize that it generates an additional current of gm10VOS10 in M10. This current is split between M2 and M1 according to the small-signal impedance seen at node E, namely,

(6.157)

(6.158)

The resulting mismatch between IP and IQ is given by the difference between these two:

(6.159)

where gm1,2 = gm1 = gm2. Note that this contribution becomes more significant as the degeneration increases, approaching gm10VOS10 for RS 2/gm1,2.

The mismatch between M3 and M4 simply translates to a current mismatch of gm4VOS4. Adding this component to Eq. (6.159), dividing the result by the transconductance of the input pair, (RS/2 + 1/gm1,2)−1, and adding VOS1, we arrive at the input-referred offset:

(6.160)

This expression imposes a trade-off between the input offset and the overdrive voltages allocated to M9M10 and M3M4: for a given current, gm = 2ID/(VGSVTH) increases as the overdrive decreases, raising VOS,in.

In addition to offset, the six transistors in Fig. 6.96(a) also contribute noise, potentially a problem in GSM transmitters.14 It is interesting to note that LO duty cycle distortion does not cause carrier feedthrough in double-balanced active mixers. This is studied in Problem 6.15.

Active mixers readily lend themselves to quadrature upconversion because their outputs can be summed in the current domain. Figure 6.97 shows an example employing folded mixers.

Figure 6.97 Summation of quadrature outputs.

##### Design Procedure

As mentioned in Section 6.1, the design of upconversion mixers typically follows that of the power amplifier. With the input capacitance of the PA (or PA driver) known, the mixer output inductors, e.g., L1 and L2 in Fig. 6.97, are designed to resonate at the frequency of interest. At this point, the capacitance contributed by the switching quads, Cq, is unknown and must be guessed. Thus,

(6.161)

where CL includes the input capacitance of the next stage and the parasitic of L1 or L2. Also, the finite Q of the inductors introduces a parallel equivalent resistance given by

(6.162)

If sensing quadrature baseband inputs with a peak single-ended swing of Va, the circuit of Fig. 6.97 produces an output swing given by

(6.163)

where the factor of results from summation of quadrature signals, 2Va denotes the peak differential swing at each input, and gmp is the transconductance of the input PMOS devices. Thus, RS, gmp, and Va must be chosen so as to yield both the required output swing and proper linearity.

How do we choose the bias currents? We must first consider the following example.

The tail current of Fig. 6.98 varies with time as ISS = I0 + I0 cos ωBBt. Calculate the voltage swing of the upconverted signal.

Figure 6.98 Simplified stage for swing calculation.

#### Solution:

We know that ISS is multiplied by (2/π)Rp as it is upconverted. Thus, the output voltage swing at ωLOωBB or ωLO + ωBB is equal to (2/π)I0Rp. We have assumed that ISS swings between zero and 2I0, but an input transistor experiencing such a large current variation may become quite nonlinear.

The above example suggests that I0 must be sufficiently large to yield the required output swing. That is, with Rp known, I0 can be calculated. A double-balanced version of the circuit generates twice the output swing, and a quadrature topology (Fig. 6.97) raises the result by another factor of , delivering a peak output swing of . With I0 (= I3/2 = I4/2 in Fig. 6.97) known, we select I1 = I2 = I3/2 = I4/2.

How do we select the transistor dimensions? Let us first consider the switching devices, noting that each switching pair in Fig. 6.97 carries a current of nearly I3 (= I4) at the extremes of the baseband swings. These transistors must therefore be chosen wide enough to (1) carry a current of I3 while leaving adequate voltage headroom for I3 and I4, and (2) switch their tail currents nearly completely with a given LO swing.

Next, the transistors implementing I3 and I4 are sized according to their allowable voltage headroom. Lastly, the dimensions of the input differential pair and the transistors realizing I1 and I2 are chosen. With these choices, the input-referred offset [Eq. (6.160)] must be checked.

An engineer designs a quadrature upconversion mixer for a given output frequency, a given output swing, and a given load capacitance, CL. Much to her dismay, the engineer’s manager raises CL to 2CL because the following power amplifier must be redesigned for a higher output power. If the upconverter output swing must remain the same, how can the engineer modify her design to drive 2CL?

#### Solution:

Following the calculations outlined previously, we observe that the load inductance and hence Rp must be halved. Thus, all bias currents and transistor widths must be doubled so as to maintain the output voltage swing. This in turn translates to a higher load capacitance seen by the LO. In other words, the larger PA input capacitance “propagates” to the LO port. Now, the engineer designing the LO is in trouble.

### References

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[3] S. Zhou and M. C. F. Chang, “A CMOS Passive Mixer with Low Flicker Noise for Low-Power Direct-Conversion Receivers,” IEEE J. of Solid-State Circuits, vol. 40, pp. 1084, 1093, May 2005.

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[5] A. Mirzaei et al., “Analysis and Optimization of Current-Driven Passive Mixers in Narrow-band Direct-Conversion Receivers,” IEEE J. of Solid-State Circuits, vol. 44, pp. 2678–2688, Oct. 2009.

[6] D. Kaczman et al., “A Single-Chip 10-Band WCDMA/HSDPA 4-Band GSM/EDGE SAW-less CMOS Receiver with DigRF 3G Interface and +90-dBm IIP2,” IEEE J. Solid-State Circuits, vol. 44, pp. 718–739, March 2009.

[7] H. Darabi and A. A. Abidi, “Noise in RF-CMOS Mixers: A Simple Physical Model,” IEEE J. of Solid-State Circuits, vol. 35, pp. 15–25, Jan. 2000.

[8] W. H. Sansen and R. G. Meyer, “Distortion in Bipolar Transistor Variable-Gain Amplifiers,” IEEE Journal of Solid-State Circuits, vol. 8, pp. 275–282, Aug. 1973.

[9] B. Razavi, “A 60-GHz CMOS Receiver Front-End,” IEEE J. of Solid-State Circuits, vol. 41, pp. 17–22, Jan. 2006.

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[15] B. Razavi, “CMOS Transceivers for the 60-GHz Band,” IEEE Radio Frequency Integrated Circuits Symposium, pp. 231–234, June 2006.

### Problems

6.1. Suppose in Fig. 6.13, the LNA has a voltage gain of A0 and the mixers have a high input impedance. If the I and Q outputs are simply added, determine the overall noise figure in terms of the NF of the LNA and the input-referred noise voltage of the mixers.

6.2. Making the same assumptions as in the above problem, determine the noise figure of a Hartley receiver. Neglect the noise of the 90°-phase-shift circuit and the output adder.

6.3. Consider the circuit of Fig. 6.99, where C1 and C2 are identical and represent the gate-source capacitances in Fig. 6.15(b). Assume V1 = −V2 = V0 cos ωLOt.

Figure 6.99 Capacitors driven by differential waveforms.

(a) If C1 = C2 = C0(1 + α1V), where V denotes the voltage across each capacitor, determine the LO feedthrough component(s) in Vout. Assume α1V 1.

(b) Repeat part (a) if C1 = C2 = C0(1 + α1V + α2V2).

6.4. We express Vn1 in Fig. 6.29(c) as the product of the shaped resistor noise voltage and a square wave toggling between 0 and 1. Prove that the spectrum of Vn1 is given by Eq. (6.31).

6.5. Prove that the voltage conversion gain of a sampling mixer approaches 6 dB as the width of the LO pulses tends to zero (i.e., as the hold time approaches the LO period).

6.6. Consider the LO buffer shown in Fig. 6.55. Prove that the noise of M5 and M6 appears differentially at nodes A and B (but the noise due to the loss of the tanks does not).

6.7. In the active mixer of Fig. 6.57, In,M1 contains all frequency components. Prove that the convolution of these components with the harmonics of the LO in essence multiplies 4kTγ/gm by a factor of π2/4.

6.8. If transistors M2 and M3 in Fig. 6.60(a) have a threshold mismatch of VOS, determine the output flicker noise due to the flicker noise of ISS.

6.9. Shown in Fig. 6.100 is the front end of a 1.8-GHz receiver. The LO frequency is chosen to be 900 MHz and the load inductors and capacitances resonate with a quality factor of Q at the IF. Assume M1 is biased at a current of I1, and the mixer and the LO are perfectly symmetric.

(a) Assuming M2 and M3 switch abruptly and completely, compute the LO-IF feedthrough, i.e., the measured level of the 900-MHz output component in the absence of an RF signal.

(b) Explain why the flicker noise of M1 is critical here.

Figure 6.100 Front-end chain for a 1.8-GHz RX.

6.10. Suppose the helper in Fig. 6.67 reduces the bias current of the switching pair by a factor of 2. By what factor does the input-referred contribution of the flicker noise fall?

6.11. In the circuit of Fig. 6.67, we place a parallel RLC tank in series with the source of M4 such that, at resonance, the noise contribution of M4 is reduced. Recalculate Eq. (6.116) if the tank provides an equivalent parallel resistance of Rp. (Bear in mind that Rp itself produces noise.)

6.12. Can the circuit of Fig. 6.81(a) be viewed as a differential pair whose tail current is modulated at a rate of 2fLO? Carry out the analysis and explain your result.

6.13. Suppose the quadrature upconversion mixers in a GSM transmitter operate with a peak baseband swing of 0.3 V. If the TX delivers an output power of 1 W, determine the maximum tolerable input-referred noise of the mixers such that the transmitted noise in the GSM RX band does not exceed −155 dBm.

6.14. Prove that the voltage conversion gain of a single-balanced return-to-zero mixer is equal to 2/π even for upconversion.

6.15. Prove that LO duty cycle distortion does not introduce carrier feedthrough in double-balanced active mixers.

6.16. The circuit shown in Fig. 6.101 is a dual-gate mixer used in traditional microwave design. Assume when M1 is on, it has an on-resistance of Ron1. Also, assume abrupt edges and a 50% duty cycle for the LO and neglect channel-length modulation and body effect.

Figure 6.101 Dual-gate mixer.

(a) Compute the voltage conversion gain of the circuit. Assume M2 does not enter the triode region and denote its transconductance by gm2.

(b) If Ron1 is very small, determine the IP2 of the circuit. Assume M2 has an overdrive of VGS0VTH in the absence of signals (when it is on).

6.17. Consider the active mixer shown in Fig. 6.102, where the LO has abrupt edges and a 50% duty cycle. Also, channel-length modulation and body effect are negligible. The load resistors exhibit mismatch, but the circuit is otherwise symmetric. Assume M1 carries a bias current of ISS.

(a) Determine the output offset voltage.

(b) Determine the IP2 of the circuit in terms of the overdrive and bias current of M1.

Figure 6.102 Active mixer with load mismatch.

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