14.1.3.1 Trends in Filters and Switches

In the receiver path, filters are used to eliminate the unwanted RF signals. In the transmit direction, they attenuate out-of-band noise and spurious emissions to ease coexistence effects between bands and terminals. For each supported FDD band of operation, Figure 14.10 shows that three filters and an antenna switch are required: two band-pass filters (BPF) in the duplexer and one BPF in the diversity receiver branch. The number of throws in antenna switches is driven by the number of bands that must be supported. For example, Figure 14.5 shows that switches have evolved from single pole 6 throw (SP6T) devices in 2003, to SP12T in 2013. This number is obviously bound to grow in coming years with increasing band count, support for LTE-TDD and Carrier Aggregation. Carrier Aggregation also raises additional RF performance requirements – improved linearity for example (Section 14.1.3.5) – and the need for a diplexer to further separate the aggregated bands.

For switches, only an improvement in technology can lead to significant cost reductions. Legacy GaAs PHEMT solutions are being replaced with cheaper single die SOI (Silicon on Insulator) semiconductor technology. In the world of RF filtering, the ideal solution would make use of tuneable RF filters to address cost reduction. Research is ongoing in this area and initial tuneable duplexers [14] show promising results, but these are far from meeting the stringent FDD operation isolation/insertion loss requirements. In practice, the approaches taken to reduce cost/PCB footprint area essentially fall into three categories: component miniaturization, co-banding, and module integration.

The main challenge in filter miniaturization has been and still remains to maintain low insertion loss while delivering high attenuation. Filter technology rapidly evolved from ceramic to SAW filters, a technology based on ceramic piezoelectric materials. It is complemented by silicon BAW/FBAR¹⁰ technology for the most demanding requirements related to short duplex distance and for frequency of operation beyond 2 GHz. An illustration of the efforts made for duplexers is shown in Figure 14.9: the size of the 2003 ceramic duplexer was 10 × 5 × 2 mm. SAW-based duplexers introduced around 2005–2008 shrank to 2 × 2.5 × 1.1 mm (Figure 14.9b), whereas the latest mass-produced models come in packages of 1.8 × 1.4 × 0.5 mm for SAW and 2.0 × 1.6 × 0.9 mm for FBAR (Figure 14.9c). Compared to the initial ceramic devices, the size is remarkably reduced to 1/15 in area ratio and 1/60 in volume ratio for SAW devices.

Co-banding is a technique which consists of sharing RF filters in bands for which multimode operation must be supported. For example, in band II (PCS 1900), rather than implementing an EGPRS RX chain with a dedicated PCS RX BPF, it is tempting to reuse the antenna to RX path of the band II/band 2 FDD duplexer required for LTE and HSPA operation. By routing EGPRS through the duplexer, one RF BPF is saved. The drawback of this approach is that the duplexer insertion losses are usually higher than that of a standalone BPF, thereby leading to a slight degradation in EGPRS sensitivity. An example of co-banding is shown in Figure 14.5g (2011). In practical terms, if co-banding was applied to UE [15], the 17 frequency bands supported by this terminal could be reduced to only 8 unique RF receiver paths and 4 transmitter line-ups: bands 1, 2, 5, and 8 could be common to LTE, WCDMA, and EGPRS, band 4 common to LTE and WCDMA, band 3 common to LTE and EGPRS, leaving band 20 and band 7 as specific bands to LTE. In reality, the tradeoff between cost savings and performance degradation depends on OEMs/operator targets. For example, in many instances, the performance loss of co-banding EGPRS with LTE in band 3 is not acceptable and leads to separate RF paths for each air interface.

For a higher level of integration, and therefore in a move to achieve further PCB area savings, the switching and filtering functionalities may be integrated into a module also commonly known as a FEM (Front-End Module). An example of a block diagram of a FEM is presented in Figure 14.10. Compared to a discrete filtering solution, such modules enable significant component count savings. Nevertheless FEMs show less flexibility when adapting the band support configuration. Therefore, existing solutions are customized to match the specific requirements of a phone manufacturer for a given variant. In this respect, FEMs make the most economical sense when applied to a band combination needed in a large number of variants where volumes are high and therefore production costs are lower. The 3G WW band combination I, II, IV, V, VIII is one example. The more exotic the band combination, the more difficult it becomes to justify a custom FEM design. With the number of band combinations increasing, OEMs need to carefully study which band combinations are worth integrating for future products. At the time of writing, the most advanced FEMs deliver further savings by integrating some of the TRX LNA matching components.

Looking ahead into Carrier Aggregation (CA) solutions, the optimized bank of duplexers may not always lead to the best cost/performance tradeoff, depending on the CA band combinations. Solutions based on more complex RF multiplexers, such as quad or hexaplexers, could deliver interesting alternatives. Quadplexers are not the simple concatenation of two duplexers: they consist of four individual bandpass filters (BPF) connected to a common terminal antenna port. As such, each BPF differs from those used in duplexer designs. For example, the TX BPF of a duplexer is designed with the main constraints of delivering high TX noise rejection at the RX band (cf. Section 14.1.2). In the example of a quadplexer, each TX BPF has to reject TX noise into two distinct RX frequency bands. This increases the number of constraints (zeros in the stopband) under which the BPF must be designed. Depending on band combination, the designer may have to tradeoff isolation in return for insertion losses. One additional factor leading to higher losses comes from the matching networks required to ensure that each filter does not load each other. The main advantage of multiplexers is that they simplify the RF front-end architecture. An example using two high and two low hypothetical frequency bands is shown in Figure 14.11 below and illustrates the tradeoff between cost and complexity.

Figure 14.11a uses a common diplexer to all bands and supports only high–low CA, for example band 1–band 8, or band 2–band 5. The main drawback of this approach is that bands and air interfaces which are not meant to be used in Carrier Aggregation pay an insertion-loss penalty in both uplink and downlink. The use of a quadplexer in Figure 14.11b considerably simplifies the front-end circuitry, since only one antenna switch is required, and each band of operation benefits from a removal of the diplexer. In this example, only a high–high CA is supported, for example band 2–band 4. Figure 14.11c supports both high–high and high–low CA, but the price that must be paid for this extra capability is that of adding a diplexer. Note that this latter configuration also supports triple-band CA at no or little extra cost compared to the dual-CA solution (a). For example, solution (c) could support inter-band triple band CA of bands 2–4–13. It can be seen that with CA, a variety of front-end architectures must be assessed to deliver the optimum cost/performance tradeoff. For each combination, a tradeoff must be found between complexity and performance. These tradeoffs have generated many discussions at 3GPP on ways to determine the insertion loss associated with each configuration, and how these extra losses should be taken into consideration to define reference sensitivity and maximum output power relaxations. As a consequence, for each dual downlink CA scenario, many filter manufacturers' data had to be collected to agree upon an average insertion loss per type of multiplexer. Further complication occurs since insertion losses are heavily design dependent, as well as band, temperature, and process dependent. An example of the tedious and hard-fought agreements can be found in [16].

14.1.3.2 Power Amplifiers

Power amplifiers are no exception to the design constraints and tradeoffs previously mentioned. With highly integrated single chip transceivers, the RF subsystem area is heavily influenced by the area occupied by FE components and in particular PAs. The ideal solution would call for a unique PA which could be reconfigured to support all bands and all air interface standards. In practice, two approaches are taken to deliver the best compromise between performance and cost: discrete architectures based either on several single-band PAs, or the use of a MMMB PA architecture complemented by a few single-band PAs.

In discrete PA architectures, the most common solution uses a quad-band EGPRS (QBE) power amplifier module (PAM) and dedicated single-band PAs for each WCDMA/LTE band. When the band is common to both WCDMA and LTE, a unique PA is used for both modes, usually with different linearity settings to accommodate the slightly higher PAPR of LTE transmissions.

In MMMB PA architectures, a single triple-mode PAM replaces the QBE PAM, and some of the WCDMA/LTE single-band PAs. Yet, certain LTE specific bands, such as band 7, are not yet covered by MMMB PAM and therefore require a dedicated single-band PA. Examples of implementations of the two approaches are presented in Figure 14.15: solutions 1 and 3 are discrete architectures; solution 2 uses a MMMB PAM complemented by two single-band PAs (band 4 and band 17).

The evolution of PA package area (L*W in mm²) over the last 4–5 years is shown in Figure 14.12 for three families: single-band, QBE PAM, and MMMB PAMs.

Single-band PAs (squares) have reduced their footprint by a factor 3, from about 16 mm² to about 5 mm². This category has reached a maturity plateau and future packaging technology improvements are unlikely to significantly impact the overall radio area. With 25 mm² package area, and their long history of production and optimization, QBE PAM (triangles) have also reached a level of maturity and will most likely remain at this level for the coming years. The recent increase in area to 36 mm² is due to the integration of an SP8T antenna switch. The initial 2009–2010 MMMB PAMs (diamonds) combined a QBE and support for quad-band WCDMA operation. They rapidly evolved to support dual-mode penta-band, and the triple-mode operation octa-band operation. Remarkably, the 2013–2014 MMMB PAM, which covers QBE, octa-band WCDMA/LTE PAM, and a DP8T band distribution switch comes in a package size comparable (35 mm²) to that of a QBE–SP8T module. It is expected that PA suppliers will invest further efforts into these solutions as triple-mode will soon become a de facto requirement.

The choice of architecture is primarily driven by the tradeoff between cost and size for a given band-set. The vast majority of dual-mode EGPRS-WCDMA terminals support two or three WCDMA bands. In these solutions, the discrete PA architecture is often the most preferred solution as there is little or no cost advantage to using a MMMB PAM. An MMMB PAM becomes advantageous when there are four or more WCDMA/LTE bands to be supported. An example of cost tradeoff selection metrics is shown in Figure 14.13 in the specific case of a North America (NA), triple-mode product¹². Over time, the MMMB PA architecture is expected to provide both size and cost benefits over the discrete PA architecture. From an RF subsystem PCB area perspective, it requires an octa-band MMMB PAM to better the discrete PA solution. From a cost perspective, the dynamics are less trivial as the introduction of such highly integrated products often benefits from a positive spiral effect: the introduction of a smaller package with increased band coverage induces a cost reduction, which induces a production volume increase, which in itself induces a reduction in sales price.

Several other factors come into play when making a selection of architecture:

• – Power consumption: single-band PAs exhibit better power consumption than MMMB PAMs. This is mainly because discrete PA matching networks can be optimized for a narrow frequency range while MMMB PAMs must be matched over a wider band. In addition, MMMB PAM efficiency is lower as they absorb the insertion losses of the band distribution switch,
• – Design effort: MMMB PAMs considerably simplify the PCB place and route task, especially in variants covering a large number of bands. An example of complexity in attempting to cover a future NA-EU variant using discrete PAs is shown for illustration purposes in Figure 14.15.
• – Multiple vendor sourcing management: MMMB PAMs bring a significant advantage over discrete solutions as they reduce the number of references for a terminal model/variant,
• – Ease of reconfigurability: MMMB PAMs, complemented with one or two single-band PAs, provide the best tradeoff today between cost, PCB place and route complexity, area, and ease of reconfiguration to support multiple ecosystems. An illustration of the reconfigurability concept is shown in Figure 14.14 [17], where a MMMB PAM is used to cover QBE and quad-band WCDMA (I, II, V, VIII) and LTE band 20. This example shows that a single reference design may be quickly adapted to serve three different regions of the world with minimal changes, and yet can achieve rather aggressive, and nearly identical, PCB area and component count metrics.

Finally, Figure 14.15 summarizes all of the previous discussions in one place. RF solutions 1 and 2 address the same NA, triple-mode telecom operator variant and illustrate both graphically and quantitatively the significant gains that MMMB PAMs bring to such products: the area is reduced by 150%, and uses half the components. Solution 3 is a prototype which uses single-band PAs and a QBE PAM to target a NA and EU variant in triple-mode operation. In comparison with solution 1, one can see that this PCB is extremely well-optimized, and it covers three additional LTE and one extra WCDMA band with nearly identical PCB metrics. Yet, it is easy to note that the complexity and the cost associated with such architecture would most likely be unacceptable for OEMs. It is evident from this prototype that next-generation variants which attempt to target more than one ecosystem, such as this effort for NA-EU coverage, can only be cost effective through the use of MMMB PAMs. It is estimated that in this example, the use of the latest octa-band MMMB PAM (Figure 14.12, 2013–2014) could save 7 out of the 8 single-band PAs, with band 7 being the only band which would need a dedicated PA. It thus comes as no surprise that the focus for future PA design will almost surely target the use of MMMB modules.

14.1.3.3 Over-the-Air (OTA) Performance

While chip set suppliers are benchmarked by OEMs to deliver the best RF performance in conducted test conditions, and often have to iterate a design to improve performance by a fraction of a dB, telecom operators, on the other hand, are primarily interested in OTA performance. Between these, the OEMs are more concerned with ensuring their products will pass the impressive set of 3GPP/PTCRB/GCF tests. Typically, the test plan of a triple-mode phone involves approximately 1500 tests, the majority of which are conducted tests, and which typically lead to several months of costly testing. When it comes to OTA performance, the dual-mode EGPRS/HSPA UE is measured against two simple Figures of Merit (FOM)¹³: Total Radiated Power (TRP) and Total Isotropic Sensitivity (TIS). Each FOM is then re-measured in different user interaction (UI) scenarios: UE in Free Space (FS), held in a hand phantom¹⁴, placed against a head phantom or held in hand and placed against the head phantom [18]. Figure 14.16 plots the WCDMA TRP vs. TIS performance, in band V and band II, across a sample of 30 class 3 recently PTCRB-certified smartphones. Looking at the conducted results (circles), UEs generally perform within 1 or 2 dB from each other in both axes. In output power, performance ranges across the class 3 tolerances (24 dBm +1/−3 dB), the majority being calibrated to deliver 23 dBm. In sensitivity, all UEs pass with a comfortable margin, but because this metric is used by OEMs to benchmark chip set platforms, the performance spread is much tighter than in TX power. With OTA TRP and TIS, the spread across UI increases dramatically between bands.

For example, in band V the spread between conducted and BHHR varies between 10 and 18 dB. But in band II, the spread is nearly half that of band V, ranging from 5 to 9 dB in both TRP/TIS. In a given band, the difference between conducted and FS gives a good indication of antenna gain, with superior performance in band II as compared to that in band V. This illustrates that designing an antenna with desired performance in low bands is a significant challenge in modern smartphones. Figure 14.17b, shows that the task of the antenna designer is not becoming any easier, since the volume made available is continually reduced. Because of these constraints, it is not unusual for antennae to reach alarming VSWR values as high 10 : 1, corresponding to mismatch losses (ML) of 4.8 dB. This loss impacts TRP and TIS. One can see that with chip sets no longer being loaded/sourced with the ideal 50 Ohm of the conducted tests, the 0 dBi antenna gain assumption made in 3GPP is far from being met in actual situations.

With user interaction, absorption losses (AL), due to the proximity of body tissues, further degrade antenna performance. Absorption losses depend on grip tightness [19] or on the gap between the UE and the human body, with the hand-only test case usually presenting the lowest loss.

Antenna design becomes further complicated for LTE, since devices must then operate over a wider range of frequencies, from the new ultra-high 2600 MHz band to the ultra-low UHF bands (700–800 MHz) at the lower end of the spectrum [15]. The traditional way to optimize matching, which normally consisted of using a single matching network to deliver the best gain over such a large range thus becomes much more difficult to achieve. These constraints have pushed the industry to look into solutions that enable antenna reconfigurability or antenna tuning capabilities. Two approaches are currently being investigated: one is of antenna-tuners connected to a non-tuneable antenna, and the other is antenna tuners associated to antennae with tuneable resonators. Antenna tuners basically consist of a digitally tuneable impedance matching network. Tuners deliver variable reactances by using an array of switched capacitors and fixed inductors often arranged in a pi topology. The digital settings which optimize performance for each band can be pre-calibrated using look-up tables. However, the best agility is accomplished by using a coupler at the antenna port, so real-time VSWR can be monitored and used in a closed-loop operation to continuously deliver optimal performance, independent of UI. In this respect, the advantage of standardizing an RF-FE digital control bus, such as MIPI^® RFFE, allows multiple vendors to be easily interchanged (cf. Section 14.1.3.4). In theory, an antenna tuner should aim at delivering close to 50 Ohm impedance. In practice, depending on the band and antenna structure, the tuner will only be able to partially correct mismatch losses. For example, the study on the impact of grip style in [19] indicates that in most configurations performance is largely dominated by absorption losses, with values ranging from 1.5 to 7 dB loss, while impedance MLs only account for 0.5 to 2.5 dB. In this example an antenna tuner connected to a non-tuneable antenna would not bring significant gains. These moderate gains must be weighed against design challenges associated with front-end circuitry. The linearity requirements for components are high¹⁵ [20], and yet components must deliver minimal losses while meeting the low cost and low PCB footprint targets. This is one of the primary reasons why the industry is looking at ways to improve radiated efficiency by developing tuneable antennae. If the antenna is capable of tuning its resonators to the band of operation, then theoretically it should be possible to deliver enhanced antenna efficiency. In this case, antenna tuners become mandatory since the resonator tuning process induces impedance mismatches. Looking further ahead, some companies are also investigating ways of solving AL degradation by designing antennae with preset radiation patterns. With the set of proximity sensors embedded in modern smartphones, one could imagine a phone capable enough to adapt the antenna tuners based upon proximity detection of the user. At this time it is difficult to assess which technique will be the most promising. Some of the most advanced techniques in mass production today rely on antenna selection switching, with or without limited impedance tuning. This technique consists of replacing the diversity receive antenna with an antenna capable of supporting both transmit and receive frequency bands. In this case the platform may swap the primary and diversity antennae at any time so as to maximize system performance. Note that this scheme will not be applicable to future platforms needing to support transmit diversity.

With MIMO LTE, downlink throughput is the new FOM. MIMO throughput depends on the end-to-end correlation between the two data streams. Consequently, the UE demodulator experiences the product of three matrices: eNodeB TX antennae, RF propagation channel, and UE RX antennae correlation matrix.

Figure 14.17a, shows the impact of the RF channel correlation matrix on a recent triple-mode UE in a conducted test setup. The measurement is performed in AWS band, 10 MHz cell BW, using a 2 × 2 MIMO RF multipath fader. The graph plots UE DL throughput measured by an Anritsu 8820c eNodeB emulator vs. DL full cell BW power under four RF propagation conditions: static bypass mode (dots), low (squares), mid (triangles), and high (crosses) correlation matrices of the 3GPP EPA fading model. For each RF fading model, the DL MCS index is varied to capture the UE behavior across its entire range of demodulation capabilities. To avoid overloading the figure, only a few waterfall curves are shown in light gray dotted lines. The resulting envelope of each waterfall is plotted in plain lines.

This graph provides insights into the susceptibility of LTE MIMO performance to correlation. There are two ways to read this experimental data:

• Case of a user located under an eNodeB, experiencing a high DL RF power of, say, −65 dBm. The difference between low vs. mid, and low vs. high correlation results in a 19% and 42% throughput loss, respectively. In the latter case, the throughput drops from 70 Mbit/s to about 40 Mbit/s. Under high correlation conditions, the impairment is so bad that the BB is unable to deliver more than 54 Mbit/s even at maximum input power (not shown on graph). From a user experience perspective, it is unlikely that this lower-than-expected performance would be noticed, since absolute throughput is not a sufficient metric to guarantee a good user experience (see Chapter 13 for more details). From a telecom operator's perspective, the situation is quite different as this loss prevents the cell from delivering the maximum theoretical performance.
• At a given target throughput, increasing correlation leads to a degraded UE RF sensitivity. For example, at a target 40 Mbit/s, a user experiencing high correlation suffers from a 12 dB penalty in link budget. This penalty increases with increasing target throughput because of the floor in performance of that particular test case. This graph can also be interpreted as a fair illustration of the differences one can expect between operation in high bands (e.g., 2600 MHz) where the antenna should perform well, and low band operation (e.g. 700 MHz). Note that at cell edge, in low SNR conditions, there is little difference in performance.

This graph shows how crucial it is for telecom operators to jointly define with 3GPP a standardized OTA test method. In an ideal world, OTA testing should be able to reproduce and predict field performance. In practice, predicting OTA MIMO user experience appears to be a nearly impossible task because so many variables can impact performance. At worst, OTA testing will deliver a reliable tool to benchmark terminals against one other. Here are a few examples of the challenges – based on recent contributions:

• Contribution [21] has shown that antenna correlation in a smartphone is so sensitive to its close surroundings that the presence of tiny co-axial semi-rigid cables impacts the measurement accuracy. Using optical fiber feeds, FS correlation reached 0.8, a high value, while measurements with semi-rigid feeds indicated a correlation on the order of 0.4. If tiny semi-rigid cables can change the correlation by a factor of two, it is reasonable to assume that the presence of larger objects could induce greater impairments. Unfortunately, the nature of interactions is so complex that no general rule governing the degradation of antenna correlation can be drawn. For example, the study in [22] shows that a smartphone with good FS performance can turn into a poor terminal in the presence of a human body – but the exact opposite is also true. The study in [23] goes a step further by measuring the impact of a real user on antenna correlation vs. FS and phantom head. The study uses prototypes specifically designed to deliver high and low correlation performance in the 700 and 2600 MHz bands. Measurements demonstrate that the difference between high and low correlation decreases with UI, so much so that at 700 MHz, it becomes difficult to distinguish the two prototypes in the presence of a real person. This suggests that any ranking between good and bad devices based on FS and phantom head measurements might not be in agreement with the more subjective rankings resulting from actual use (see also [24]).
• In addition, antenna correlation varies vs. carrier frequency in a given band.
• From the above results, it may be intuitively understood that the angle of arrival also plays an important role. For example, one may expect that the use of phantom head only might not block as many incident waves as would be blocked by real person. This implies that measuring user experience requires a 3D isotropic test setup. 3GPP is assessing three test methods that could fulfill this requirement: anechoic, reverberation chambers, and a two-stage method. With their intrinsic 3D isotropic properties, reverberation chambers are an attractive solution to this problem.
• Another difference between lab measurements and practical user experience is that 3GPP test cases do not include closed-loop interactions between a NodeB and UE. Good MIMO performance is about making the best of the instantaneous radio conditions, either by using frequency selective scheduling or by adapting rank. These closed-loop algorithms are proprietary to each network equipment vendor and cannot be replicated using eNodeB emulators.

These are some of the complex challenges that OEMs, telecom operators, and chip set vendors are currently facing when it comes to defining OTA performance test cases. Not only must 3GPP assess and recommend test methods (AC, RC, or two-stage) but it must also define test conditions and pass/fail criteria to provide operators with a reliable and realistic tool to benchmark devices. Considering the complexity of the interactions between UE antennae and the surroundings, this task is far from trivial.

14.1.3.4 RF Subsystem Control and IQ Interfaces

The conventional RF subsystem architecture relies on analog IQ RF-BB interfaces and a myriad of control interfaces specific to each of the RF-FE components. The primary disadvantages of this approach are twofold:

• – The associated number of pins tends to be larger, which increases package size, cost, and further complicates PCB routing.
• – Dealing with a wide variety of proprietary interfaces restricts the ease with which handset makers can “mix and match” RF-FE components, and often leads to software segmentation.

The example in Figure 14.18 shows a hypothetical downlink-only carrier aggregation RF subsystem focusing on control and IQ interfaces only. In total, 47 pins are required. This number depends on the choice of ICs, such as the type of power amplifier, the number of bands and antennae that are selected for a given handset variant.

The MIPI Alliance¹⁶ RFFE and DigRF v4 digital interfaces have been designed to specifically address these issues. DigRF v4 offers features and capabilities specifically designed for BBIC-RFIC bidirectional exchange of both data and control. With 1.248 GBit/s minimum bus speed, DigRF v4 is a high speed, low voltage swing, point-to-point digital interface. It provides numerous flexible options for implementers, such that aspects like pin count, spectral emissions, power consumption, and other parameters may be optimized for various operating conditions imposed by a given design. While these interface options allow for tradeoffs to be made in a current design, they also provide adaptive growth potential for new services, such as carrier aggregation, without undue modifications to either the interface specification or to existing Intellectual Property (IP) used for building implementations. DigRF uses a minimum of seven pins: a pair of differential lines for RX and a pair for TX with both carrying IQ data and control/status information, a reference clock pin (RefClk), a reference clock enable pin (RefClkEn), and a DigRF interface enable pin (DigRFEn).

The Radio Frequency Front-End Control Interface Specification, or RFFE as it is commonly known, has emerged in recent years as the de facto standard for implementing RF front-end control. Even though other digital control interfaces might provide some of the basic functionality required, RFFE has been designed to address specific needs that are frequently presented, or are increasingly desired, in modern UEs. A single RFFE bus instance supports a single master, along with up to 15 slave devices connected in a point-to-multipoint configuration. Comparatively, RFFE is a low speed, high voltage-swing interface. The master, or major controlling entity for an RFFE interface instantiation, may be hosted within an RFIC, or in some other component such as a BBIC or other device which is suitable for the slightly higher level of integration required for an RFFE controller. An RFFE bus uses three pins: a unidirectional clock line driven by the master (SCLK), a common unidirectional (optionally bidirectional) data line called SDATA, and a common line for voltage referencing, and optionally for supply, called VIO. Some of the high-level characteristics for each of these interfaces are summarized in Table 14.1.

Figure 14.19 shows that applying both interfaces to the example of Figure 14.18 may save up to 32 pins. Note that the system partitioning is implementation-specific and Figure 14.19 is only presented to illustrate cost/pin savings. If the RF IC is already pin count limited, it might be decided to “host” some, or all, of the RFFE buses either in the BBIC or in the PMIC.

Beyond these direct hardware savings, both interfaces provide additional advantages which can be of benefit to both component suppliers and platform designers.

With DigRF, IQ ADCs and DACs are located in the RF TRX. The BB IC may then become a pure digital IC, which helps in decoupling the CMOS node used in each IC. The BB may then be shrunk/ported to the latest CMOS node more easily, while the RF transceiver can remain in an “older” CMOS node which offers a more appropriate performance/cost/power consumption tradeoff specific to the needs of the RF IC. This is particularly important as the latest, most advanced CMOS nodes rarely offer the design libraries required to simulate and design all portions of the complex RF transceiver. Further, the DigRF interface was also defined to assist handset makers to interface RF ICs and BB ICs from different suppliers, which allows more flexibility in component selection. DigRF also provides a standardized and low pin count debug interface to monitor traffic at the IQ interface. Indeed, a number of well-known test equipment providers distribute systems to enable this capability. For chip set makers, DigRF v4 is built upon MIPI's M-PHY, a physical layer IP which, once developed for DigRF, may be reused for other protocols and applications, since an increasing number of applicable standards use the M-PHY physical layer. IP reuse is increasingly important in meeting tough time-to-market deadlines. For example, future generations of DDR memories could make use of M-PHY, and an existing standard for FLASH already leverages M-PHY.

For RF front-end components, the current situation with regards to the types, numbers, and suppliers of these is perhaps even more diverse and far-reaching. To handset makers, RFFE is a tool which considerably simplifies the selection, ease of integration, and swapping of RF-FE components. To RF-FE IC makers, it offers increased opportunities to integrate with many chip set platforms, while implementing a single, widely-deployed control interface. With a wide array of optional features, particularly for slaves, this ensures that a bus and, in particular, the FE components may be optimized for the features implemented vs. cost and the implementation technology. RFFE's wide scope of applicability to FEMs provides increased potential for IP reuse of hardware and/or software.

As with any interfaces deployed in an RF-sensitive area, one must pay special attention to the issues of EMI/co-existence management. The specifics of each of these interfaces leads to different co-existence challenges. The main issue with DigRF v4 in this respect is that even at its lowest operating clock frequency of 1248 MHz, the first spectrum lobe of a pair of lanes overlaps all UHF cellular frequency bands. At 2496 MHz, it is nearly the entire set of 3GPP operating bands which fall under the first lobe. In addition, with high duty cycle operation for standards such as LTE, the probability of collision in the time domain is high. For example, in the case of LTE single carrier 20 MHz operation, the load of a single RX pair of lanes ranges from 137% at 1248 MHz (and thus requires two pairs of lanes) to 67% at 2496 MHz using one lane pair [5]. The inherent flat decay of the common mode PSD also poses some threats to differential LNA input structures. Factors which tend to help in reducing co-existence issues are that the interface may be operated using low voltage swings, in a controlled transmission impedance, and with bus routing that in most handset designs is unlikely to be routed at, or near, the sensitive front-end components such as antennae. RF transceiver pin-to-pin isolation is therefore the main coupling mechanism.

With RFFE being a control interface only, the bus load is often bursty, with only rare instances where higher bus loading might be required. Therefore, the probability of collision in the time domain is lowered. In addition, its relatively low frequency range of operation (32 kHz to 26 MHz) is such that even the lowest cellular frequency bands, such as the LTE 700 MHz bands, are located at the 28th and 22 500th harmonic of the extreme interface rates of 26 MHz and 32 kHz, respectively. This provides plenty of “room” to implement spectrally efficient pulse shaping techniques. Yet, in contrast to DigRF, RFFE voltage swing is higher, and its point-to-multipoint topology can lead to longer PCB traces, some of which may be routed close to sensitive front-end components. Further, since the bus is not designed to be terminated, its impedance is more difficult to control, and any reflections will tend to impair the decay of spectral lobes. Because PSD decays slowly at high harmonic numbers, and pin-to-pin isolation decreases as operating frequency increases, RFFE co-existence issues may dominate above 1 GHz of operation. The most sensitive victim of this may be GPS, which requires aggressor noise PSD < −180 dBm/Hz to prevent less than 0.2 dB desense.

To help both chip set vendors and handset makers foresee co-existence issues in the early phase of product development, and to prepare for them, both DigRF and RFFE working groups anticipated the need to include a set of EMI mitigation tools. These unique features provide a rich, efficient, and yet relatively simple-to-implement set of techniques for reducing the associated impacts in the frequency and the power domains.

• Pulse shaping/slew rate control: Perhaps the most efficient of all EMI tools made available to handset makers. This feature allows shaping of the rising and falling edges of each transmitted bit so as to reduce the power spectral density (PSD) of the digital bit stream. This is available in both DigRF [5] and in RFFE.
• Amplitude control: A simple and yet efficient way of reducing the aggressor PSD. This option is available in DigRF, and also to a certain extent in RFFE, where 1.2 V is also specified in addition to 1.8 V.
• Clock dithering: A useful feature in cases when repetitive and frequent transmissions of a given pulse pattern generate discrete spurs colliding with a cellular victim. This can be the case, for example, for the DigRF training sequence transmitted at the beginning of each burst to ease clock recovery. This tool is available as a part of the DigRF specification. It is also inherent in RFFE, where the master clock may be dithered between messages, since the clock used for control information need not be related to RF data. Also in RFFE, the timing between messages may be randomized, offering some ability to affect the “signature” for both clock and data streams.
• Alternate clock frequency: This feature is available in both interfaces and can be used to either place the victim in the vicinity of a spectral “zero” or “null,” or by placing the victim under a higher order spectral lobe. For example, in DigRF v4, if GPS RX is desensitized when the bus is operated at 1248 MHz, the alternate clock rate of 1496 MHz places the GPS RX in close proximity of the first DigRF spectral null. In this instance, the aggressor PSD is significantly reduced with minimal impact on DigRF performance. In RFFE the extent of any harmonics is relatively narrow, and a slight change in the fundamental may often be utilized to move a resultant spike away from a specific band frequency of interest.

With the increasing need for more reconfigurable RF subsystems, and the mounting complexity in RF-FEs, these interfaces offer handset designers effective means for the solution of complex challenges. The ability to tailor them to specific needs provides component suppliers with an efficient method to achieve faster design cycles and to foster reuse. And, because EMI effects have been taken into consideration from the outset, these interfaces provide features well-suited to the goals and situations of all those involved in UE design. The DigRF interface will be adding 4998 MHz operation as a means to extend applicability to the future higher bandwidth requirements of carrier aggregation. And work is underway on RFFE to further enhance interface throughput, which will help to improve critical timing, and provide even more bandwidth for increasingly complex RF-FEs. Thus both of these interfaces offer continued promise for the future of handset design through cost minimization and complexity reduction, while also maximizing business opportunities.

14.1.3.5 Co-Existence Challenges

The principles of co-existence have been introduced in Section 14.1.2, where due to the full duplex nature of WCDMA, a UE located at cell edge may be desensitized due to its own transmitter being operated at maximum output power. In this relatively simple example, solutions range from the use of external SAW filters, to novel RF TRX architectures, and in the most challenging cases to 3GPP relaxations.

Co-existence issues become significantly more complex when multiple radios start to interact with each other, or when a radio is operated in the presence of internal jammers that are not enabled during conformance tests. For example, WCDMA receiver sensitivity may be impacted by USB high speed harmonics during a UE to external PC media transfer. In SoCs, aggressors range from simple clock harmonics, to noisy high speed digital buses associated with DSP, CPUs, camera and display interfaces, high current rating DC–DC converters, USB and HDMi ports. As for victims, nearly all RF subsystems are susceptible to EMI interference. Further complexity arises from the fact that RF transmitter chains are not exempt from becoming victims of these digital aggressors. Desensitization occurs when aggressors collide with victims in time, frequency, and power domains. In SoCs, both conducted and electromagnetic coupling may occur. The WCDMA UE RF self-desense is one example of conducted coupling. Coupling via power supply rails and/or ground currents is another. Electromagnetic coupling may occur via pin-to-pin interactions, bonding wires, PCB track-to-track, and even antenna-to-antenna coupling. Problems are exacerbated when collisions occur between the cellular and the connectivity radios. For example, the third harmonics of band 5 fall into WLAN 2.4 GHz, while the WLAN 5 GHz receiver might become victim of either band 2, or band 4 third harmonics, or band 5 seventh harmonics. The number of scenarios may become so great that co-existence studies often have to be performed using a multidimensional systems analysis. This topic constitutes an excellent playing field for innovative mitigation techniques, which commonly fall into two categories:

• Improve victim's immunity by increasing isolation in all possible domains: floor plan optimization, careful PCB layout, the use of RF and power supply filters as well as RF shielding. Victims may also be protected by ensuring non-concurrent operations in time.
• Reduce the aggressor signal level. Slew rate and voltage swing control are two of the most efficient techniques to reduce the level of interference at RF. Slew rate control consists in shaping the rising and falling edges of digital signals. This results in an equivalent low-pass filtering of the digital signal high-frequency content, and therefore helps to reduce the aggressor power spectral density in the victim's bands. For example, DigRF^SMv4 line drivers are equipped with slew rate control as a tool to reduce EMI. Frequency evasion is another commonly used technique [25]. For example, if the harmonic of a digital clock is identified as a source of desensitization, it is tempting to slightly alter the clock frequency only when the victim is tuned to the blocked channel. Frequency avoidance can be implemented by either simple frequency offset, or by dithering (e.g., DigRF^SMv4, Section 14.1.3.4), frequency hopping, or even by using direct sequence spreading of the clock.

The well-documented example of Band 4 (B4) – Band 17 (B17) carrier aggregation is a good illustration of co-existence issues within the cellular RF subsystem. B17 transmitter chain third harmonics (H3) can entirely overlap the B4 receiver frequency band. Nearly all components in the RF-FE generate B17 H3, with the PA being, of course, the dominant source. It has been shown in [26] that the sole contribution of the PA would cause 36 to 43 dB B4 RX desensitization, therefore calling for the insertion of a harmonic rejection filter. This might not solve the problem entirely since other sources of leakage, such as PCB coupling and TRX pin-to-pin isolation may dominate system performance [27]. Given reasonable PCB isolation and typical component contributions, B4 RX desense should not exceed 7 to 9 dB for 10 MHz and 5 MHz bandwidth operation respectively [28].

14.2.4.1 Deep Sleep State

This state is similar to that achieved in standby/idle cell state. The UE runs off a low power, low frequency clock. Most UEs rely on a low cost 32.768 kHz crystal to maintain the minimum required number of HW blocks active. This state allows timers such as real-time clock and system frame number (SFN) to be updated at the lowest possible power consumption. In low-cost solutions, a tradeoff is often found between crystal oscillator cost/power consumption and oscillator jitter performance. A high 32 kHz jitter may require the UE to remain in DS state for a time long enough to ensure accurate SFN tracking. This prevents the UE from entering DS for certain DRX cycle lengths. In DS state, the entire RF subsystem is switched off, the BB modem is partially supplied, but no SW code is executed. A limited number of low-drop out (LDO) and DC–DC converters are activated. All power supply regulators dedicated to peripherals are switched off whenever possible (GPS, SD card, USB bus, etc.). Figure 14.30a shows that continuous efforts are made to improve the deep sleep state power consumption: the performance has improved by a factor of 2 across three generations of chip set. Controlling leakage current is key to delivering best in class performance in this state. One common strategy in SoC devices relies on hierarchical power domain distribution schemes as a complement to a clock distribution tree [39,40].

14.2.4.2 Light Sleep State

The cellular subsystem runs off a low phase noise reference clock, which, depending on chip set vendors, is either a 26 MHz or a 19.2 MHz crystal. Most of the BB modem LDOs and DC–DC converters are active and the modem executes SW code. In most implementations, the RF subsystem is switched off. Architectures which rely on “smart RF transceivers” may maintain the TRX digital core active. The LS power consumption follows the general trends in reducing the active state power consumption optimization across generations of platforms [41]. Figure 14.30a shows power consumption has nearly improved by a factor of 2 over three generations.

14.2.4.3 DS to Active State Transition (wake-up “t_wup”)

This transition is a complex cascade of HW and SW events to progressively bring all HW blocks to the active state, in the fastest (shortest rise time) and most power efficient way. Power supplies rails, or power domains, are usually activated in a hierarchical scheme [39]. When a large number of gates must be activated, the sequential power-up technique helps prevent current rush/surge issues [40] from occurring. Due to battery internal resistance, these surges may generate a drop in battery voltage which at low operating voltages could, for example, trigger a UE shutdown sequence if detected by the power management unit. The sequential power-up delay between successive domains depends on the nature of the activity of the block being supplied. Delays range from 50–100 μs for digital PLL, 80–150 μs for RF LO PLL synthesizers, to 500 μs DC–DC converter typical settling time, to 2 ms required to stabilize the low phase noise reference clock oscillator (26 or 19.2 MHz). As soon as HW blocks are supplied, numerous activities can be parallelized to minimize wake-up time (t_wup). The near factor of 2 reduction of t_wup achieved across three generations of triple mode UEs shown in Figure 14.30b shows that despite the complexity of the task, chip sets are able to continuously improve performance.

14.2.4.4 Active State (“t_on”) – Transition from DS

Several SW and HW tasks must be executed to prepare the subsystem for physical channel demodulation/modulation. From a SW perspective, resuming the SW context requires fetching data in LP-DDR to fill up the processor local cache memory. Depending on the operating system, and modem protocol stack complexity, this task can take several milliseconds. From an RF subsystem point of view, multiple initialization tasks must be executed. Preparing the receiver chain includes but is not limited to the following steps:

• Receiver self calibration (VCOs, channel filters).
• Switch on local oscillator and tune RF PLL frequency.
• Configure RX chain transceiver filters.
• Set antenna switch to selected band of operation.
• Switching on LNA and mixer.
• Prepare AGC algorithm: initial fast gain acquisition or tracking mode?
• Set the initial RX chain gain (LNA, mixer, I/Q analog VGAs).
• Switch on I/Q ADC (in RF transceiver if digital IQ interface, in modem BB otherwise).

Once the RF IC is ready, a critical algorithm to deliver a power efficient performance is that of fast gain control, also sometimes referred to as fast gain acquisition (FGA). In WCDMA, this should ideally be completed within less than one timeslot (666.66 μs). FGA is common to compressed mode and DRX operation. Its goal is to ensure the I/Q ADC is operated at its optimal back-off. Because of multipath fading, a compromise must be found between RRSS (receiver radio signal strength) integration period to ensure good I_or power measurement accuracy, the number of gain corrections, gain step size boundaries, and initial gain settings to ensure convergence to the target ADC back-off across the entire UE dynamic range in a minimum number of steps. Most chip sets manage to achieve this task using three gain adjustments. One of the challenges with FGA is that ZIF receiver self-mixing due to uplink carrier leakage generates a time varying DC offset which, if not cancelled, could lead to erroneous I_or power measurements. DC offset compensation in WCDMA is often achieved via an equivalent high-pass filtering function, either in analog IQ, digital IQ, or a combination of coarse analog IQ and fine digital IQ DC offset compensation. The higher the equivalent HPF cut-off frequency, the higher the EVM. Since, during FGA, only RRSS measurement accuracy matters (i.e., EVM is not a concern), fast DC settling time can be achieved by selecting a high cut-off frequency. Once FGA is completed, the DC offset compensation circuitry must resume its low EVM, low cut-off frequency. The target ADC back-off can then be locked through a standard AGC loop. Finally, the UE must perform RF channel estimation. With the introduction of recent high-speed train fading profiles, the UE may have to adapt its channel estimation averaging time and update rate based on an estimation of its velocity. At high speed, a longer and more frequent channel estimation might be required. These are some of the key tasks the system must complete prior to demodulation.

14.2.4.5 LS to Active State Transition (“t_on-LS”)

In most UEs, this task consists in activating the RF subsystem as the entire modem and SW code is active. The delays associated with this task are those of the previously listed sequence. The active time which follows a transition from LS state (“t_on-LS”) should in theory be shorter since the only tasks required are: program default gain, and frequency values, perform FGA, and channel estimation. In the example of Figure 14.29b, t_wup-LS lasts less than 1 ms and t_on-LS is approximately equal to 2.6 ms for an eNodeB DRX cycle “on duration” of 1 ms.

14.2.4.6 Active State to LS to DS Transition

Switching off the RF subsystem is more straightforward and faster than the activation procedure. All blocks can be switched off nearly instantaneously. The remaining power-down delays are SW stack-related.

Finally, Figure 14.31 shows the CPC battery savings that are achieved in practice on a recent triple-mode UE operating in band 4. The measurements are performed using an Anritsu 8475a NodeB emulator during an FTP download sequence restricting the UE to operate in single cell mode, HSDPA cat 14, HSUPA cat 6. CPC parameters are similar to those of Chapter 4, Table 4.1. It can be seen that despite large inactive gaps, the UE power consumption profile is far from reaching the ideal DS power consumption. In this case, the UE power consumption savings are 18% with screen “off,” and 7% when the screen is activated. The average downlink MAC layer throughput is approximately 12 Mbit/s.

Figure 14.32 has been captured by stalling the FTP download process so as to minimize the impact of background FTP server application SW tasks onto the cellular subsystem power consumption. The UE remains in CPC DTX DRX connected mode, with very few packets to receive (near zero downlink throughput), or transmit. The graph shows the UE power consumption profile closely matching the UE TX power mask when CPC is activated. The power consumption bumps between two transmissions are likely related to DRX activity. The screen is “off” but the FTP server application is still running in the background. The UE power consumption savings are close to 51%.