11

Amplifier gains

Introduction

Operational amplifiers, or op-amps, are perhaps the most common building blocks found in analogue circuits. They can be used to create amplification stages very easily, and many other types of circuit besides. There are very many ‘op-amp cookbooks’ around that give lots of these circuits, so we won’t add to them here. The main purpose of this chapter is to present you with a pair of tables to enable easy selection of resistor values for any desired gain.

We’ll take a moment, however, to state the two rules that govern an op-amp’s behaviour for the purpose of achieving a first-off analysis of their circuits:

1. The input terminals of op-amps draw no current.

2. The output of the op-amp does whatever it can to keep the voltage between the input terminals at zero.

These two statements are something of a generalization, but they are fine if you want to work out what an op-amp circuit is doing.

There are two common ways to use op-amps as amplifier stages. We look at them next.

Inverting op-amp

Figure 11.1 shows a basic inverting op-amp circuit. This circuit can be used to give either attenuation or gain with two resistors. The output is in antiphase with the input. The gain is given by:

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Figure 11.1 Inverting op-amp

image (11.1)

Values of R1 and R2 can be found from Table 11.1, where gain is given both as a ratio and in dBs. R1 and R2 may, of course, be scaled by factors of 10 without affecting the gain. The Table only shows values above unity gain (0 dB). If you need to select a pair of resistors to give attenuation, then the Table can still be used, but the positions of R1 and R2 should be switched. The dB column then reads attenuation directly, or the AV column the reciprocal of gain expressed as a ratio.

Table 11.1

Inverting op-amp gains

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The input resistance of the circuit is equal to the value of the input resistor, R1.

The output resistance is, for practical purposes, negligible. (Limitations on its ability to drive a load will be dependent on maximum values of output current, voltage swing and slew rate, for which the manufacturer’s data on the chip used should be consulted.)

It is sometimes desirable to limit the frequency response of the circuit. The standard method is to add suitable value capacitors, as in Figure 11.2. C1, in series with the input resistor, limits low frequency response, while C2, in parallel with R2, limits high frequency response. Each gives a 6 dB/octave slope, as for the first order LPF and HPF described in Chapter 9. The equations for the lower −3dB point, ft–, and the upper−3 dB point, ft+, are also similar:

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Figure 11.2 Inverting op-amp with restricted bandwidth

image (11.2a)

Example 11.1: give suitable values for an inverting op-amp circuit with a gain of 15 dB, and an input resistance of between 20k and 30k. Determine suitable values for C1 and C2 to make the upper and lower−3 dB points as near as possible to 100 Hz and 15 kHz respectively, using standard E12 capacitors.

Table 11.1 gives many combinations, close to 15 dB, but to meet the requirement for input resistance R1 should be between 20k and 30k. We take the pair 2k7/15k, and multiply by 10, so that R1 = 27k and R2 = 150k.

To find values for C1 and C2, we transpose Eqn (11.2a):

image (11.2b)

and get:

1. C1 = 59 nF (ideal) – nearest is 56 nF, substitute back into Eqn (11.2) to get ft– = 105Hz

2. C2 = 71 pF (ideal) – nearest is 68 pF, giving ft+ – 15.6 kHz

Non-inverting op-amp

Figure 11.3 shows a non-inverting op-amp circuit, in its most basic configuration. This circuit has a gain as follows:

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Figure 11.3 Non-inverting op-amp

image (11.3)

This means that the circuit can only provide gain of greater than 1. Its input impedance is very large, and is not usually taken into account. As with the inverting op-amp, its output impedance is very low, with the same restrictions on output drive applying (Figure 11.4).

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Figure 11.4 Non-inverting op-amp with restricted bandwidth

Where it is desired to restrict the bandwidth of the stage, capacitors C1 and C2 are added. The calculations are identical to those for the inverting stage. Note that with C1 in this position the input signal must have some defined DC level. If the input is connected using a DC block capacitor then C1 must be omitted so that the op-amp has a DC reference. If it is desired to limit the low frequency response of the stage it is sometimes better to connect the input via a suitable high-pass filter, as described in Chapter 9.

The main advantage of this stage (other than its being non-inverting) is that of its input impedance. It makes an ideal buffer stage, after circuits which are sensitive to load impedance (such as the reactive circuits described in Part Two).

Where it is desired to use this circuit without gain, purely as a buffer stage, it is customary to omit R1 and make R2 short circuit – i.e. to link the output terminal to the inverting input terminal, as in Figure 11.5. This is a ‘voltage follower’. The output is identical to the input, but comes from a very low source impedance.

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Figure 11.5 A voltage foower

Values for R1 and R2 for the non-inverting amplifier can be selected using Table 8.1, in the ‘Voltage dividers’ chapter. The dB column gives values of gain directly, and the A column values of the reciprocal of gain as a ratio. R1 from the table should be fitted as position R2 from Figure 11.3 and R2 as R1. As usual, R1 and R2 can be scaled by factors of 10 if desired.

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