9.2. Semiconductors and switch valves

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9.2. Semiconductors and switch valves

9.2.1. Semiconductor power losses

The power semiconductor devices (PSDs) used in WECS are operated as switches, taking on two possible static states, conducting or blocking, and two possible transition states, turn-on action or turn-off action. In any of these states, one energy dissipation component is generated, which heats the semiconductor and adds to the total power dissipation of the switch. Fig. 9.1 shows the simplified device switching waveforms (voltage and current) and the power losses associated with each possible operation state of the power switch.

9.2.1.1. Conduction loss

Static loss is determined by the non-linear voltage–current characteristic of the PSD. A typical voltage–current characteristic of a PSD is shown in Fig. 9.2. The two static states or regions can be noted from Fig. 9.2, blocking state (v_sw < 0) is characterized by a very small current compared with the nominal current of the device, while the conducting state characteristic (v_sw > 0) is branded by small voltage (comparing with nominal blocking voltage V_bk) for currents smaller than the maximum permitted current of the device.

Figure 9.1 Possible states of a semiconductor power switch with the simplified device switching waveforms and its power loss estimation.

Figure 9.2 Typical voltage–current characteristic of a semiconductor device.

The instantaneous power loss of the semiconductor at static state can be calculated as the product of the device voltage (v_sw) and current (i_sw). When the switch is in blocking state, the device leaks a very small current (thousands or millions of times smaller than the nominal current) for any voltage lower than the nominal V_bk of the PSD, and the blocking loss is only contributing to a minor share of the total power dissipation; therefore this loss may be neglected in PSDs (Xu, 2002). In fact, the voltage–current characteristic in the blocking region is usually not reported by PSD manufacturers.

The conduction loss (P_cond) can be calculated as (Mirjafari and Balog, 2014):

$P_{cond} = V_{sw 0} (T_{j, AVG}) \cdot I_{sw, AVG} + R_{C} (T_{j, AVG}) \cdot I_{sw, RMS}^{2}$

[9.4]

where T_j,AVG is the average junction temperature, I_sw,AVG is the average current, and I_sw,RMS is the RMS current the device is conducting in a period. The values of I_sw,AVG and I_sw,RMS can be calculated based on the input/output current of converter and are mainly dependent on the converter topology, modulation strategy and input/output power factor (examples of calculation are presented in Section 9.5).

The parameters V_sw0 (threshold voltage) and R_C (on-state resistance) can be calculated using the datasheet for each device. As an example, the characteristics describing the relationships between voltage and current of the IGBT and diode as given in the datasheet of the power module Infineon FZ1500R33HE3 (Infineon, 2013) are shown in Fig. 9.3. The voltage–current characteristic is dependent on the junction temperature (T_j) as shown in Fig. 9.3, where two different T_j values are considered for each device.

To describe the temperature dependency of the curve the parameters V_sw0 and R_C can be made temperature-dependent. The order of the approximation will depend on the availability of curve data at different operating temperatures. Normally, the datasheet includes data of two or three operating temperatures, so a linear approximation can be done:

$V_{sw 0} (T_{j}) = V_{sw 00} \cdot (1 + \propto_{V_{sw 0}} \cdot (T_{j} - T_{j 0}))$

[9.5]

$R_{C} (T_{j}) = R_{C 0} \cdot (1 + \propto_{R_{c}} (T_{j} - T_{j 0}))$

[9.6]

where

\propto_{V_{sw 0}}

and

\propto_{R_{c}}

are the temperature coefficients of V_sw0 and R_C, respectively; T_j0 is a fixed reference T_j; V_sw00 and R_C0 are the V_sw0 and R_C at temperature T_j0.

9.2.1.2. Switching losses

On the other hand, the transition losses, also called switching losses (P_sw), are calculated based on the energy dissipated during commutation, E_sw,on and E_sw,off for turn-on and turn-off, respectively. This commutation energy loss (E_sw) mainly depends on the voltage in the PSD at the moment before turn-on action (v_swb) or after turn-off action (v_swa), the current through the PSD at moment after turn-on action (i_swa) or before turn-off action (i_swb). In order to model these dependencies, the following model is proposed to calculate E_sw using the data commonly available in the datasheets of the devices:

Figure 9.3 Current–voltage conduction characteristic of the power module Infineon FZ1500R33HE3 for two different junction temperatures 125 and 150°C.

$E_{sw, on} = E_{sw 0, on} \cdot (1 + \propto_{E_{on}} \cdot (T_{j} - T_{j 0}))$

[9.7]

$E_{sw 0, on} = v_{swb} \cdot (K_{E_{on 0}} + K_{E_{on 1}} \cdot i_{swa} + K_{E_{on 2}} \cdot {i_{swa}}^{2})$

[9.8]

$E_{sw,off} = E_{sw 0,off} \cdot (1 + \propto_{E_{off}} \cdot (T_{j} - T_{j 0}))$

[9.9]

$E_{sw 0,off} = v_{swa} \cdot (K_{E_{off 0}} + K_{E_{off1}} \cdot i_{swb} + K_{E_{off2}} \cdot {i_{swb}}^{2})$

[9.10]

where

\propto_{E_{on/off}}

is the temperature coefficient of E_sw,on/off; T_j0 is a fixed reference temperature; E_sw0,on/off is the E_sw,on/off at temperature T_j0; and

K_{E_{(on/off) 0}}

K_{E_{(on/off) 1}}

K_{E_{(on/off) 2}}

are the polynomial regression coefficients used to describe the current dependency of E_sw,on/off. All these parameters can be calculated using the datasheet of the device.

As an example, the characteristics describing the relationship between E_sw and current of the IGBT and diode as given in the datasheet of the power module Infineon FZ1500R33HE3 (Infineon, 2013) are shown in Fig. 9.4. In the case of the diode (right side of Fig. 9.4), E_sw,on is not plotted, as the manufacturer usually does not report this characteristic since the switching losses at turn-on of power diodes are very small and therefore neglected.

Figure 9.4 Current-dependent commutation energy loss for turn-on and turn-off action of the IGBT and diode of the power module Infineon FZ1500R33HE3 as given in the datasheet for a blocking voltage of 1800 V and two different junction temperatures 125 and 150°C. The solid lines shows the second-order polynomial fitting curve as given in Eqs [9.8] and [9.10].

Once the model of commutation energy is defined, the average switching loss for turn-on and turn-off can be expressed as,

$P_{sw,on} = \frac{1}{T} \cdot \sum_{j = 1}^{N} E_{sw,on}$

[9.11]

$P_{sw,off} = \frac{1}{T} \cdot \sum_{j = 1}^{N} E_{sw,off}$

[9.12]

where N is the number of switching actions in a fundamental period T, and can be expressed as a function of the switching frequency (f_sw) or the switching period (T_sw),

$N = \frac{T}{T_{sw}} = T \cdot f_{sw}$

[9.13]

For applications with T_sw much lower than T, assuming a constant operating T_j (T_j,AVG) during T, and noting that v_swb can be approximated to V_bk of the application, the following simplification is suggested:

$P_{sw,on} = f_{sw} \cdot V_{bk} \cdot (K_{E_{on 0}} + K_{E_{on 1}} \cdot I_{swa,AVG} + K_{E_{on 2}} \cdot I_{swa,RMS}^{2}) (1 + \propto_{E_{on}} (T_{j, AVG} - T_{j 0}))$

[9.14]

where I_swa,AVG and I_swa,RMS are the average and RMS values of i_swa, respectively.

The same procedure can be applied to derive an expression for P_sw,off

$P_{sw,off} = f_{sw} \cdot V_{bk} \cdot (K_{E_{off 0}} + K_{E_{off1}} \cdot I_{swb,AVG} + K_{E_{off2}} \cdot I_{swb,RMS}^{2}) (1 + \propto_{E_{off}} (T_{j,AVG} - T_{j 0}))$

[9.15]

where I_swb,AVG and I_swb,RMS are the average and RMS values of i_swb, respectively.

I_swa,AVG, I_swa,RMS, I_swb,AVG and I_swb,RMS can be calculated based on the input/output current of the converter and they are mainly dependent on the converter topology, modulation strategy and input/output power factor. Examples of calculation are presented in Section 9.5.

9.2.2. Parallel connection of power modules

Offshore WECS are required to manage high power ratings. When a low/medium voltage feeds the converter then a high current should be managed by the power switches. In this case the parallel connection of PSDs is considered to fulfil the current requirement. The number of parallel-connected PSDs (n_p) has no limitation (Fuji Electric Co., 2011). However, some disadvantages like current imbalance between the modules at static and transition states are inherent to the parallel connection mainly because the connected PSDs do not have identical properties.

The difference in the voltage–current characteristic of the modules is a major cause of current imbalances. The static voltage deviation (ΔV_sw) of two modules with the same production reference is given by small variations in the module properties from the fabrication processes or by T_j differences between modules. Fig. 9.5 shows how a difference in the static characteristic of two semiconductors connected in parallel can cause a current imbalance. Using a linear relation to model the voltage–current characteristic of each module and for simplicity, assuming equal threshold voltage for the modules (V_sw0,1 = V_sw0,2), the average current in the parallel connection (I_p,AVG) can be expressed by

$I_{p,AVG} = \frac{i_{sw,1}}{2} \cdot (\frac{R_{c, 1} + R_{c, 2}}{R_{c, 2}})$

[9.16]

where R_c,1 and R_c,2 are the R_C of the two modules. When R_c,1 < R_c,2, module one has a higher current (i_sw,1 > i_sw,2) given by ΔV_sw.

Figure 9.5 Example of current imbalance given by the differences in voltage–current characteristic of two modules parallel-connected.

The current imbalance rate (δ_CI), which represents the ratio of shared current in the parallel connection, is defined as,

$δ_{CI} = (\frac{i_{sw,1}}{I_{p,AVG}} - 1)$

[9.17]

Fig. 9.6 shows examples of the representative relationship between ΔV_sw and δ_CI. Three IGBT power modules from Infineon, FZ750R65KE3 (6500 V × 750 A), FZ2400R17HP4 (1700 V × 2400 A), and FZ1500R33HE3 (3300 V × 1500 A), are presented in Fig. 9.6. Then, for example, if two semiconductor modules of FZ1500R33HE3 are parallel connected and it is expected that ΔV_sw is 1[V] at maximum current, then δ_CI is 15%, meaning that the current through one of the switches is 15% higher than I_p,AVG. Therefore, a decrease in total current (derating) that the parallel connection may conduct is needed in order not to exceed the maximum current of any semiconductor in the parallel connection.

High-power semiconductor manufacturers recommend that the peak current of a switch does not excess 80% of the maximum current of the semiconductor (Fuji Electric Co., 2011). Following this recommendation and taking into account the δ_CI, when n_p modules are connected in parallel, the following expression must be satisfied:

$I_{psw} \leq 1.6 \cdot I_{n} \cdot n_{p} \cdot k_{cdp}$

[9.18]

Figure 9.6 Example of current imbalance ratio as a function of the voltage deviation for three different IGBT modules for Infineon manufacturer.

$k_{cdp} = \frac{1}{n_{p}} \cdot [1 + (n_{p} - 1) \cdot \frac{(1 - δ_{CI})}{(1 + δ_{CI})}]$

[9.19]

where I_psw is the peak current of the parallel connection, I_n is the nominal current of one PSD (normally half of the maximum current), and k_cdp is the derating factor, which is the decrease in the maximum total current that can be applied under the worst-case conditions where n_p − 1 modules are identical and the current imbalance is concentrated on the singled-out module, whose R_C is the smallest (Fuji Electric Co., 2011). An example of k_cdp as a function of n_p for different ΔV_sw is shown in Fig. 9.7. It can be noted that as n_p increases then k_cdp will decrease. Also, an increase in ΔV_sw will cause k_cdp to decrease, since δ_CI increases.

Additionally, current imbalance in the parallel connection can be taken into account for power loss calculations, since different currents in the modules will generate different losses. Then, power losses in the parallel connection can be calculated from the power losses in a module with an equivalent current and then multiplying these losses by n_p. It is proposed to estimate the equivalent current (I_sw,eq) for semiconductor power loss calculations by Eq. [9.20], where I_sw,Total is the total current of the array of IGBT modules parallel connected.

$I_{sw,eq} = \frac{(1 + δ_{CI} / 2)}{n_{p}} \cdot I_{sw,Total}$

[9.20]

Figure 9.7 Example of derating factor K_cdp as a function of the number of parallel connected modules for different voltage deviations when power modules Infineon FZ1500R33HE3 are considered.

9.2.3. Series connection of power modules

If the PSDs are series-connected, then all devices carry out the same current in conduction state, but some differences in forward voltage can be presented due to non-identical voltage–current characteristic of the modules. For the same reason, in blocking state, voltage imbalance between modules in the series connection could exist. Since manufacturers do not normally include voltage–current characteristic in blocking state, it could be useless to introduce calculations for voltage imbalance. However, the considered power loss models are proportional to the forward voltage and V_bk; therefore voltage imbalance can be neglected in the power loss calculation and the average V_bk (total voltage divided by number of devices series connected, n_s) can be used for calculation purposes.

In order to estimate the required n_s for a specific application, and considering the application notes from semiconductor manufacturers (Volke and Hornkamp, 2012; Fuji Electric Co., 2011), the following requirement must be satisfied (without considering voltage imbalance for series connection of non-identical devices):

$\frac{V_{P,max}}{n_{s}} \leq k_{vp} \cdot V_{block} and \frac{V_{DC, \max}}{n_{s}} \leq k_{vdc} \cdot V_{block}$

[9.21]

where V_P,max is the maximum voltage amplitude to be blocked for the series connection array, k_vp is a safety factor for peak voltage (normally between 0.75 and 0.85), V_DC,max is the maximum DC voltage of the array, k_vdc is a safety factor for DC voltage (normally between 0.6 and 0.7) and V_block is the rated V_bk of a single device. The safety factors k_vp and k_vdc are considered in order not to exceed V_block by the repetitive overshoot voltage spikes during turn-off of the device and to guarantee that the device is switched in its safe operating area (Backlund et al., 2009).

9.2.4. Volume and mass of a switch valve

The thermal model of the PSD can be used to calculate the required thermal resistance of the cooling system for worst-case operating conditions, and then the size and weight of the power switch with the cooling system can be estimated. Two main types of cooling system are used in high-power applications: forced air cooling and liquid cooling. However, only the forced air cooling system is presented in this chapter.

The volume of a power switch valve (Vol_valve) is given by n_p or n_s, the semiconductor module itself and by the module heat sink (HS):

$Vo l_{valve} = n_{p} \cdot n_{s} \cdot (Vo l_{mod} + Vo l_{HS})$

[9.22]

The semiconductor module volume (Vol_mod) can be found in the datasheet of the PSD, the HS volume (Vol_HS) is given by the volume of aluminium/copper structure (Vol_HSal) and the fan volume (Vol_fan). The Vol_HSal is inversely proportional to the thermal resistance of the HS (R_thHS) for a given fan velocity (V_fan) (Wen et al., 2011), and Vol_fan is proportional to Vol_HSal. The forced air HS is designed based on a fixed V_fan, and using the definition of thermal resistance (R_th[K/W] = ΔT/P_loss), the following model is proposed:

$Vo l_{HSal} = K_{HS0} \cdot {(\frac{1}{R_{thHS}})}^{K_{HS1}} = K_{HS0} \cdot {(\frac{P_{loss, mod}}{Δ T_{HS, max}})}^{K_{HS1}}$

[9.23]

$Vo l_{fan} = K_{fan 0} \cdot {(Vo l_{HSal} - K_{fan 2})}^{K_{fan 1}}$

[9.24]

where ΔT_HS,max is the maximum allowable HS to ambient temperature, P_loss,mod is the total power loss of the power module, and the parameters K_HS0, K_HS1, K_fan0, K_fan1 and K_fan2 are proportionality regression coefficients, whose values can be found by taking data of HS and fans available in the market.

Fig. 9.8 shows an example of the relationship between Vol_HSal and R_thHS for the bonded fin HS series BF-XX from DAU. Data for three different V_fan are presented in Fig. 9.8. Parameters K_HS0 and K_HS1 are dependent on V_fan, since R_th of a given aluminium structure depends on V_fan, as is shown in Fig. 9.9 for four HS structures in the series. Table 9.1 shows the calculated values of parameters K_HS0 and K_HS1 for different V_fan.

An example of the correlation between Vol_fan and Vol_HSal is presented in Fig. 9.10, where the family of axial fans in SEMIKRON series SKF-3XX and the bonded fin HSs series BF-XX from DAU are considered. The calculated regression coefficients for the example presented in Fig. 9.10 are K_fan0 = 0.1992, K_fan1 = 0.7467 and K_fan2 = 0.1966 (dm³).

Figure 9.8 Example of relationship between aluminium structure volume and the thermal resistance of the heat sink for the bonded fin heat sinks series BF-XX from DAU manufacturer. The dash lines show the fitting curve as given in Eq. [9.23].

Figure 9.9 Example of the relationship between the thermal resistance of the heat sink and the fan velocity for the bonded fin heat sinks series BF-XX from DAU manufacturer.

Table 9.1

Calculated regression coefficients for the proposed heat sink aluminium structure volume model at different fan velocities. Bonded fin heat sinks series BF-XX from DAU manufacturer

Fan velocity (m/s)	K_HS0 (dm³)	K_HS1
1	56.19e-3	1.8311
3	21.72e-3	1.7415
5	16.78e-3	1.6539
10	9.322e-3	1.4321

Figure 9.10 Example of relationship between fan volume and aluminium structure volume for the axial fans SEMIKRON series SKF-3XX and the bonded fin heat sinks series BF-XX from DAU manufacturer. The dash line shows the fitting curve as given in Eq. [9.24].

ΔT_HS,max is calculated on the basis of average thermal analysis of the power module. For example, if a power module composed by IGBT and antiparallel diode is considered, the average thermal model presented in Fig. 9.11 is considered to calculate ΔT_HS,max and the following model can be used:

$Δ T_{HS, \max} + T_{amb} = K_{SFT} \cdot T_{j,max} - max {R_{th,igbt} \cdot \frac{P_{igbt}}{N_{isxm}}; R_{th, diode} \cdot \frac{P_{diode}}{N_{isxm}}}$

[9.25]

Figure 9.11 Average thermal model of an IGBT power module.

$P_{igbt} = P_{cond, igbt} + P_{sw,on, igbt} + P_{sw, off, igbt}$

[9.26]

$P_{diode} = P_{cond, diode} + P_{sw, off, diode}$

[9.27]

where K_SFT is the safety factor of thermal design, T_amb is the ambient temperature, N_isxm is the number of internal IGBT/diode per module, R_th,igbt and R_th,diode are the R_th of junction-to-HS per IGBT and diode, respectively, which can be calculated by adding the junction-to-case and the case-to-HS thermal resistances (R_thJC and R_thCH in Fig. 9.11) of IGTB and diode, given in the datasheet of the PSD.

In order to guarantee realistic HS designs, a constraint related with the minimum R_th (R_thHS,min) should be taken into account, which can be defined by the maximum ratio of Vol_HSal to Vol_mod (δ_HS,max = Vol_HSal/Vol_mod) beyond which Eq. [9.23] is not valid (normally, δ_HS,max ≤ 6). Then, the temperature rise of the HS with R_thHS,min should be less than or equal to ΔT_HS,max (from Eq. [9.25]), which establishes the maximum power that the module can dissipate mounting in the HS without overheating itself, and can be expressed as follows:

$R_{thHS, \min} \cdot (P_{igbt} + P_{diode}) \leq Δ T_{HS, \max}$

[9.28]

$R_{thHS, \min} = {(\frac{K_{HS 0}}{δ_{HS, \max} \cdot Vo l_{\mod}})}^{\frac{1}{K_{HS 1}}}$

[9.29]

Since conduction losses and switching losses are dependent on the T_j, some iteration could be needed to solve Eq. [9.25]. Alternatively, Eqs [9.4], [9.14] and [9.15] can be set up as temperature-independent for the highest acceptable T_j and design the cooling system to keep the T_j below the highest temperature assumed. This assumption gives some thermal safety margin built into the design (Drofenik and Kolar, 2005) and is considered in the examples presented in this chapter.

Finally, the mass of the valve can be expressed by the density and volume of each element (power semiconductor module, HS and fan):

$Mas s_{valve} = n_{p} \cdot n_{s} \cdot (ρ_{\mod} \cdot Vo l_{\mod} + ρ_{al} \cdot Vo l_{HSal} + ρ_{fan} \cdot Vo l_{fan})$

[9.30]

The density values (ρ_mod, ρ_al and ρ_fan) can be calculated from the reference datasheet for each element. For example, the power module Infineon FZ1500R33HE3 has a density value ρ_mod = 1187.2 [kg/m³], and for the HS and fan considered in Fig. 9.8 and Fig. 9.10, the calculated density values are ρ_al = 1366 [kg/m³] and ρ_fan = 769.23 [kg/m³], respectively.

9.2.5. Semiconductor parameters

η and ρ of the converter are highly influenced by the type of PSD selected to realize the high-power switch valve. PSDs commonly used in WECS are the insulated gate bipolar transistor (IGBT), the integrated gate commutated thyristor (IGCT) and the injection enhanced gate transistor (IEGT) (Lee et al., 2014). Since analysis of each type of PSD is beyond the scope of this chapter, only switch valves based on IGBT devices are considered in the application examples of Section 9.5. However, the models presented in this section can be adapted to any of the three devices (IGBT, IGCT or IEGT).

Table 9.2 presents a summary of the semiconductor parameters needed in the switch valve models presented in this chapter. Additionally, it includes parameter values of three IGBT modules with different ratings. These three modules are taken into account in Section 9.5 for evaluation of power losses, volume and mass of a 2L-VSC

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Table of Contents for 9.2. Semiconductors and switch valves

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9.2. Semiconductors and switch valves

9.2.1. Semiconductor power losses

9.2.1.1. Conduction loss

9.2.1.2. Switching losses

9.2.2. Parallel connection of power modules

9.2.3. Series connection of power modules

9.2.4. Volume and mass of a switch valve

9.2.5. Semiconductor parameters

Table of Contents for
9.2. Semiconductors and switch valves