Index
Note: Page numbers followed by f indicate figures and t indicate tables.
A
Advanced Configuration and Power Interface(ACPI) specification
Application Binary Interface (ABI)
B
profile guided optimization
246–247
Bus interface unit (BIU)
6–7
C
temporal data locality
249
algorithmic/microarchitectural analyses
123
callstacks report type
128
general-exploration analysis
128–129
Phoronix Test Suite
87–88
Complex Instruction Set Computer (CISC)
35–36
Controllable external variables
disk performance, variability of
75
results-definition.xml file
97
support-check.sh script
96
test-definition.xml file
95–96
D
command line interface
123
trace and trace_pipe file
168
available_tracers file
168
function and function_graph tracers
168–171
trace and trace_pipe files
168
Direct Rendering Infrastructure (DRI)
Direct Rendering Manager (DRM)
179,
180
E
Enhanced Intel SpeedStep® technology (EIST)
45
interface and hardware
105
microarchitectural performance analysis
107
programmable counters
107
user and operating system modes
106
Executable and Linkable Format (ELF)
F
Fixed-function counter
105,
107
Flex Memory technology
49–50
Floating point unit (FPU)
20
G
Global descriptor table (GDT)
22
Graphical user interface (GUI)
Phoronix Test Suite
87–88
Graphics Execution Manager (GEM)
180
Graphics processing unit (GPU)
I
formats, precision, and environment
18–19
Instruction-level parallelism (ILP)
32,
33
Instruction pointer (IP) ,
213,
243
general purpose registers
8–9
common and error-prone computations
16
Intel® Advanced Vector Set Extensions (Intel® AVX)
263–264
Intel® AES New Instructions (AES-NI)
273–274
protected and real mode
21
protected mode segmentation
21–22
logical and linear addresses
26
Intel® C and C++ Compilers (ICC)
220,
230,
235
Flex Memory technology
49–50
Intel® Xeon® processor
48,
48f
Turbo Boost technology
50–51
Intel® Graphics Media Accelerators (GMA)
49
Intel Hyper-Threading Technology
41
multi-core processor
40–41
out-of-order execution
36–38
Intel® Pentium® processors
Intel® Thread Building Blocks (Intel® TBB)
262–263
Intel® VTune™ Amplifier XE
K
Kernel Mode Setting (KMS) support
180
L
Last Level Cache (LLC)
250,
251
Local descriptor table (LDT)
22
Low Level Virtual Machine toolchain (LLVM)
206,
230,
246,
247
L-shaped memory configuration
50
M
MOD field encodes
14,
15t
PUSH and POP instructions
14,
14t
Memory Type Range Registers (MTRR)
252
N
Non-Uniform Memory Access (NUMA)
40
Numeric execution unit (NEU)
20
O
P
Packed carry-less multiplication (PCLMUL)
274–275
Page Attribute Table (PAT)
252
Page directory entry (PDE)
26–27
Page directory pointer table (PDPT)
35,
38
Page table entry (PTE)
26–27
perf_event.h header file
138
PERF_EVENT_TRACEPOINT
141
perf_event_attr.size field
143
Performance Monitoring Unit (PMU)
architectural/nonarchitectural events
104
collection methodology
105
architectural tuning
68–70
reproducible experiment
57–59
command-line interface and GUI
87–88,
87f
local tests and pts
89–90
OpenBenchmarking website
89
Physical Address Extensions (PAE)
34–35
Position Independent Code (PIC)
LD_LIBRARY_PATH environmental variable
214
LD_PRELOAD environment variable
214
ncurses-based interface
193
Precise Event Based Sampling (PEBS)
106
Procedure Linkage Table (PLT)
212–213
Q
R
Reduced Instruction Set Computer (RISC)
35–36
Running Average Power Limit (RAPL)
51–52
S
Sampled event configuration
144,
145t
Scale-index-base(SIB) byte
25
Single Instruction Multiple Data (SIMD)
MOVDQA and MOVDQU instructions
264–265
vectorized and nonvectorized implementation
266–267
VMOVDQA and VMOVDQU instructions
264–265
Software Developer Manual (SDM)
Streaming SIMD Extensions (SSE)
263
T
monotonically increasing timer
79
signed and unsigned qualifiers
228–229
Top-down hierarchical analysis
available_tracers file
167,
168
function and function_graph tracers
168–171
trace and trace_pipe files
168
Translation Lookaside Buffer (TLB)
27–28
Turbo Boost technology
50–51
U
Uncontrollable external variables
population and calculations
77,
78
V
X