design_file ⇐ design_unit {...}

design_unit ⇐{ library_clause I use_clause I context_reference}library_unit

library_unit ⇐

library_clause ⇐ library identifier {, ... };

context_reference ⇐ context selected_name ,{ ... } ;

entity_declaration ⇐entity identifier is[ generic ( generic_interface_list ) ; ][port ( port_interface_list ) ; ]{entity_declarative_item }

[ begin{ concurrent_assertion_statement| passive_concurrent_procedure_call_statement| passive_process_statement } ]| PSL_PSL_Directive

end [ entity ] [ identifier ] ;

entity_declarative_item ⇐

architecture_body ⇐

architecture identifier of entity_name is{ block_declarative_item }

begin{ concurrent_statement }

end [ architecture ] [ identifier ] ;

configuration_declaration ⇐

configuration identifier of entity_name is{ use_clause | attribute_specification | group_declaration }{use vunit verification_unit_name {, ... };}block_configuration ⇐

end [ configuration ] [ identifier ] ;

block_configuration

for ( architecture_name| block_statement_label| generate_statement_label[ ( (static_discrete_range | static_expression | alternative_label ) ) ] ){ use_clause }{ block_configuration | component_configuration }

end for ;

component_configuration ⇐

for component_specification[ binding_indication ; ]{ use vunit verification_unit_name { , ...} ;}[ block_configuration ]

end for ;

context_declaration ⇐

context identifier is{ library_clause | use_clause | context_reference }

end [ context ] [ identifier ] ;

package_declaration ⇐

package identifier is[ generic ( generic_interface_list ) ;[ generic map ( generic_association_list ) ; ] ]{ package_declarative_item }

end [ package ] [ identifier ];

package_declarative_item ⇐

package_body ⇐

package body identifier is{ package_body_declarative_item }

end [ package body ] [ identifier ];

package_body_declarative_item ⇐

package_instantiation_declaration ⇐

package identifier is new uninstantiated_package_name[ generic map ( generic_association_list ) ];

subprogram_specification ⇐

procedure_specification | function_specification

procedure_specification ⇐

procedure identifier[ generic ( generic_interface_list )[ generic map ( generic_association_list ) ] ][ [parameter ] ( parameter_interface_list ) ]

function_specification ⇐

[ pure | impure ] function ( identifier | operator_symbol )[ generic ( generic_interface_list )[ generic map ( generic_association_list ) ] ][ [parameter ] ( parameter_interface_list ) ] return type_mark

subprogram_declaration ⇐ subprogram_specification ;

subprogram_body ⇐

subprogram_specification is{ subprogram_declarative_item }

begin{ sequential_statement }

end [ procedure | function ] [ identifier | operator_symbol ];

subprogram_declarative_item ⇐

subprogram_instantiation_declaration ⇐

( procedure | function ) identifier isnew uninstantiated_subprogram_name [ signature ][ generic map ( generic_association_list ) ];

type_declaration ⇐

type identifier is type_definition ;| type identifier ;

type_definition ⇐

constant_declaration ⇐

constant identifier {, ...}: subtype_indication [ := expression ];

signal_declaration ⇐signal identifier {, ...}: subtype_indication [ register | bus ][ := expression ];

variable_declaration ⇐[ shared ] variable identifier {, ... }: subtype_indication [ := expression ];

file_declaration ⇐file identifier {, ...}: subtype_indication[ [open file_open_kind_expression ] is string_expression ] ;

alias_declaration ⇐alias ( identifier | character_literal | operator_symbol )[ : subtype_indication] is name [ signature ];

component_declaration ⇐component identifier [ is ][ generic ( generic_interface_list ) ;][port ( port_interface_list ) ; ]end component [ identifier ];

attribute_declaration ⇐ attribute identifier : type_mark ;

attribute_specification ⇐attribute identifier of entity_name_list : entity_class is expression ;

entity_name_list ⇐( (identifier | character_literal | operator_symbol ) [ signature ] ) { ,...} | others| all

entity_class ⇐

configuration_specification ⇐

for component_specificationbinding_indication ;{ use vunit verification_unit_name {, ...};}

[ end for ; ]

component_specification ⇐

( instantiation_label {, ...} | others | all ): component_name

binding_indication ⇐

use ( entity entity_name [ ( architecture_identifier ) ] | configuration configuration_name| open )

[ generic map ( generic_association_list ) ]

[ port map ( port_association_list ) ]

disconnection_specification ⇐disconnect ( signal_name {, ...} |others | all ): type_markafter time_expression ;

group_template_declaration ⇐group identifier is ( ( entity_class [ <> ] ) {, ...} );

group_declaration ⇐group identifier : group_template_name ( ( name | character_literal ) {, ...} );

use_clause ⇐ use selected_name {, ...};

enumeration_type_definition ⇐ ( ( identifier | character_literal ) {, ...})

integer_type_definition ⇐range ( range_attribute_name| simple_expression (to | downto ) simple_expression

floating_type_definition ⇐range ( range_attribute_name| simple_expression (to |downto ) simple_expression

physical_type_definition ⇐range ( range_attribute_name| simple_expression ( to | downto ) simple_expressionunitsidentifier ;{ identifier = physical_literal ;}end units [ identifier ]

array_type_definition ⇐array ( ( type_mark range <> {, ...} ) of element_subtype_indication| array ( discrete_range {, ... } ) of element_subtype_indication

record_type_definition ⇐record( identifier {, ...}: subtype_indication ; ){ ... }end record [ identifier ]

access_type_definition ⇐ access subtype_indication

file_type_definition ⇐ file of type_mark

protected_type_declaration ⇐protected{ protected_type_declarative_item }end protected [ identifier ]

protected_type_declarative_item ⇐

protected_type_body ⇐protected body{ protected_type_body_declarative_item }end protected body [ identifier ]

protected_type_body_declarative_item ⇐

| subtype_declaration ⇐ subtype identifier is subtype_indication ;

subtype_indication ⇐[ resolution_indication ] type_mark [ constraint ]

resolution_indication ⇐resolution_function_name|( resolution_indication| (record_element_identifier resolution_indication ){, ...})

constraint ⇐( range range_attribute_name| simple_expression ( to | downto) simple_expression )| array_constraint| record_constraint

array_constraint ⇐( discrete_range { , ... } ) [array_constraint record_constraint ]| ( open ) [ array_constraint | record_constraint ]

record_constraint ⇐( ( record_element_identifier ( array_constraint record_constraint ) ) {, ...} )

discrete_range ⇐discrete_subtype_indication| range_attribute_name| simple_expression ( to | downto ) simple_expression

type_mark ⇐ type_name | subtype_name

concurrent_statement ⇐| block_statement| process_statement| concurrent_procedure_call_statement| concurrent_assertion_statement| concurrent_signal_assignment_statement| component_instantiation_statement| generate_statement| PSL_PSL_Directive

block_statement ⇐block_label :block [ ( guard_expression ) ] [is ][ generic ( generic_interface_list ) ;[ generic map ( generic_association_list ) ; ] ][ port ( port_interface_list ) ;[ port map ( port_association_list ) ; ] ]{ block_declarative_item }begin{ concurrent_statement }end block [ block_label ];

block_declarative_item ⇐

process_statement ⇐[ process_label : ][ postponed ] process [ ( ( signal_name {, ...} ) | all ) ] [ is ]{ process_declarative_item }begin{ sequential_statement }end [ postponed ] process [ process_label ];

process_declarative_item ⇐

concurrent_procedure_call_statement ⇐[ label : ] [ postponed ] procedure_name [ ( parameter_association_list ) ];

concurrent_assertion_statement ⇐[ label : ] [postponed ] assert condition[ report expression ] [ severity expression ];

concurrent_signal_assignment_statement ⇐[ label : ] [ postponed ] concurrent_simple_signal_assignment| [ label : ] [ postponed ] concurrent_conditional_signal_assignment| [ label : ] [ postponed ] concurrent_selected_signal_assignment

concurrent_simple_signal_assignment ⇐target <= [ guarded ] delay_mechanism ] waveform ;

concurrent_conditional_signal_assignment ⇐target < = [ guarded ] [ delay_mechanism ]{ waveform when condition{ else waveform when condition }[ else waveform ];

concurrent_selected_signal_assignment ⇐with expression select [?]target <= [ guarded ] [ delay_mechanism ]{ waveform when choices ,}waveform when choices ;

component_instantiation_statement ⇐instantiation_label :( [component ] component_name| entity entity_name [ ( architecture_identifier ) ]| configuration configuration_name )[ generic map ( generic_association_list ) ][ port map ( port_association_list ) ];

generate_statement ⇐for_generate_statement | if_generate_statement | case_generate_statement

for_generate_statement ⇐generate_label :for identifier in discrete_range generategenerate_statement_bodyend generate [ generate_label ];

if_generate_statement ⇐generate_label :if [alternative_label : ] condition generategenerate_statement_body{ elsif [ alternative_label :] condition generategenerate_statement_body[ else [ alternative_label : ] generategenerate_statement_body ]end generate [ generate_label ];

case_generate_statement ⇐generate_label :case expression generate( when [ alternative_label : ] choices =>generate_statement_body ){ ... }end generate [ generate_label ];

generate_statement_body ⇐[ {block_declarative_item }begin ]{ concurrent_statement }[ end [ alternative_label ] ; ]

sequential_statement ⇐

wait_statement ⇐[ label : ] wait [ on signal_name {, ...}][ until condition ][ for time_expression ];

assertion_statement ⇐

[ label :] assert condition[ report expression ] [ severity expression ];

report_statement ⇐[ label :] report expression [ severity expression ];

signal_assignment_statement ⇐[ label :] simple_signal_assignment| [ label :] conditional_signal_assignment| [label : ] selected_signal_assignment

simple_signal_assignment ⇐

( name | aggregate ) <= [ delay_mechanism ] waveform ;| name <= force [ in | out ] expression ;| name <= release [ in | out ];

conditional_signal_assignment ⇐conditional_waveform_assignment | conditional_force_assignment

conditional_waveform_assignment ⇐[ label :]( name | aggregate ) <= [ delay_mechanism ]waveform when condition{ else waveform when condition }[ else waveform ];

conditional_force_assignment ⇐[ label :]name >= force [ in | out ]{ expression when condition }{ else expression when condition }[ else expression ] ;

selected_signal_assignment ⇐selected_waveform_assignment | selected_force_assignment

selected_waveform_assignment ⇐[ label :] with expression select[?]( name | aggregate ) <= [ delay_mechanism ]{ waveform when choices, }waveform when choices ;

selected_signal_assignment ⇐[ label :]with expression select [?]name <= force [ in | out ]{ expression when choices , }expression when choices ;

delay_mechanism ⇐ transport | [ reject time_expression ] inertial

waveform ⇐( value_expression [ after time_expression ] | null [ after time_expression ] ) { , ... }| unaffected

variable_assignment_statement ⇐[ label : ] simple_variable_assignment| [label : ] conditional_variable_assignment| [ label : ] selected_variable_assignment

simple_variable_assignment ⇐( name | aggregate ) := expression ;

conditional_variable_assignment ⇐( name | aggregate ) :=expression when condition{ else expression when condition }[ else expression ] ;

selected_variable_assignment ⇐with expression select [?]( name | aggregate ) :={ expression when choices ,}expression when choices ;

procedure_call_statement ⇐[ label : ] procedure_name [ ( parameter_association_list ) ];

if_statement ⇐[ if_label :]if condition then{ sequential_statement }{ elsif condition then{ sequential_statement } }[ else{ sequential_statement } ]end if [ if_label ] ;

case_statement ⇐[ case_label : ]case [?] expression is( when choices => { sequential_statement } ){ ... }end case [?] [ case_label ] ;

loop_statement ⇐[ loop_label : ][ while condition | for identifier | in discrete_range ] loop{ sequential_statement end loop [ loop_label ] ;

next_statement ⇐ [ label : ] next [ loop_label ] [ when condition ] ;

exit_statement ⇐ [ label : ] exit [ loop_label ] [ when condition ] ;

return_statement ⇐ [ label : ] return [ expression ] ;

null_statement ⇐ [ label : ] null ;

interface_list ⇐( interface_constant_declaration| interface_signal_declaration| interface_variable_declaration| interface_file_declaration| interface_type_declaration| interface_subprogram_declaration| interface_package_declaration ) {; ... }

interface_constant_declaration ⇐[ constant ] identifier {, ... } : [in ] subtype_indication[ := static_expression]

interface_signal_declaration ⇐[ signal ] identifier {, ... } : [ mode ] subtype_indication [ bus ][ := static_expression ]

interface_variable_declaration ⇐[ variable ] identifier {, ... } : [ mode ] subtype_indication[ := static_expression ]

mode ⇐ in | out | inout | buffer | linkage

interface_file_declaration ⇐file identifier { , ... } : subtype_indication

interface_type_declaration ⇐ type identifier

interface_subprogram_declaration ⇐( procedure identifier[ [parameter ] ( parameter_interface_list )| [ pure | impure ] function ( identifier | operator_symbol )| [ parameter ] ( parameter_interface_list ) ] return type_mark) [ is ( subprogram_name | <> ) ]

interface_package_declaration ⇐package identifier is new uninstantiated_package_namegeneric map ( ( generic_association_list | <> | default ) )

association_list ⇐ ( [ formal_part => ] actual_part ) { , ... }

formal_part ⇐generic_name| port_name| parameter_name| function_name ( generic_name | port_name | parameter_name )| type_mark ( generic_name | port_name | parameter_name ) )

actual_part ⇐[ inertial ] expression| signal_name| variable_name| file_name| subtype_indication| subprogram_name| package_name| open| function_name ( ( signal_name | variable_name ) )| type_mark ( ( signal_name | variable_name ) )

condition ⇐ expression

expression ⇐ (?? primary ) | logical_expression

logical_expression ⇐

relation ⇐shift_expression[ ( = | /= | < | <= | > | >= | ?= | ?/= | ?< | ?<= | ?> | ?>= ) shift_expression

shift_expression ⇐simple_expression [ (sll | srl | sla | sra | rol | ror ) simple_expression ]

simple_expression ⇐ [ + | - ] term { ( + | - | & ) term }

term ⇐ factor { ( * | / | mod | rem ) factor }

factor ⇐| primary [ ** primary ]| abs primary| not primary| and primary| nand primary| or primary| nor primary| xor primary| xnor primary

primary ⇐

function_call ⇐ function_name [ ( parameter_association_list ) ]

qualified_expression ⇐ type_mark ‘ ( expression ) | type_mark ‘ aggregate

name ⇐identifier| operator_symbol| character_literal| selected_name| ( name | function_call ) ( expression { , ...} )| ( name | function_call ) ( discrete_range )| attribute_name| external_name

selected_name ⇐( name | function_call ) . ( identifier | character_literal | operator_symbol | all )

operator_symbol ⇐ “ { graphic_character } ”

attribute_name ⇐( name | function_call ) [ signature ] ‘ identifier [ ( expression ) ]

signature ⇐ [ [ type_mark {, ... } ] [ return type_mark ] ]

external_name ⇐<< constant external_pathname : subtype_indication >>| << signal external_pathname : subtype_indication >>| << variable external_pathname : subtype_indication >>

external_pathname ⇐absolute_pathname relative_pathname package_pathname

absolute_pathname ⇐ . { pathname_element .} object_identifier

relative_pathname ⇐ { ∧ .} { pathname_element .} object_identifier

pathname_element ::=entity_identifier| component_instantiation_label| block_label| generate_statement_label [ ( static_expression ) ]| package_identifier

package_pathname ⇐ @ library_identifier . { package_identifier . } object_identifier

literal ⇐

physical_literal ⇐ [ decimal_literal | based_literal ] unit_name

decimal_literal ⇐ integer [ . integer ] [ E [ + ] integer | E – integer ]

based_literal ⇐integer # based_integer [ . based_integer ] # [ E [ + ] integer| E – integer ]

integer ⇐ digit } [ _ ] ... }

based_integer ⇐ ( digit | letter ) { [ _ ] ... }

character_literal ⇐ ‘ graphic_character ‘

string_literal ⇐ “ { graphic_character } ”

bit_string_literal ⇐[ integer ] ( B | O | X | UB | UO | UX | SB | SO | SX | D )“ [ graphic_character { [ _ ] ...} ] ”

aggregate ⇐ ( ( [ choices => ] expression ) { , ... } )

choices ⇐ ( simple_expression | discrete_range | identifier | others ) { | ...}

label ⇐ identifier

identifier ⇐ letter { [ _ ] { letter | digit ) } | graphic_character { ... }

tool_directive ⇐ ‘ identifier { graphic_character }