1.1.1 Universal Gate Operation

Universal gates are those in which any logical expression can be realized. The NAND and NOR gates are very popular and are widely used for realization of logical expressions. Therefore, these two NAND and NOR gates are used to implement other gates so these are called universal gates.

NAND operation

This is a universal gate. The operation NOT-AND is known as a NAND operation. It has N number of inputs and one output like other basic gates. However, two inputs and one output NAND gate are shown in Figure 1.4. Table 1.4 provides output values of a NAND gate in terms of inputs. The Boolean equation is given below:

NOR operation

This is a universal gate. The operation NOT-OR is known as a NOR operation. It has N number of inputs and one output similar to basic gates. The symbol diagram of two inputs and one output is shown in Figure 1.5. Table 1.5 gives output values of a NOR gate in terms of inputs. The Boolean equation is given below:

EX-OR Operation

The operation EX-OR is used in many applications. It has N number of inputs and one output like other basic gates. The symbol diagram of two I/P and one O/P is shown in Figure 1.6. Table 1.6 provides the output values of an EX-OR gate in terms of inputs. Its mathematic equation is given below:

1.1.2 Combinational Logic Circuits

This type of circuit depends upon the I/Ps in that particular instant of time. A memory element is not available. A combinational circuit may have a number of sub-systems as shown in Figure 1.7.

There are many ways to design these combinational logic circuits. These include:

1. Boolean expression
2. Set of statement
3. Truth table

These designs are used to design combinational logic circuits. However, a number of methods are also available to simplify Boolean function. These include:

1. Algebraic method
2. K-map method
3. Variable entered method
4. Tabulation method

Standard representation for logical functions

Any logical functions can be represented in terms of their logical variables. Logical variables and their functions are in binary form. There are two standard forms generally being used in circuit designing.

1. Sum of product (SOP)
2. Product of sum (POS)

Apart from the form above, other forms are also available to design circuits. However, these forms are conveniently suitable for the design process. This is discussed in more detail in the next subsection.

1.2.1 Adders

An adder is a combinational logic circuit that performs arithmetic sums of binary numbers and produces corresponding outputs.

Half Adder

This is a basic adder that performs arithmetic sums of two inputs and gives the corresponding output in terms of sum and carry. The diagram of a H. adder is shown in Figure 1.8.

A and B are I/Ps and O/Ps and are the sum and carry of the H. adder. The truth table is given in Table 1.7.

Mathematical expressions for the H. adder are:

The circuit diagram of the H. adder is shown in Figure 1.9.

Full Adder

This performs the arithmetic sum of three inputs and gives the corresponding two outputs in terms of sum and carry. A block diagram of the full adder is shown in Figure 1.10. Table 1.8 provides the truth table of a full adder circuit where output variables (Sum, Cout) are expressed in terms of input values.

Boolean expressions for the F. adder are:

K-Map for Sum:

K-Map for Cout:

Logic diagram of a full adder

A logical representation of the F. adder is shown in Figure 1.11.

Half Subtractor

A half subtractor is a combinational logic circuit that performs the arithmetic difference between two inputs and provides the corresponding output in terms of difference and borrows as shown in Figure 1.12. Table 1.9 provides output variables (Difference, Borrow) of the half subtractor in terms of inputs (A,B).

Boolean expressions for the H. adder are:

Logic diagram of a H. Subtractor

The logical representation of a H. adder is shown in Figure 1.13.

Full Subtractor

This performs the arithmetic difference of three inputs and gives corresponding two outputs in terms of Diff. and Borrow. A block diagram of the F. subtractor is shown in Figure 1.14. Table 1.10 provides output variables (Difference, Borrow) of the full subtractor in terms of inputs (A,B).

K-Map for Difference:

	B’Bin’	B’Bin	BBin	BBin’
A’
A

A mathematical equation for the F. subtractor is:

K-Map for Borrow:

The logic diagram of the F. subtractor is shown in Figure 1.15.

1.2.2 Multiplexers

This is a type of combinational circuit. It has multiple inputs and a single output and its output depends upon the select lines. Select lines control the processing of the multiplexer which means that whatever the input is will be the output depending on select lines. If N select lines then input lines will be 2 ^N as shown in Figure 1.16.

For simplicity of the expression, 4:1 MUX has been explained in the truth table. The truth table for 4:1 MUX is given in Table 1.11.

The Boolean expression for Y can be expressed as:

The logic diagram of a multiplexer is shown in Figure 1.17.

Example:

Implement the expression $\mathrm{F}\left(\mathrm{A},\mathrm{B},\mathrm{C}\right)=\sum \mathrm{m}\left(0,2,6,7\right)$ using a multiplexer.

Solution:There are four variables; therefore, it needs four select lines for the process. And there are four Minterms which means these inputs are connected with logic 1 and the remaining with logic 0. For this implementation, 8:1 MUX is required. The implementation is shown in Figure 1.18.

Advantages of multiplexers:

1. Logic circuits can be implemented without simplification of the logic expression.
2. This reduces the integrated circuit count.
3. Logic design can be simplified.

1.2.3 De-multiplexer

A de-multiplexer provides 2N outputs for N select lines and a single input. These controls are used to select which O/P line to route the I/P. For example, a 1 × 4 de-multiplexer has one input and four output lines for two select or control lines, as shown in Figure 1.19. Table 1.12 describes the truth table of the de-multiplexer shown in Figure 1.19.

With the help of the truth table, the de-multiplexer output can be expressed as:

A logical representation of the de-multiplexer is shown in Figure 1.20.

1.2.4 Decoders

This is a type of combinational circuit used to decode binary data. There are several decoders such as the BCD to seven-segment decoder, Decimal to BCD decoder etc. Here, the basic decoder 2:4 is being discussed, as shown in Figure 1.21. Table 1.13 shows the truth table of a 2:4 line decoder.

The truth table of the decoder is given in Table 1.10.

The Boolean function of the output is given below as:

Logic Diagram of Decoder

A logic diagram of the decoder 2 × 4 is shown in Figure 1.22.

Example:

Implementation of the given functions using a 3:8 decoder.

Solution:

Implementation of the above given function is shown in Figure 1.23.

1.2.5 Multiplier

A multiplier is a type of combinational circuit which is used to multiply binary numbers. There are several multipliers such as the 2-bit multiplier, 4-bit multiplier, etc.

A block diagram of the 2-bit binary multiplier is shown in Figure 1.24. It will abide by the following sequence in binary multiplication.

………………………

………………………

Where P0 is the product of two bits only and P1 and P2 will be worked as H. adders, P3 is the carry output. The logic diagram of the 2-bit multiplier is shown in Figure 1.25.

1.2.6 Comparators

Comparators are the example combinational circuit and can be implemented through a logic gate. Comparators are part of many digital and analog circuits such as ADC to DAC converters, etc. The design of comparators is usually done with the help of a truth table as shown in Table 1.14 for a 2-bit comparator. A 2-bit comparator with input A, B and output Y1(A < B), Y2(A = B) and Y3(A > B) is shown in Figure 1.26.

We can obtain the out expression for Y1, Y2, and Y3 either by direct implementation with the truth table or by applying K-map reduction techniques.

With the above Boolean expressions, a 2-bit comparator can be implemented using logic gates such as AND, OR, and NOT gate.

1.2.7 Code Converters

There is a different format of presentation for digital data like Binary, Octal, Hexadecimal, Gray code, etc. As per the requirement, any one format can be changed into another format with the help of code converters. Several examples would be decimal-to-binary, binary-to-octal or binary-to-hexadecimal, and binary-to-gray and vice versa. The design of code converters is done using logic gates with the help of a truth table (Table 1.15).

Example:
Binary-to-Octal

From Table 1.15, the binary O/P can be derived in terms of I/P as an octal value.

Therefore, octal-to-binary implementation required the OR gate to obtain binary output in terms of octal as input variables.

1.2.8 Decimal to BCD Encoder

This is a type of priority encoder used to convert decimal to BCD number. It takes inputs in the form of numerals between 0 to 9 and gives corresponding BCD output. It works like switches; the response of the 1 or 0 turning them ON or OFF switch mode. Table 1.16 gives output values (BCD) in terms of input values.

From Table 1.16, the BCD O/P can be represented in terms of I/P as a decimal value.

Therefore, decimal to BCD encoder implementation requires the OR gate to obtain BCD output in terms of decimal as input variables.