List of Abbreviations
| AAL1 | ATM Adaptation Layer 1 |
| AAL2 | ATM Adaptation Layer 2 |
| ABV | Assertion-Based Verification |
| AC | Alternating Current |
| ADC | Analog-to-Digital Converter |
| ADPCM | Adaptive Differential Pulse Code Modulation |
| ASIC | Application-Specific Integrated Circuit |
| ATM | Asynchronous Transfer Mode |
| ATPG | Automatic Test Pattern Generation |
| BFM | Bus Functional Model |
| BGA | Ball Grid Array |
| BIST | Built-In Self Test |
| CAD | Computer Aided Design |
| CELP | Code Excited Linear Predictive |
| CMOS | Complementary Metal Oxide Semiconductor |
| CODEC | COder/DECoder |
| CPCI | Compact Peripheral Component Interconnect |
| CTV | Cable TV |
| CVS | Concurrent Versions System |
| DAC | Digital-to-Analog Converter |
| DC | Direct Current |
| DDR | Double Data Rate |
| DDS | Digital Data Service |
| DFT | Design For Test |
| DIP | Dual In-Line Package |
| DLL | Digital Link Layer |
| DMA | Direct Memory Access |
| DRAM | Dynamic Random Access Memory |
| DRC | Design Rule Check |
| DSL | Digital Subscriber Line |
| DSM | Deep Sub-Micron |
| DSP | Digital Signal Processing/ Digital Signal Processor |
| DTMF | Dual-Tone Multi Frequency |
| DUT | Design Under Test |
| ECO | Engineering Change Orders |
| EDA | Electronic Design Automation |
| EDIF | Electronic Design Interchange Format |
| ERC | Electrical Rule Check |
| ESD | Electrostatic Discharge |
| FIFO | First-In First-Out |
| FPGA | Field Programmable Gate Array |
| FSM | Finite State Machine |
| GND | Ground |
| GPS | Global Positioning System |
| HDL | Hardware Description Language |
| HLB | Hierarchical Layout Block |
| HW/SW | Hardware/Software |
| ICs | Integrated Circuits |
| ILM | Interface Logic Models |
| IP | Intellectual Property |
| IP | Internet Protocol |
| IPO | In Place Optimization |
| IR | commonly refers to voltage drop from V = IR |
| ISDN | Integrated Services Digital Network |
| ITU | International Telecommunication Union |
| JTAG | Joint Test Action Group |
| K-maps | Karnaugh maps |
| LEC | Line Echo Canceller |
| LVS | Layout Versus Schematic |
| MAC | Media Access Control |
| MII | Media Independent Interface |
| MPEG | Moving Picture Experts Group |
| MPU | MicroProcessor Unit |
| MVIP | Multi Vendor Integration Protocol |
| NMOS | N-channel Metal-Oxide-Semiconductor |
| NRE | Non-Recurring Engineering |
| OCB | On-Chip Buses |
| OCP | Open Core Protocol |
| OIF | Optical Internetworking Forum |
| PCB | Printed Circuit Board |
| PCI | Peripheral Component Interconnect |
| PCM | Pulse Code Modulation |
| PGA | Pin Grid Array |
| PIP | Picture In Picture |
| PLL | Phase Locked Loops |
| PMOS | P-channel Metal-Oxide-Semiconductor |
| PSTN | Public Switched Telephone Network |
| PVT | Process, Voltage, and Temperature |
| QFP | Quad Flat Pack |
| QAM | Quadrature Amplitude Modulation |
| QPSK | Quadrature Phase Shift Keying |
| RCS | Revision Control System |
| RGB | Red-Green-Blue |
| RISC | Reduced Instruction Set Computer |
| RMII | Reduced Media Independent Interface |
| RT | Register Transfer |
| RTL | Register Transfer Level |
| SB | SiliconBackplane |
| SCSA | Signal Computing System Architecture |
| SDC | SDRAM Controller |
| SDF | Standard Delay Format |
| SDRAM | Synchronous Dynamic Random Access Memory |
| Serdes | Serializer/Deserializer |
| SFI | Serdes-to-Framer Interface |
| SI | Signal Integrity |
| SOC | System On a Chip |
| SOP | Small Outline Package |
| SPI-4P2 | System Packet Interface Level 4 Phase 2 |
| STA | Static Timing Analysis |
| STB | Set Top Box |
| STV | Satellite TV |
| TAT | Turn Around Time |
| TCP | Transfer Control Protocol |
| TDM | Time Division Multiplexing |
| TSI | Time Slot Interchange |
| TTM | Time To Market |
| UDP | User Datagram Protocol |
| USB | Universal Serial Bus |
| UTOPIA | Universal Test Operation PHY Interface for ATM |
| VAD | Voice Activity Detector |
| VC | Virtual Components |
| VCI | Virtual Component Interface |
| VHDL | VHSIC (Very high-speed integrated circuit) Hardware Description Language |
| VOCODER | Voice CODER |
| VoIP | Voice over IP |
| VoN | Voice over Network |
| VSIA | Virtual Socket Interface Alliance |
| WAN | Wide Area Network |
| WLM | Wire Load Models |
| xDSL | Digital Subscriber Line |
| XNF | Xilinx Netlist Format |
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