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PART 2: Software Foundation: Intel Xeon Phi System Software and Tools
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PART 2: Software Foundation: Intel Xeon Phi System Software and Tools
by Rezaur Rahman
Intel® Xeon Phi™ Coprocessor Architecture and Tools: The Guide for Application Developers
Title Page
About ApressOpen
Dedication
Contents at a Glance
Contents
About the Author
About the Technical Reviewer
Acknowledgments
Introduction
PART 1: Hardware Foundation: Intel Xeon Phi Architecture
CHAPTER 1: Introduction to Xeon Phi Architecture
History of Intel Xeon Phi Development
Intel Xeon Phi Coprocessor Chip Architecture
Applicability of the Intel Xeon Phi Coprocessor
Summary
CHAPTER 2: Programming Xeon Phi
Intel Xeon Phi Execution Models
Development Tools for Intel Xeon Phi Architecture
Setting Up an Intel Xeon Phi System
Code Generation for Intel Xeon Phi Architecture
Language Extensions to Support Offload Computation on Intel Xeon Phi
Summary
CHAPTER 3: Xeon Phi Vector Architecture and Instruction Set
Xeon Phi Vector Microarchitecture
Xeon Phi Vector Instruction Set Architecture
Summary
CHAPTER 4: Xeon Phi Core Microarchitecture
Intel Xeon Phi Cores
Core Pipeline Stages
Cache and TLB Structure
L2 Cache Structure
Multithreading
Summary
CHAPTER 5: Xeon Phi Cache and Memory Subsystem
The Interconnect Topologies for Manycore Processors
The Ring Interconnect Architecture in Intel Xeon Phi
L2 Cache
Memory Transactions Flow
Probing the Memory Subsystem
Summary
CHAPTER 6: Xeon Phi PCIe Bus Data Transfer and Power Management
DMA Engine
Reading Data from the Coprocessor
Low-Level Data Transfer APIs for Intel Xeon Phi
Placement of PCIe Cards for Optimal Data Transfer BW
Power Management and Reliability
Summary
PART 2: Software Foundation: Intel Xeon Phi System Software and Tools
CHAPTER 7: Xeon Phi System Software
System Software Component
Ring 0 Driver Layer Components of the MPSS
Summary
CHAPTER 8: Xeon Phi Application Development Tools
The Application Development Tools
Keywords
Macros
Intrinsics
Application Programming Interfaces
Intel Fortran Composer XE
Environment Variables, Compiler Options, and Creating Static Libraries
Optimization Tool: Intel Vtune Amplifier XE
Libraries
Intel Cluster Tools
Summary
PART 3: Applications: Technical Computing Software Development on Intel Xeon Phi
CHAPTER 9: Xeon Phi Application Design and Implementation Considerations
Workload-Related Considerations
Effect of Grid Shape on Performance
Implementation Considerations
Summary
CHAPTER 10: Application Performance Tuning on Xeon Phi
Getting Baseline Data
Timing Applications
Detecting Application Execution Bottlenecks
Setting Target Performance
Optimizing Code
Using the Math Kernel Library
Cluster-Level Tuning
Summary
CHAPTER 11: Algorithm and Data Structures for Xeon Phi
Algorithm and Data Structure Design Rules for Xeon Phi
General Matrix-Matrix Multiply Algorithm (GEMM)
Molecular Dynamics
Stencil Operation
European Option Pricing Using Monte Carlo Simulation in Financial Applications
Summary
CHAPTER 12: Xeon Phi Application Development on Windows OS
MPSS
Development Tools
Debugging Offload Execution
Using VTune Amplifier XE to Profile Offload Code on Windows
Building and Running Xeon Phi Native Applications from the Windows Host
Summary
APPENDIX A: OpenCL on Xeon Phi
Installation
Building and Running OpenCL Application
Performance Optimization
APPENDIX B: Virtual Shared Memory Programming on Xeon Phi
Placing Data on the Virtual Shared Memory Region
Shared Functions
Synchronizing Between the Host and the Coprocessors
Index
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CHAPTER 6: Xeon Phi PCIe Bus Data Transfer and Power Management
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CHAPTER 7: Xeon Phi System Software
PART 2
Software Foundation: Intel Xeon Phi System Software and Tools
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