Foreword

When it first appeared in the mid-1990s, System-on-Chip (SoC) was arguably just a marketing term. At that point, the semiconductor fabrication process technology had achieved the scales of 350 and 250 nm, allowing the integration of only relatively simple digital systems. But, by the turn of the millennium, with 180, 150 and 130 nm processes available, many design teams were building true SoC devices.

These devices are systems in every sense of the word. They incorporate programmable processors (often with at least one RISC and one DSP), embedded memory, function accelerators implemented in digital logic, complex on-chip communications networks (traditional master–slave buses as well as network-on-a-chip), and analogue interfaces to the external world.

The integration of programmable processors into every SoC, and the growing importance of software in the products into which they are embedded, emphasizes, to a much greater degree than ever before, the role of embedded software in SoC. This includes the whole software development tool chain (compilers, debuggers, assemblers, etc.) as well as the development, porting and reuse of software, including real-time operating systems, device drivers, middleware or end applications.

But the design theories, methods and tools for designing, integrating and verifying these complex systems have not kept pace with the advanced semiconductor fabrication processes that allow us to build them. The well-known International Technology Roadmap for Semiconductors (ITRS) and analyses point to an ever-widening gap between what we are capable of building, and what we are capable of designing. Many techniques have been proposed and are being used to close that gap, including design tool automation and integration from RTL to Graphic Data System II (GDSII), integrated testbenches, IP reuse, platform-based design, and, last but not least, system-level design techniques.

Commercial tool providers, large design companies, and academic researchers are all doing a good job of developing the theory and practice of many of these techniques. The one that they are failing on most conspicuously is system-level design. Yet the underlying systems attributes of large complex IC designs makes this area the most important one to develop. Raising design team productivity, maximizing design reuse, and reducing the risk and effort involved in the design of SoCs absolutely demand that the center of design move from its current focus on RTL-based hardware design to true system level design.

Unfortunately, system-level design has no universal set of principles underlying it that correspond to the widely accepted design methodologies for digital logic, moving from RTL to GDSII via logic synthesis, and for standard cell placement and routing. Rather, system-level design consists of a series of design domain concepts and tools that lack universal applicability. For example, mastering dataflow design using one set of tools provides little grounding for understanding control-dominated system modeling using state machines.

One key reason for the lack of integrated system modeling approaches lies in the fact that heterogeneous systems consist of multiple design domains that are best modeled using different models of computation. This heterogeneous modeling requirement is quite new to digital IC designers. In fact, their traditional design methodology of “synthesis, place and route” completely ignores it, reducing everything to the single discrete event model of computation and concurrency supported by commercial simulators.

In order to design systems and Systems-on-a-Chip, a designer must know how to correctly transform specifications into verifiable implementations, to build executable system models, and to understand the impact of different computational models on design and implementation choices. In addition, the industry as a whole needs to adopt agreed upon system level modeling theories and abstractions in order to build better tools for modeling and design in the SoC era.

Modeling Embedded Systems and SoCs: Concurrency and Time in Models of Computation, specifically addresses these issues. A comprehensive and rigorous examination of models of concurrency and computation, it introduces formalisms for precise definitions and analysis for building executable system models today. Axel Jantsch’s experience in teaching this material at the Royal Institute of Technology, Stockholm has helped him to create an excellent text for graduate-level courses. The extensive bibliography and discussion of applications broaden the book’s usefulness beyond the classroom however. Industrial practitioners especially will appreciate that it establishes concepts important for choosing the best models to use for particular systems. In fact, anyone who needs a solid grounding in the theory underlying various system modeling approaches will find the book essential.

After an introduction that explains the importance of understanding models of computation and concurrency in system design and introduces basic system modeling concepts, Chapter 2 presents the important models of Finite State Machines and Petri Nets. Chapter 3, the heart of the book, introduces the author’s formal modeling framework and notation in an introduction to untimed models of computation (MOC), with extensions to include the embedding of synchronous dataflow (one of the most useful models) in this analytical framework. Chapter 4 adds major concepts of synchronous models, building a base for Chapter 5’s introduction to timed models of computation. Chapter 6 examines the issue of interfacing different models, whether using the same or different MOC. Chapter 7 elaborates tightly coupled process networks. Chapter 8 addresses the important notions of determinism and nondeterminism and the use of stochastic processes as a more tractable substitution for nondeterministic models. The last major chapter in the book, Chapter 9, covers the use of the various models in performance analysis and functional specification, and also discusses the links between modeling, design and synthesis. The Rugby analytical framework introduced by Jantsch in earlier papers provides the underlying framework with which he provides a context for the various models and their use models.

I recommend this book highly to those who are new to this subject or who need to better understand its formal underpinnings. Understanding this material provides the foundation for advanced system level modeling and implementation. System-level tool developers will find these concepts an excellent basis for determining which modeling approaches will be supported, and why. Jantsch’s book is a major advance in the material available to students, researchers and practitioners alike in this important and vital area.

Grant MartinFellow, Cadence LaboratoriesBerkeley, CaliforniaFebruary 2003

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