As mentioned in Chapter 2, the FPU is a self-contained unit that handles floating-point operations using a set of registers that are set apart from the standard processor registers. The additional FPU registers include eight 80-bit data registers, and three 16-bit registers called the control, status, and tag registers.

The FPU data registers are called R0 through R7 (although as you will see, they are not accessed by these names). They operate somewhat differently than the standard registers in that they are linked together to form a stack. Unlike the stack in memory, the FPU register stack is circular—that is, the last register in the stack links back to the first register in the stack.

The register that is considered the top of the stack is defined in the FPU control word register. It is referenced by the name ST(0). Each of the other registers is referenced relative to the top register, by the name ST(x), where x can be 1 through 7. This is shown in Figure 9-1.

Figure 9.1. Figure 9-1

As data is loaded into the FPU stack, the stack top moves downward in the registers. When eight values have been loaded into the stack, all eight FPU data registers have been utilized. If a ninth value is loaded into the stack, the stack pointer wraps around to the first register and replaces the value in that register with the new value, producing an FPU exception error.

Chapter 7 showed how floating-point values can be placed onto the FPU stack using the FLD instruction, integers using the FILD instruction, and BCD data using the FBLD instruction. Various floating-point constant values are also available to load constant values into the stack. There are also commands for storing the values in the FPU register into memory locations in each of the different data types.

Because the FPU is independent of the main processor, it does not normally use the EFLAGS register to indicate results and determine behavior. The FPU contains its own set of registers to perform these functions. The status, control, and tag registers are used to access features and determine the status of the FPU.

This section describes these three FPU registers and shows how to access them in your programs.

# getstatus.s - Get the FPU Status register contents
.section .bss
   .lcomm status, 2
.section .text
.globl _start
_start:
   nop
   fstsw %ax
   fstsw status

   movl $1, %eax
   movl $0, %ebx
   int $0x80

(gdb) x/x &status
0x804908c <status>:     0x00000000
(gdb) print/x $eax
$1 = 0x0
(gdb)

(gdb) info all
.
.
.
fctrl          0x37f    895
fstat          0x0      0
ftag           0x55555  349525
(gdb)

# setprec.s - An example of setting the precision bits in the Control Register
.section .data
newvalue:
   .byte 0x7f, 0x00
.section .bss
   .lcomm control, 2
.section .text
.globl _start
_start:
   nop
   fstcw control
   fldcw newvalue
   fstcw control

   movl $1, %eax
   movl $0, %ebx
   int $0x80

(gdb) run
Starting program: /home/rich/palp/chap09/setprec

Breakpoint 1, _start () at setprec.s:11
11         fstcw control
(gdb) x/x &control
0x804909c <control>:    0x00000000
(gdb) s
12         fldcw newvalue

(gdb) x/x &control
0x804909c <control>:    0x0000037f
(gdb) s
13         fstcw control
(gdb) s
15         movl $1, %eax
(gdb) x/x &control
0x804909c <control>:    0x0000007f
(gdb) info all
.
.
fctrl          0x7f     127
(gdb)

The tag register

The tag register is used to identify the values within the eight 80-bit FPU data registers. The tag register uses 16 bits (2 bits per register) to identify the contents of each FPU data register. This is shown in Figure 9-2.

Figure 9.2. Figure 9-2

Each tag value corresponds to a physical FPU register. The 2-bit value for each register can contain one of four special codes indicating the content of the register. At any given time, an FPU data register can contain the following:

• A valid double-extended-precision value (code 00)

• A zero value (code 01)

• A special floating-point value (code 10)

• Nothing (empty) (code 11)

This enables programmers to perform a quick check of the tag register to determine whether valid data may be in an FPU register, instead of having to read and analyze the contents of the register, although in practice, because you are the one putting the values into the register stack, you should know what is there.

Chapter 7 touched on loading floating-point values into the FPU register stack. In order to perform floating-point math, it is crucial that you understand how data is manipulated on the FPU stack. This is where all of the FPU mathematical operations are performed. You must know how to maneuver data onto and within the stack to process your calculations. The following stacktest.s program demonstrates how to load various data types onto the FPU stack, as well as some common stack functions used when working with the FPU stack:

# stacktest.s - An example of working with the FPU stack
.section .data
value1:
   .int 40
value2:
   .float 92.4405
value3:
   .double 221.440321
.section .bss
   .lcomm int1, 4
   .lcomm control, 2
   .lcomm status, 2
   .lcomm result, 4
.section .text
.globl _start
_start:
   nop
   finit
   fstcw control
   fstsw status
   filds value1
   fists int1
   flds value2
   fldl value3
   fst %st(4)
   fxch %st(1)
   fstps result
   movl $1, %eax
   movl $0, %ebx
   int $0x80

There's a lot going on in this simple program, so let's take this slowly. First, the FINIT instruction is used to initialize the FPU. It sets the control and status registers to their default values, but it does not alter the data contained in the FPU data registers. It is always a good idea to include this instruction in any program that utilizes the FPU.

Following that, the FPU control and status registers are copied to memory locations using the FSTCW and FSTSW instructions. You can view the default values of these resisters by observing these memory locations after the instructions execute:

(gdb) x/2b &control
0x80490cc <control>:    0x7f    0x03
(gdb) x/2b &status
0x80490ce <status>:     0x00    0x00
(gdb)

The output shows that the control register defaulted to the value 0x037f (remember that the value is placed in memory in little-endian format), and the status register defaulted to 0x0000.

The next instruction (FILDS) loads a doubleword integer value into the FPU register stack. The FISTS instruction retrieves the value at the top of the register stack (the value you just placed there) and places it into the destination (which was set to the int1 memory location):

(gdb) info all
.
.
st0            40       (raw 0x4004a000000000000000)
(gdb) x/d &int1
0x80490c8 <int1>:       40
(gdb)

The integer value of 40 was stored in the register tagged as the top of the stack (denoted as ST0). However, notice the hexadecimal value of the stored value. It is pretty easy to see that it is not stored as a normal signed integer value. Instead, the value was converted to the double-extended floating-point data type when it was stored in the FPU register. When the value was retrieved from the FPU register stack and placed in memory, it was automatically converted back to a doubleword integer (because the S character was specified on the FIST mnemonic). You can check that by looking at the hexadecimal value of the memory location:

(gdb) x/4b &int1
0x80490c8 <int1>:       0x28    0x00    0x00    0x00
(gdb)

As expected, the value was stored as a doubleword signed integer value in memory.

The next two instructions load floating-point values into the FPU register stack. The first one uses the FLDS instruction to load a single-precision floating-point value located in the value2 memory location. The second uses the FLDL instruction to load a double-precision floating-point value located in the value3 memory location. Now there are three values loaded into the FPU register stack. As each value is loaded, the preceding values shift down the stack, relative to the top of the stack.

After the FLD instructions, your FPU register stack should look like this:

(gdb) info all
.
.
st0    221.44032100000001150874595623463392  (raw 0x4006dd70b8e086bdf800)
st1    92.44049835205078125  (raw 0x4005b8e1890000000000)
st2    40    (raw 0x4004a000000000000000)
(gdb)

When you display the FPU registers using the info all command, you may notice that the other FPU data registers may or may not contain extraneous data. When the FINIT instruction is executed, it does not initialize the FPU data registers but changes the tag values to show that they are empty. It is possible that extraneous data remains from other operations. It is your job to keep track of what FPU data registers your program uses, and what registers have valid data in them.

Finally, the last three FPU instructions do some data-moving between registers. The FST instruction is used to move data from the ST0 register to another FPU register. Notice the format that is used to specify the fifth FPU register from the top of the stack. The GNU assembler uses the percent sign to indicate a register value, and the FPU register reference number must be enclosed in parentheses.

After the FST instruction, the FXCH instruction is used to exchange the value of the ST0 register with another FPU register—in this case, ST1. After these two instructions, the FPU registers should look like the following:

(gdb) info all
.
.
st0    92.44049835205078125  (raw 0x4005b8e1890000000000)
st1    221.44032100000001150874595623463392  (raw 0x4006dd70b8e086bdf800)
st2    40    (raw 0x4004a000000000000000)
st3    0     (raw 0x00000000000000000000)
st4    221.44032100000001150874595623463392  (raw 0x4006dd70b8e086bdf800)
(gdb)

After you have maneuvered the data around the FPU register stack and performed your required mathematical operations, you will most likely need to retrieve the results from the FPU register stack. The FST and FSTP instructions can also be used to move data from an FPU register to a memory location. The FST instruction copies data from the ST0 FTP register to a memory location (or another FPU register) while keeping the original value in the ST0 register.

The FSTP instruction also copies the ST0 FPU register value, but then pops it from the FPU register stack. This shifts all of the FPU stack values up one place in the stack.

Don't forget to add the data size character to the end of the FST and FSTP mnemonics to specify the proper size of the resulting data value. In this example, the FSTPS instruction is used to create a single-precision floating-point value stored in 4 bytes (32 bits) of memory from the value in the ST0 FPU stack position:

(gdb) x/f &result
0x80490cc <result>:     92.4404984
(gdb) x/4b &result
0x80490cc <result>:     0x89    0xe1    0xb8    0x42
(gdb)

After the FSTPS instruction, you can see that the value was removed from the stack, and the other values were "shifted" up one position:

(gdb) info all
.
.
st0   221.44032100000001150874595623463392     (raw 0x4006dd70b8e086800)
st1   40       (raw 0x4004a000000000000000)
st2   0        (raw 0x00000000000000000000)
st3   221.44032100000001150874595623463392     (raw 0x4006dd70b8e086800)
(gdb)

Now that you are comfortable with manipulating floating-point values within the FPU, it's time to start working on performing mathematical operations on the data.

The FABS, FCHS, FRNDINT, and FSQRT instructions perform simple mathematical functions on the floating-point values. The FABS instruction computes the absolute value of ST(0). The FCHS instruction changes the sign bit of the value. The FSQRT computes the square root of ST(0).

The fpmath2.s demonstrates using these functions:

# fpmath2.s - An example of the FABS, FCHS, and FSQRT instructions
.section .data
value1:
   .float 395.21
value2:
   .float −9145.290
value3:
   .float 64.0
.section .text
.globl _start
_start:
   nop
   finit
   flds value1
   fchs
   flds value2
   fabs
   flds value3
   fsqrt

   movl $1, %eax
   movl $0, %ebx
   int $0x80

After assembling and linking the program, you can watch the FPU registers in the debugger. At the end of the instructions, the FPU registers should look like this:

(gdb) info all
.
.
.
st0       8        (raw 0x40028000000000000000)
st1       9145.2900390625  (raw 0x400c8ee5290000000000)
st2       −395.209991455078125     (raw 0xc007c59ae10000000000)
(gdb)

Remember that the values are in reverse order as they are pushed onto the FPU stack. The ST0 register holds the result from the FSQRT instruction, and the ST2 register holds the result from the FCHS instruction.

The FRNDINT instruction is different in that its behavior is dependent on the value of the rounding bits in the FPU control register. The FRNDINT instruction rounds the floating-point value in ST0 to the nearest integer value, according to one of the four rounding methods described earlier in the "The control register" section. This is demonstrated in the roundtest.s program:

# roundtest.s - An example of the FRNDINT instruction
.section .data
value1:
   .float 3.65
rdown:
   .byte 0x7f, 0x07

rup:
   .byte 0x7f, 0x0b
.section .bss
   .lcomm result1, 4
   .lcomm result2, 4
   .lcomm result3, 4
.section .text
.globl _start
_start:
   nop
   finit
   flds value1
   frndint
   fists result1

   fldcw rdown
   flds value1
   frndint
   fists result2

   fldcw rup
   flds value1
   frndint
   fists result3

   movl $1, %eax
   movl $0, %ebx
   int $0x80

The roundtest.s program defines two doubleword values (rdown and rup) that are used to change the rounding bits in the FPU control register. Because no other values need to be changed, we can do this with a static value. To set rounding to round down, the rounding bits are set to the binary value 01, which makes the control register have the value 0x77F. To set the rounding to round up, the rounding bits are set to the binary value 10, which makes the control register have the value 0xB7F.

The first group of instructions initializes the FPU, loads the test value into ST0, performs the FRNDINT instruction (using the default rounding setting), and moves the result to the result1 memory location (as an integer value):

finit
flds value1
frndint
fists result1

The next group of instructions loads the control register with the value to set rounding to round down, load the ST0 register with the test value, perform the rounding, and then store the result in the result2 memory location:

fldcw rdown
flds value1
frndint
fists result2

The last group of instructions loads the control register with the value to set rounding to round up, load the ST0 register with the test value, perform the rounding, and then store the result in the result3 memory location.

After assembling and linking the program, you can watch how it works by running it in the debugger. After the first group of instructions, the rounded value should be in the result1 memory location:

(gdb) x/d &result1
0x80490c4 <result1>:    4
(gdb)

By default, the floating-point value was rounded up to the integer value 4. After the next group of instructions, the rounded value should be in the result2 memory location:

(gdb) x/d &result2
0x80490c8 <result2>:    3
(gdb)

As expected, by setting the rounding bits to round down, the new rounded value was set to the integer value 3. Finally, after the last group of instructions, the rounded value should be in the result3 memory location:

(gdb) x/d &result3
0x80490cc <result3>:    4
(gdb)

The result shows that the rounding bits are now rounding the values up to the nearest integer.

Partial remainders are a tricky part of floating-point division. The concept of a partial remainder relates to how floating-point division is performed. The remainder of the division operation is determined through a series of subtractions of the divisor from the dividend. Through each subtraction iteration, the intermediate remainder is called the partial remainder. The iterations stop when the partial remainder is less than the divisor (no more subtractions can be performed without creating a negative number). At the end of the division, the final answer is an integer value representing the number of subtraction iterations (called the quotient), and a floating-point value representing the final partial remainder (now called the remainder).

Depending on how many iterations are required to perform the division, there can be many partial remainders. The number of iterations required depends on the difference between the exponent values of the dividend and the divisor. Each subtraction cannot reduce the exponent value of the dividend by more than 63.

The FPREM and FPREM1 instructions both compute the remainder value of a floating-point division, but do it using slightly different methods.

The basic method for determining a division remainder is to determine the floating-point quotient of the division of the dividend and divisor, and then round that value to the nearest integer. The remainder is then the difference of the quotient multiplied by the divisor, and the dividend. For example, to find the remainder for 20.65 divided by 3.97, you would perform the following steps:

The tricky part is the rounding procedure. Intel developed the FPREM instruction before any standards in partial remainders were created. The Intel developers chose to use the default FPU round toward zero method to find the integer quotient value, and then determine the remainder.

Unfortunately, when the IEEE produced a standard, it chose to round the quotient value up to the nearest integer value before finding the remainder. While this seems to be a subtle difference, it has huge implications when calculating partial remainders along the process. Because of this, Intel chose to keep the original FPREM instruction in its original form, and create the FPREM1 instruction, which uses the IEEE method of calculating the partial remainders.

The problem with calculating partial remainders is that you must know when the iteration process is complete. Both the FPREM and FPREM1 instructions use the FPU status register condition code bit 2 (bit 10 of the status register) to indicate when the iterations are complete. When more iterations are required, the C2 bit is set. When the iterations are complete, the C2 bit is cleared.

To check the C2 bit, you must first use the FSTSW instruction to copy the contents of the status register into either a memory location or the AX register, and then use the TEST instruction to determine whether the bit has been set.

The premtest.s program performs a simple floating-point division using the FPREM1 instruction:

# premtest.s - An example of using the FPREM1 instruction
.section .data
value1:
   .float 20.65
value2:
   .float 3.97
.section .bss
   .lcomm result, 4
.section .text
.globl _start
_start:
   nop
   finit
   flds value2
   flds value1
loop:
   fprem1
   fstsw %ax
   testb $4, %ah
   jnz loop

   fsts result

movl $1, %eax
   movl $0, %ebx
   int $0x80

Because the FPREM1 instruction is an iterative process, there is no guarantee that it will have the final answer on the first pass. The TEST instruction is used to check the value of the C2 condition bit (moved to the AX register with the FSTSW instruction). If the bit is set, the TEST instruction will produce a nonzero value, and the JNZ instruction will jump back to the loop point. When the bit is clear, the TEST instruction produces a zero value, and the JNZ instruction falls through. The remainder value is stored in the ST0 register, which is copied using the FSTS instruction to the result memory location.

After assembling and linking the program, you can run it in the debugger and watch how the FPREM1 instruction determines the remainder value. For the example values shown, the remainder value should look like this:

(gdb) x/f &result
0x80490a8 <result>: 0.799999475
(gdb)

While the remainder value is stored in the ST0 register, the actual quotient value is not stored in a register. The three least significant bits of the quotient value are stored in the control register using the leftover condition code bits as follows:

You must manually extract these bits to form the lower three bits of the quotient value.

Another huge advantage to the FPU is its ability to calculate trigonometric functions. Normal trig functions such as sine, cosine, and tangent are simple to obtain from the FPU. The following sections demonstrate using the FPU trig functions in assembly language programs.

radians = (degrees * pi) / 180

fsts degree1         # load the degrees value stored in memory into ST0
fidivs val180        # divide by the 180 value stored in memory
fldpi                # load pi into ST0, degree/180 now in ST1
fmul %st(1), %st(0)  # multiply degree/180 and pi, saving in ST0
fsin                 # perform trig function on value in ST0

# trigtest1.s - An example of using the FSIN and FCOS instructions
.section .data
degree1:
   .float 90.0
val180:
   .int 180
.section .bss
   .lcomm radian1, 4
   .lcomm result1, 4
   .lcomm result2, 4
.section .text
.globl _start
_start:
   nop
   finit
   flds degree1
   fidivs val180
   fldpi
   fmul %st(1), %st(0)
   fsts radian1
   fsin
   fsts result1
   flds radian1
   flds radian1
   fcos
   fsts result2

   movl $1, %eax
   movl $0, %ebx
   int $0x80

(gdb) x/f &result1
0x80490bc <result1>:    1
(gdb) x/f &result2
0x80490c0 <result2>:    −4.37113883e-08
(gdb)

# trigtest2.s - An example of using the FSINCOS instruction
.section .data
degree1:
   .float 90.0
val180:
   .int 180
.section .bss
   .lcomm sinresult, 4
   .lcomm cosresult, 4
.section .text
.globl _start
_start:
   nop
   finit
   flds degree1
   fidivs val180
   fldpi
   fmul %st(1), %st(0)
   fsincos
   fstps cosresult
   fsts sinresult

   movl $1, %eax
   movl $0, %ebx
   int $0x80

(gdb) x/f &cosresult
0x80490b0 <cosresult>:  −2.71050543e-20
(gdb) x/f &sinresult
0x80490ac <sinresult>:  1
(gdb)

The FPU logarithmic functions provide instructions for performing log base 2 calculations. The FYL2X instruction performs the following calculation:

ST(1) * log2 (ST(0))

The FYL2X1 instruction performs this calculation:

ST(1) * log2 (ST(0) + 1.0)

The FSCALE instruction scales a value in ST(0) by 2 to the power of the value in ST(1). This can be used for both scaling up (by using a positive value in ST(1)) and for scaling down (by using a negative value in ST(1)). The fscaletest.s program demonstrates this principle:

# fscaletest.s - An example of the FSCALE instruction
.section .data
value:
   .float 10.0
scale1:
   .float 2.0
scale2:
   .float −2.0
.section .bss
   .lcomm result1, 4
   .lcomm result2, 4
.section .text

.globl _start
_start:
   nop
   finit
   flds scale1
   flds value
   fscale
   fsts result1

   flds scale2
   flds value
   fscale
   fsts result2

   movl $1, %eax
   movl $0, %ebx
   int $0x80

The first scale value (set to 2.0) is loaded into the ST(0) register, and then the test value (10.0) is loaded (moving the scale value to ST(1) where it belongs). After the FSCALE instruction, the test value is multiplied by 2 to the power of the scale value, which results in multiplying the test value by 4.

Next, the second scale value (set to −2.0) is loaded, along with the test value, and the FSCALE instruction is executed again. This time the negative scale factor divides the test value by 4.

After assembling and linking the program, you can step through the instructions and display the results in the result1 and result2 memory locations:

(gdb) x/f &result1
0x80490b8 <result1>:    40
(gdb) x/f &result2
0x80490bc <result2>:    2.5
(gdb)

The values produced were as expected.

Although the FPU log functions only provide base 2 logarithms, it is possible to perform calculations using other logarithmic bases. To find a logarithm of another base using base 2 logarithms, you can use the following equation:

log (base b) X = (1/log(base 2) b) * log(base 2) X

This can be easily implemented using the FYL2X instruction. The logtest.s program calculates the base 10 log of a value in memory:

# logtest.s - An example of using the FYL2X instruction
.section .data

value:
   .float 12.0
base:
   .float 10.0
.section .bss
   .lcomm result, 4
.section .text
.globl _start
_start:
   nop
   finit
   fld1
   flds base
   fyl2x
   fld1
   fdivp
   flds value
   fyl2x
   fsts result

   movl $1, %eax
   movl $0, %ebx
   int $0x80

The logtest.s program implements the equation to perform a log base 10 calculation of the value 12.0. It starts off by loading the value 1.0 in the FPU register (the Y value for the first log function), then the value of the base (10.0), performing the base 2 log of the value. This produces the value for the first half of the equation (note that in this example, because the base was chosen as 10, the FLDL2T instruction could be used to load the value into ST(0) with one instruction). This value becomes the new Y value for the next FYL2X instruction, with the X value being the original value (12.0). The final result should be equal to the base 10 log of 12, or 1.07918119.

After assembling and linking the program, the result can be seen by running the program in the debugger and looking at the result memory location:

(gdb) x/f &result
0x80490a8 <result>: 1.07918119
(gdb)

Yes, the logtest.s program produced the correct result for the base 10 log of 12.

The FCOM family of instructions is used to compare two floating-point values in the FPU. The instructions compare the value loaded in the ST0 FPU register with either another FPU register or a floating-point value in memory. There are also options for popping one or both values off of the FPU stack after the compare. The following table describes the different versions that can be used.

The result of the comparison is set in the C0, C2, and C3 condition code bits of the status register. The possible results from the comparison are shown in the following table.

You must use the FSTSW instruction to copy the status register value to the AX register or a memory location, and then use the TEST instruction to determine the result of the comparison.

The fcomtest.s program demonstrates this principle:

# fcomtest.s - An example of the FCOM instruction
.section .data
value1:
   .float 10.923
value2:
   .float 4.5532
.section .text

.globl _start
_start:
   nop
   flds value1
   fcoms value2
   fstsw
   sahf
   ja greater
   jb lessthan
   movl $1, %eax
   movl $0, %ebx
   int $0x80
greater:
   movl $1, %eax
   movl $2, %ebx
   int $0x80
lessthan:
   movl $1, %eax
   movl $1, %ebx
   int $0x80

The fcomtest.s program uses some trickery to determine the result of the FCOM instruction After retrieving the status register from the FPU and saving it in the AX register using the FSTSW instruction, the SAHF instruction is used to load the EFLAGS register from the AH register values.

The SAHF instruction moves bits 0, 2, 4, 6, and 7 of the AH register to the carry, parity, aligned, zero, and sign flags, respectively. The other bits in the EFLAGS register are unaffected. It just so happens (thanks to the Intel software engineers) that these bits in the AH register contain the FPU status register condition code values. Combining the FSTSW and SAHF instructions moves the following:

Once this is done, the EFLAGS carry, parity, and zero flags line up with the C0, C2, and C3 condition code bits, which produces a nice translation for using the JA, JB, and JZ instructions to determine the comparison of the two floating-point values.

The fcomtest.s program produces different result code depending on the values set in memory. The result code can be seen using the echo command:

$ ./fcomtest
$ echo $?
2
$

The result code of 2 indicates that the first value (stored in the value1 memory location) was greater than the second value (stored in the value2 memory location). You can change the values within the program to ensure that the comparisons work properly.

You may be wondering why, if using the FSTSW and SAHF instruction combination after the comparison instruction works so well, it is not incorporated into a single instruction. The answer is that it was. Starting in the Pentium Pro processor line, the FCOMI instruction is available to do just that. The FCOMI family of instructions performs the floating-point comparisons and places the results in the EFLAGS registers using the carry, parity, and zero flags.

The following table describes the instructions in the FCOMI family.

As you can tell from the table descriptions, one limitation to the FCOMI instruction family is that they can only compare two values in the FPU registers, not a FPU register with a value in memory.

The last two instructions in the table perform a service that is not available with the FCOM instruction family. The FUCOMI and FUCOMIP instructions ensure that the values being compared are valid floating-point numbers (using the FPU tag register). If an unordered value is present, an exception is thrown.

The output of the FCOMI instructions uses the EFLAGS registers, as shown in the following table.

To prove that the FCOMI instruction works as advertised, the following fcomitest.s program duplicates the scenario of the fcomtest.s program, but using the FCOMI instruction:

# fcomitest.s - An example of the FCOMI instruction
.section .data
value1:
   .float 10.923
value2:
   .float 4.5532
.section .text
.globl _start
_start:
   nop
   flds value2
   flds value1
   fcomi %st(1), %st(0)
   ja greater
   jb lessthan
   movl $1, %eax
   movl $0, %ebx
   int $0x80
greater:
   movl $1, %eax
   movl $2, %ebx
   int $0x80
lessthan:
   movl $1, %eax
   movl $1, %ebx
   int $0x80

Because the FCOMI instruction requires both values to be in the FPU register, they are loaded in opposite order so the value1 value will be in the ST0 register when the comparison is made. After assembling and linking the program, you can run it and view the result code:

$ ./fcomitest
$ echo $?
2
$

The FCOMI instruction produced the same result as the FCOM instruction test program. Again, you can play around with the values to make sure the code does indeed produce the proper result code for different comparisons.

Similar to the CMOV instructions for integers, the FCMOV instructions enable you to program conditional moves of floating-point values. Each of the instructions in the FCMOV family moves the source operand in the ST(x) FPU register with the destination operand in the ST(0) FPU register based on the value of the EFLAGS register. If the condition is true, the value in the ST(x) register is moved to the ST(0) register.

Because the move is based on the EFLAGS register, it is more common for the FCMOV instruction to be preceded by an FCOMI instruction.

The following table outlines the available instructions in the FCMOV family.

The GNU format of the instructions is

fcmovxx source, destination

where source is the ST(x) register, and destination is the ST(0) register.

The fcmovtest.s program demonstrates some simple moves:

# fcmovtest.s - An example of the FCMOVxx instructions
.section .data
value1:
   .float 20.5
value2:
   .float 10.90
.section .text
.globl _start
_start:
   nop
   finit
   flds value1
   flds value2
   fcomi %st(1), %st(0)
   fcmovb %st(1), %st(0)

   movl $1, %eax
   movl $0, %ebx
   int $0x80

The values are loaded into the FPU registers (ST0 = 10.90, and ST1 = 20.5). The FCOMI instruction sets the EFLAGS registers depending on the values in ST0 and ST1. The FCMOVB instruction moves the value in ST1 to ST0 if the value of ST0 is below that of ST1 (which in this case it is).

When the program is assembled and linked, you can check the FPU registers while the program is running to see what happens. After the FCMOVB instruction, both the ST0 and ST1 registers should contain the 20.5 value.

The FSTENV instruction is used for storing the FPU environment in a block of memory. The following FPU registers are stored:

The values are stored in a 28-byte block of memory. The FLDENV instruction is used to load the memory block values back into the FPU environment. The fpuenv.s program demonstrates these instructions:

# fpuenv.s - An example of the FSTENV and FLDENV instructions
.section .data
value1:
   .float 12.34
value2:
   .float 56.789
rup:
   .byte 0x7f, 0x0b
.section .bss
   .lcomm buffer, 28

.section .text
.globl _start
_start:
   nop
   finit
   flds value1
   flds value2
   fldcw rup
   fstenv buffer

   finit
   flds value2
   flds value1

   fldenv buffer

   movl $1, %eax
   movl $0, %ebx
   int $0x80

The fpuenv.s program initializes the FPU, loads a couple of values into the FPU data registers, modifies the control register to alter the rounding bits, and then stores the result in the buffer memory location. If you look at the buffer location after the FSTENV instruction, it should look like this:

(gdb) x/28b &buffer
0x80490c0 <buffer>:    0x7f   0x0b   0xff   0xff   0x00   0x30   0xff  0xff
0x80490c8 <buffer+8>:  0xff   0x0f   0xff   0xff   0x7e   0x80   0x04  0x08
0x80490d0 <buffer+16>: 0x23   0x00   0x00   0x00   0xb8   0x90   0x04  0x08
0x80490d8 <buffer+24>: 0x2b   0x00   0xff   0xff
(gdb)

You may notice the control register (0x7f 0x0b) and the status register (0x00 0x30) in the memory locations. After the FPU environment is stored, the FPU is initialized, and a few more data values are placed in the FPU data registers. Look at the FPU registers using the info all command.

The FPU environment is then restored from the buffer using the FLDENV instruction. After the restore, look at the registers within the FPU. Notice that the FPU data registers were not restored to their previous values, but the control register is again set to round up the rounding bits.

The FSTENV instruction stored the FPU environment, but as you saw in the programming example, the data within the FPU was not saved. To save the complete FPU environment plus data, you must use the FSAVE instruction.

The FSAVE instruction copies all of the FPU registers to a 108-byte memory location, and then initializes the FPU state. When the FPU is restored using the FRSTOR instruction, all of the FPU registers (including the data registers) are restored to how they were when the FSAVE instruction was executed:

# fpusave.s - An example of the FSAVE and FRSTOR instructions
.section .data
value1:
   .float 12.34
value2:
   .float 56.789
rup:
   .byte 0x7f, 0x0b
.section .bss
   .lcomm buffer, 108
.section .text
.globl _start
_start:
   nop
   finit
   flds value1
   flds value2
   fldcw rup
   fsave buffer

   flds value2
   flds value1

   frstor buffer

   movl $1, %eax
   movl $0, %ebx
   int $0x80

After loading a couple of values in the FPU data registers and setting the rounding bits, the FPU state is stored in the buffer location using the FSAVE instruction. Before the FSAVE, you can look at the FPU state using the debugger info all command:

(gdb) info all
.
.
st0        56.78900146484375        (raw 0x4004e327f00000000000)
st1        12.340000152587890625    (raw 0x4002c570a40000000000)
st2        0        (raw 0x00000000000000000000)
st3        0        (raw 0x00000000000000000000)
st4        0        (raw 0x00000000000000000000)
st5        0        (raw 0x00000000000000000000)
st6        0        (raw 0x00000000000000000000)
st7        0        (raw 0x00000000000000000000)
fctrl      0xb7f    2943
fstat      0x3000   12288
ftag       0xfff    4095
fiseg      0x23     35
fioff      0x804807e        134512766
foseg      0x2b     43
fooff      0x80490b4        134516916
fop        0x0      0
(gdb)

The two data values, and the new control register setting, can be seen in the preceding listing. After the FSAVE instruction, you can view the new FPU state:

(gdb) info all
.
.
st0        0        (raw 0x00000000000000000000)
st1        0        (raw 0x00000000000000000000)
st2        0        (raw 0x00000000000000000000)
st3        0        (raw 0x00000000000000000000)
st4        0        (raw 0x00000000000000000000)
st5        0        (raw 0x00000000000000000000)
st6        56.78900146484375        (raw 0x4004e327f00000000000)
st7        12.340000152587890625    (raw 0x4002c570a40000000000)
fctrl      0x37f    895
fstat      0x0      0
ftag       0xffff   65535
fiseg      0x0      0
fioff      0x0      0
foseg      0x0      0
fooff      0x0      0
fop        0x0      0
(gdb)

Notice that the top of stack value has been moved so that the original top of stack is now at the bottom of the register stack. Also, the control register value has been reset to the default value. You can see what values are in the buffer memory location using the debugger:

(gdb) x/108b &buffer
0x80490c0 <buffer>:    0x7f   0x0b   0xff   0xff   0x00   0x30   0xff  0xff
0x80490c8 <buffer+8>:  0xff   0x0f   0xff   0xff   0x7e   0x80   0x04  0x08
0x80490d0 <buffer+16>: 0x23   0x00   0x00   0x00   0xb4   0x90   0x04  0x08
0x80490d8 <buffer+24>: 0x2b   0x00   0xff   0xff   0x00   0x00   0x00  0x00
0x80490e0 <buffer+32>: 0x00   0xf0   0x27   0xe3   0x04   0x40   0x00  0x00
0x80490e8 <buffer+40>: 0x00   0x00   0x00   0xa4   0x70   0xc5   0x02  0x40
0x80490f0 <buffer+48>: 0x00   0x00   0x00   0x00   0x00   0x00   0x00  0x00
0x80490f8 <buffer+56>: 0x00   0x00   0x00   0x00   0x00   0x00   0x00  0x00
0x8049100 <buffer+64>: 0x00   0x00   0x00   0x00   0x00   0x00   0x00  0x00
0x8049108 <buffer+72>: 0x00   0x00   0x00   0x00   0x00   0x00   0x00  0x00
0x8049110 <buffer+80>: 0x00   0x00   0x00   0x00   0x00   0x00   0x00  0x00
0x8049118 <buffer+88>: 0x00   0x00   0x00   0x00   0x00   0x00   0x00  0x00
0x8049120 <buffer+96>: 0x00   0x00   0x00   0x00   0x00   0x00   0x00  0x00
0x8049128 <buffer+104> 0x00   0x00   0x00   0x00
(gdb)

The buffer contains not only the control, status, and tag registers, but also the FPU data register values. After executing the FRSTOR instruction, you can look at all the registers and see that they are restored to how they were when the FSAVE was performed:

(gdb) info all
.
.
st0        56.78900146484375        (raw 0x4004e327f00000000000)
st1        12.340000152587890625    (raw 0x4002c570a40000000000)
st2        0        (raw 0x00000000000000000000)
st3        0        (raw 0x00000000000000000000)
st4        0        (raw 0x00000000000000000000)
st5        0        (raw 0x00000000000000000000)
st6        0        (raw 0x00000000000000000000)
st7        0        (raw 0x00000000000000000000)
fctrl      0xb7f    2943
fstat      0x3000   12288
ftag       0xfff    4095
fiseg      0x23     35
fioff      0x804807e        134512766
foseg      0x2b     43
fooff      0x80490b4        134516916
fop        0x0      0
(gdb)