Introduction
This chapter describes the basic concepts and design considerations around IBM z15TM servers and includes the following topics:
1.1 Design considerations for the IBM z15
Delivering new services efficiently and effectively with speed and at scale is crucial to any business, large or small. Managing changes and potential disruptions to the IT infrastructure while maintaining availability of services is a must. Ensuring data privacy and protection to mitigate impacts of security breaches is what every business expects from its IT infrastructure.
There is no doubt that the technology you choose determines business success and differentiates you from the competition. Technology choices must help meet the expectations of rapid dynamic development cycles and give the confidence that new and existing services are resilient and can be delivered quickly and securely. Therefore, the correct balance of open source technologies and the IT platform on which they run is also key.
1.1.1 Complementing and augmenting cloud solutions
Today, many business use cloud technologies to deliver cloud native services at scale and at lower cost, but often the risk of vendor lock-in and escalating costs exists. Also, approximately 80% of enterprise applications and services have not yet moved to the cloud because of struggles with flexibility, connectivity, security, and management across multicloud environments.
1.1.2 Compliance, resiliency, and performance
The latest member of the IBM Z family, the z15, features a tried-and-true architecture to satisfy today’s demands. It can help you create an open, secure, and resilient infrastructure that streamlines your ability to integrate disparate cloud environments and create a single, cohesive IT infrastructure that provides high availability, scalability, and performance. The z15 can also help you fully protect your data (in-flight and at-rest), providing the strongest workload isolation, while facilitating regulatory compliance.
The IBM Integrated Accelerator for zEnterprise® Data Compression (zEDC) provides on-chip compression (processor nest compression accelerator), which supports DEFLATE-compliant compression and decompression and GZIP CRC/ZLIB Adler. Compared to the zEDC Express (PCIe feature), the z15 on-chip compression provides low latency and high bandwidth while eliminating the need for the virtualization layer. The nest accelerator is now accessible as a designed instruction, which is available for problem state programs.
New with z15, the System Recovery Boost feature offers the customer more CP capacity during system recovery operations, such as shutdown, IPL, and stand-alone dumps, to “speed up” the recovery. The feature is embedded in the z15 firmware and is available to operating systems (opt-in for supported OS-es) to accelerate recovery from maintenance tasks by providing more CP capacity to opt in LPARs.
For more information about System Recovery Boost, see Chapter 7, “Operating system support” on page 255.
1.1.3 Pervasive encryption
Cryptography is in the DNA of IBM Z family. The IBM z15 continues that tradition with pervasive encryption to defend and protect your critical assets with unrivaled encryption and intelligent data monitoring without compromising transactional throughput or response times. Most importantly, pervasive encryption requires no application changes.
Pervasive encryption can dramatically simplify data protection and reduce the costs that are associated with regulatory compliance. By using simple policy controls, z15 pervasive computing streamlines data protection for mission critical IBM Db2® for z/OS, IBM IMS, and Virtual Storage Access Method (VSAM) datasets.
The Central Processor Assist for Cryptographic Function (CPACF), which is standard on every core, supports pervasive encryption and provides hardware acceleration for encryption operations. The new Crypto-Express7S gets a performance boost on z15. Combined, these enhancements perform encryption more efficiently on the z15 than on earlier IBM Z servers.
1.1.4 IBM Z Data Privacy Passports
The new IBM Z Data Privacy Passports with IBM z15 is designed to enforce security and privacy protections to data not only on Z, but across platforms during the extract, transform, and load (ETL) process. It provides a data-centric security solution that complements Pervasive Encryption available on IBM Z while enabling data to play an active role in its own protection.
1.1.5 Blending open source with IBM Z state-of-the-art technologies
The IBM z15 was designed specifically to meet the demand for new services and customer experiences, while securing the growing amounts of data and complying with increasingly intricate regulations. With up to 190 configurable cores, z15 has performance and scaling advantage over prior generation and 25% more capacity than the 170-way z14.
Optimized SMT on z15 delivers improved virtualization performance to benefit Linux. High-speed connectivity out to the data is critical in achieving exceptional levels of transaction throughput. The IBM zHyperLink Express introduces disk I/O technology for accessing the IBM DS8880 storage system with low latency, which enables shorter batch windows and a more resilient I/O infrastructure with predictable and repeatable I/O performance.
With up to 40 TB of memory, z15 can open opportunities, such as in-memory data marts and in-memory analytics, while giving you the necessary room to tune applications for optimal performance. By using the Vector Packed Decimal Facility that allows packed decimal operations to be performed in registers rather than memory, and new fast mathematical computations, compilers (such as Enterprise COBOL for z/OS, V6.2, Enterprise PL/I for z/OS, V5.2, z/OS V2.4 XL C/C++), the COBOL optimizer, Automatic Binary Optimizer for z/OS, V1.3, and Java, are optimized on z15. These compilers and optimizers are designed to improve application performance and reduce CPU usage and operating costs.
Java improvements and the use of crypto-acceleration deliver more improvements in throughput per core, which gives a natural boost to z/OS Connect EE, IBM WebSphere® Liberty in IBM CICS®, Spark for z/OS, and IBM Java for Linux on Z.
 
 
Smoothly handling the data tsunami requires robust infrastructure that is designed specifically for high-volume data transactions. To take advantage of new unstructured data,1 businesses on IBM Z can use application programming interfaces (APIs) that can help with creating and delivering innovative services.
Linux on IBM Z, which is optimized for open source software, brings more value to the platform. Linux on IBM Z supports a wealth of new products that are familiar to application developers, such as Python, Scala, Spark, MongoDB, PostgreSQL, and MariaDB. By accessing core business data directly on platform (without the need for ETL2, and hence no data offload off Z platform), you can develop new intelligent applications and business processes.
As your business technology needs evolve to compete in today’s digital economy, IBM stands ready to help with intelligent, robust, and comprehensive technology solutions. The IBM approach integrates server, software, and storage solutions to ensure that each member of the stack is designed and optimized to work together. The new IBM z15™ leads that approach by delivering the power and speed users demand, the security users and regulators require, and the operational efficiency that maximizes your bottom line.
 
Terminology note: The remainder of this book uses the designation CPC to refer to the central processor complex.
1.2 z15 server highlights
This section reviews some of the following most important features and functions of z15 (Driver 41) servers:
1.2.1 Processor and memory
The system is packaged in 19-inch format frames. With 1 - 4 frames, and processor and I/O modular architecture, it provides flexible configuration and fit for purpose systems.
IBM continues its technology leadership with the z15 server. The z15 server is built by using the IBM modular multi-processor drawer design that supports 1 - 5 processor drawers per CPC. Each processor drawer contains four Processor Unit (PU) single-chip modules (SCMs) and one Storage Controller (SC) SCM.
Both SCMs are redesigned by using 14 nm FINFET SOI technology.3 Each PU SCM has 12 processor units (PUs, or cores). In addition to SCMs, CPC drawers host memory DIMMs, connectors for I/O, redundant power supplies, combined Flexible Service Processors and Oscillators (FSP/OSC), and cooling manifolds.
The superscalar processor implements third-generation Simultaneous Multi-Threading (SMT)4. It also implements redesigned OoO, augmented caches and translation lookaside buffer (TLB), optimized pipeline, and better branch prediction.
Also featured is an expanded instruction set with Vector Packed Decimal Facility, Guarded Storage Facility, Vector Facility enhancements, Semaphore Assist Facility, Order Preserving Compression, Entropy Encoding for Co-processor Compression for better performance in several different areas, and the IBM Integrated Accelerator for zEnterprise Data Compression (on-chip compression accelerator).
Depending on the model, the z15 server can support 512 GB - 40 TB of usable memory, with up to 8 TB of usable memory per CPC drawer. In addition, a fixed amount of 256 GB is reserved for the hardware system area (HSA) and is not part of customer-purchased memory. Memory is implemented as a redundant array of independent memory (RAIM) and uses extra physical memory as spare memory. The RAIM function accounts for 20% of the physical installed memory in each CPC drawer.
New with z15, Virtual Flash Memory (VFM) feature is offered from the main memory capacity in 0.5 TB units (versus 1.5 TB per feature on z14) increasing granularity for the feature. VFM provides much simpler management and better performance by eliminating the I/O to the adapters in the PCIe+ I/O drawers. VFM does not require any application changes when moving from IBM zFlash Express (previously available on z13® and zEC12).
1.2.2 Capacity and performance
The z15 server provides increased processing and enhanced I/O capabilities over its predecessor, the z14 system. This capacity is achieved by increasing the performance of the individual PUs and the number of PUs per system, redesigning the system cache, increasing the amount of memory, and introducing new I/O technologies.
The increased performance and the total system capacity available (with potential energy savings) allows consolidation of diverse applications on a single platform with significant financial savings. The introduction of new technologies and an expanded and enhanced instruction set ensure that the z15 server is a high-performance, reliable, and rich-security platform. The z15 server is designed to maximize the use of resources and allows you to integrate and consolidate applications and data across the enterprise IT infrastructure.
z15 server is offered in one model (T01) with five maximum processor features, with 1 - 190 configurable PUs. The processor features Max34, Max71, Max108, and Max145 have one, two, three, respective four CPC drawers with 41 active PUs per CPC drawer. The high-capacity feature (Max190) has five processor (CPC) drawers with 43 PUs per drawer.
The z15 T01 feature Max190 is estimated to provide up to 25% more total system capacity than the z14 Model M05, with the same amount of memory and power requirements. With up to 40 TB of main storage and enhanced SMT, the performance of the z15 processors deliver considerable improvement. Uniprocessor performance also increased significantly. A z15 Model 701 offers average performance improvements of up to 14%5 over the z14 Model 701.
The Integrated Facility for Linux (IFL) and IBM Z Integrated Information Processor (zIIP) processor units on the z15 server can be configured to run two simultaneous threads per clock cycle in a single processor (SMT). This feature increases the capacity of these processors with 25% in average5 over processors that are running single thread. SMT is also enabled by default on System Assist Processors (SAPs).
The z15 server expands the subcapacity settings, offering three subcapacity levels (in models 4xx, 5xx and 6xx) for up to 34 processors that are characterized as CPs (compared to up to 33 processors for z14). This configuration gives a total of 292 distinct capacity settings. The z15 servers deliver scalability and granularity to meet the needs of medium-sized enterprises, while also satisfying the requirements of large enterprises that have demanding, mission-critical transaction and data processing requirements.
This comparison is based on the Large System Performance Reference (LSPR) mixed workload analysis. For more information about performance and workload variation on z15 servers, see Chapter 12, “Performance” on page 473.
z15 servers continue to offer all specialty engine types that are available on z14.
Workload variability
Consult the LSPR when considering performance on z15 servers. The range of performance ratings across the individual LSPR workloads is likely to have a large spread. More performance variation of individual logical partitions (LPARs) is available when an increased number of partitions and more PUs are available. For more information, see Chapter 12, “Performance” on page 473.
For more information about performance, see the LSPR website.
For more information about millions of service units (MSUs) ratings, see the IBM Z Software Contracts website.
Capacity on demand
Capacity on demand (CoD) enhancements enable clients to have more flexibility in managing and administering their temporary capacity requirements. The z15 server supports the same architectural approach for CoD offerings as the z14 (temporary or permanent). Within the z15 server, one or more flexible configuration definitions can be available to solve multiple temporary situations, and multiple capacity configurations can be active simultaneously.
 
Prepaid OOCoD tokens1: Beginning with IBM z15, new prepaid OOCoD tokens that are purchased do not carry forward to future systems.
1 IBM’s statements regarding its plans, directions, and intent are subject to change or withdrawal without notice at IBM’s sole discretion.
Up to 200 staged records can be created to handle many scenarios. Up to eight of these records can be installed on the server at any time. After the records are installed, the activation of the records can be done manually, or the z/OS Capacity Provisioning Manager can automatically start the activation when Workload Manager (WLM) policy thresholds are reached. Tokens are available that can be purchased for On/Off CoD before or after workload execution (pre- or post-paid).
LPAR capping
IBM Processor Resource/Systems Manager (IBM PR/SM) offers different options to limit the amount of capacity that is assigned to and used by an LPAR or a group of LPARs. By using the Hardware Management Console (HMC), a user can define an absolute or a relative capping value for LPARs that are running on the system.
1.2.3 Virtualization
This section describes built-in virtualization capabilities of z15 supporting operating systems, hypervisors, and available virtual appliances.
z15 servers support IBM z/Architecture® mode only, which can be initialized in LPAR mode (also known as PR/SM) or Dynamic Partition Manager (DPM) mode.
PR/SM mode
PR/SM is Licensed Internal Code (LIC) that manages and virtualizes all the installed and enabled system resources as a single large symmetric multiprocessor (SMP) system. This virtualization enables full sharing of the installed resources with high security and efficiency.
PR/SM supports configuring up to 85 LPARs, each of which includes logical processors, memory, and I/O resources. Resources of these LPARs are assigned from the installed CPC drawers and features. For more information about PR/SM functions, see 3.7, “Logical partitioning” on page 132.
LPAR configurations can be dynamically adjusted to optimize the virtual servers’ workloads. z15 servers provide improvements to the PR/SM HiperDispatch function. HiperDispatch provides alignment of logical processors to physical processors that ultimately improves cache utilization, minimizes inter-CPC drawer communication, and optimizes operating system work dispatching, which combined results in increased throughput. For more information, see “HiperDispatch” on page 96.
z15 PR/SM implements an Improved memory affinity algorithm and improved logical partition placement algorithms based on z14 experience. PR/SM reoptimization is the process of identifying “homes” for the partitions. PR/SM on z15 tries to assign all memory in one drawer (single SC SCM, shared L4 cache) and attempts to consolidate storage onto drawers with the most processor entitlement.
PR/SM also tries to assign all logical processors to one CPC drawer and packed into chips of that drawer, in cooperation with operating system use of HiperDispatch. In z15, all processor types can be dynamically reassigned, except IFPs.
Dynamic Partition Manager mode
DPM is an administrative mode (front end to PR/SM) that was introduced for Linux only systems for IBM z15, IBM z14, IBM z13®, IBM z13s®, and IBM LinuxONE servers. A system can be configured in DPM mode or in PR/SM mode (POR is required to switch modes). DPM supports the following functions:
•Create, provision, and manage partitions (processor, memory, and adapters)
•Monitor and troubleshoot the environment
HiperSockets
z15 servers support defining up to 32 IBM HiperSockets. HiperSockets provide for memory-to-memory communication across LPARs without the need for any I/O adapters and have virtual LAN (VLAN) capability.
LPAR modes on z15
The following PR/SM LPAR modes with corresponding operating systems and firmware appliances are supported:
•General:
 – z/OS
 – IBM z/VM®
 – IBM z/VSE®
 – z/TPF
 – Linux on IBM Z
•Coupling Facility: Coupling Facility Control Code (CFCC)
•Linux only:
 – Linux on IBM Z
 – z/VM
•z/VM
•Secure Service Container:
 – VNA (z/VSE Network Appliance)
 – IBM High Security Business Network (HSBN)6
The following LPAR modes are available for DPM:
•z/VM
•Linux on IBM Z (also used for KVM deployments)
•Secure Service Container
IBM Z servers also offer other virtual appliance-based solutions and support other the following hypervisors and containerization:
•IBM GDPS Virtual Appliance
•KVM for IBM Z
•Docker Enterprise Edition for Linux on IBM Systems7
Coupling Facility mode logical partition
Parallel Sysplex is a synergy between hardware and software, which is a highly advanced technology for clustering that is designed to enable the aggregate capacity of multiple z/OS systems to be applied against common workloads. To use this technology, a special LIC is used, which is called CFCC. To activate the CFCC, a special logical partition must be defined. Only PUs that are characterized as CPs or Internal Coupling Facilities (ICFs) can be used for Coupling Facility (CF) partitions. For a production CF workload, it is recommended to use dedicated ICFs.
The z/VM-mode LPAR
z14 servers support an LPAR mode, called z/VM-mode, that is exclusively for running z/VM as the first-level operating system. The z/VM-mode requires z/VM V6R4 or later, and allows z/VM to use a wider variety of specialty processors in a single LPAR, which increases flexibility and simplifying system management.
For example, in a z/VM-mode LPAR, z/VM can manage Linux on IBM Z guests that are running on IFL processors while also managing z/VSE and z/OS guests on CPs. It also allows z/OS to fully use zIIPs.
Secure Service Container
Secure Service Container (SSC) is an integrated IBM Z appliance and was designed to host most sensitive client workloads and applications, acting as a highly protected and secured digital vault, enforcing security by encrypting the whole stack: memory, network and data (in-flight and at-rest). An application that is running inside SSC (software appliance) is isolated and protected from outsider and insider threats.
SSC combines hardware, software, and middleware and is unique to IBM Z platform. Although it is called a Container, it should not be confused with purely software Open Source containers (such as Kubernetes or Docker).
SSC is a part of the Pervasive Encryption concept that was introduced with IBM z14, which is aimed at delivering best IBM Security hardware and software enhancements, services, and practices for 360-degree infrastructure protection.
LPAR is defined as SSC by using Hardware Management Console (HMC).
The SSC solution offers the following advantages:
•Existing applications require zero changes to use SSC; software developers do not need to write any SSC-specific programming code.
•End-to-end encryption of data in-flight and at-rest:
 – Automatic Network Encryption (TLS, IPSEC); data in-flight.
 – Automatic File System Encryption (LUKS); data at-rest.
 – Linux Unified Key Setup (LUKS) is the standard way in Linux to provide disk encryption. SSC encrypt all data with a key that is stored within the appliance
 – Protected memory: Up to 16 TB can be defined per SSC LPAR.
•Encrypted Diagnostic Data
All diagnostic information (debug dump data, and logs) are encrypted and do not contain any user or application data.
•No operating system access
After the SSC appliance is built, Secure Shell (SSH) and command line-interface (CLI) are disabled, which guarantees that even system administrators cannot access the contents of SSC and do not know what application is running there.
•Applications that run inside SSC are accessed externally by REST APIs only, in a transparent to user way.
•Tamper-proof SSC Secure Boot
SSC- eligible applications are booted into SSC by using verified booting sequence, where only trusted and digitally signed and verified by IBM software code is uploaded into the SSC.
•Vertical workload isolation, which is certified by EAL5+ Common Criteria Standard, which is the highest level that ensures workload separation and isolation.
•Horizontal workload isolation, which is a separation from the rest of the host environment.
SSC is a powerful IBM technology for providing the extra protection of the most sensitive workloads. The integration with other applications in transparent; all services can be called externally by standard REST APIs.
IBM z/VSE Network Appliance
The z/VSE Network Appliance builds on the z/VSE Linux Fast Path (LFP) function and provides Internet Protocol network access without requiring a TCP/IP stack in z/VSE. The appliance uses the SSC infrastructure that was introduced on z13 and z13s servers. Compared to a TCP/IP stack in z/VSE, this network appliance can support higher TCP/IP traffic throughput while reducing the processing resource consumption in z/VSE.
The z/VSE Network Appliance is an extension of the z/VSE - z/VM IP Assist (IBM VIA®) function. VIA provides network access for TCP/IP socket applications that run on z/VSE as a z/VM guest. With the new z/VSE Network Appliance, this function is available for z/VSE systems that are running in an LPAR. The z/VSE Network Appliance is provided as a downloadable package that can then be deployed with the SSC Installer and Loader.
The VIA function is available for z/VSE systems that run as z/VM guests. The z/VSE Network Appliance is available for z/VSE systems that run without z/VM in LPARs. Both functions provide network access for TCP/IP socket applications that use the LFP without the requirement of TCP/IP stack on the z/VSE system and installing Linux on IBM Z.
GDPS Virtual Appliance
The GDPS Virtual Appliance solution implements GDPS/PPRC Multiplatform Resilience for IBM Z (xDR). xDR coordinates near-continuous availability and a disaster recovery (DR) solution through the following features:
•Disk error detection
•Heartbeat for smoke tests
•Re-IPL in place
•Coordinated site takeover
•Coordinated IBM HyperSwap®
•Single point of control
1.2.4 I/O subsystem and I/O features
The z15 server supports PCIe I/O infrastructure. PCIe features are installed in PCIe+ I/O drawers. Up to 12 PCIe+ I/O drawers per z15 server are supported, which provides space for up to 192 PCIe I/O features. PCIe I/O drawers (32 slots, four I/O domains, available on z14 and z13) are not supported on z15 servers and cannot be carried forward during an upgrade from a z14 server.
For a five CPC drawer system, up to 60 PCIe+ fanout slots can be configured for data communications between the CPC drawers and the I/O infrastructure, and for coupling. The multiple channel subsystem (CSS) architecture allows up to six CSSs, each with 256 channels.
For I/O constraint relief, four subchannel sets are available per CSS, which allows access to many logical volumes. The fourth subchannel set allows extending the amount of addressable external storage for Parallel Access Volumes (PAVs), Peer-to-Peer Remote Copy (PPRC) secondary devices, and IBM FlashCopy® devices. z15 supports Initial Program Load (IPL) from subchannel set 1 (SS1), subchannel set 2 (SS2), or subchannel set 3 (SS3), and subchannel set 0 (SS0). For more information, see “Initial program load from an alternative subchannel set” on page 210.
The system I/O buses use the Peripheral Component Interconnect® Express (PCIe) technology, which also is used in coupling links.
z15 connectivity supports the following I/O or special purpose features:
 – Fibre Channel connection (IBM FICON):
 • FICON Express16SA 10 KM long wavelength (LX) and short wavelength (SX)
 • FICON Express16S+ 10 KM LX and SX (carry forward only)
 • FICON Express16S 10 KM LX and SX (carry forward only)
 • FICON Express8S 10 KM LX and SX (carry forward only)
 – IBM zHyperLink Express1.1 (new build)
 – IBM zHyperLink Express (carry forward)
 – Open Systems Adapter (OSA):
 • OSA-Express7S 25 GbE Short Reach1.1 (new build)
 • OSA-Express7S 10 GbE long reach (LR) and short reach (SR) (new build)
 • OSA-Express7S GbE LX and SX (new build)
 • OSA-Express7S 1000BASE-T Ethernet (new build)
 • OSA-Express7S 25GbE SR (carry forward)
 • OSA-Express6S 10 GbE LR and SR (carry forward)
 • OSA-Express6S GbE LX and SX (carry forward)
 • OSA-Express6S 1000BASE-T Ethernet (carry forward)
 • OSA-Express5S 10 GbE LR and SR (carry forward)
 • OSA-Express5S GbE LX and SX (carry forward)
 • OSA-Express5S 1000BASE-T Ethernet (carry forward)
 – IBM HiperSockets
 – Shared Memory Communication - Remote Direct Memory Access (SMC-R):
 • 25GbE RoCE (RDMA over Converged Ethernet) Express2.1 (new build)
 • 25GbE RoCE (RDMA over Converged Ethernet) Express2 (carry forward)
 • 10GbE RoCE Express2.1 (new build)
 • 10GbE RoCE Express2 (carry forward)
 • 10GbE RoCE Express (carry forward)
 – Shared Memory Communication - Direct Memory Access (SMC-D) through Internal Shared Memory (ISM)
 – Internal Coupling (IC) links
 – Integrated Coupling Adapter Short Reach1.1 (ICA SR1.1 - new build)
 – Integrated Coupling Adapter Short Reach (ICA SR - carry forward)
 – CE LR (new build and carry forward)
 – Crypto-Express7S (new build)
 – Crypto-Express6S (carry forward)
 – Crypto-Express5S (carry forward)
1.2.5 Reliability, availability, and serviceability design
System reliability, availability, and serviceability (RAS) is an area of continuous IBM focus and a defining IBM Z platform characteristic. The RAS objective is to reduce, or eliminate if possible, all sources of planned and unplanned outages while providing adequate service information if an issue occurs. Adequate service information is required to determine the cause of an issue without the need to reproduce the context of an event.
IBM Z servers are designed to enable highest availability and lowest downtime. These facts are recognized by various IT analysts, such as ITIC8 and IDC9. Comprehensive, multi-layered strategy includes the following features:
•Error Prevention
•Error Detection and Correction
•Error Recovery
•System Recovery Boost
With a properly configured z15 server, further reduction of outages can be attained through First Failure Data Capture (FFDC), which is designed to reduce service times and avoid subsequent errors. It also improves nondisruptive replace, repair, and upgrade functions for memory, drawers, and I/O adapters. z15 servers support the nondisruptive download and installation of LIC updates.
IBM z15™ RAS features provide unique high-availability and nondisruptive operational capabilities that differentiate the Z servers in the marketplace. z15 RAS enhancements are made on many components of the CPC (processor chip, memory subsystem, I/O, and service) in areas, such as error checking, error protection, failure handling, error checking, faster repair capabilities, sparing, and cooling.
The ability to cluster multiple systems in a Parallel Sysplex takes the commercial strengths of the z/OS platform to higher levels of system management, scalable growth, and continuous availability.
The z15 processor builds upon the RAS of the z14 family with the following RAS improvements:
•System Recovery Boost
System Recovery Boost was introduced with IBM z15. It offers customers more Central Processor (CP) capacity during system recovery operations to accelerate the system startup (IPL), shutdown or stand-alone dump operations. System Recovery Boost requires operating system support. No other IBM software charges are made during the boost period.
System Recovery Boost might be used during LPAR IPL or LPAR shutdown to make the running operating system and services available in a shorter period.
The System Recovery Boost provides the following options for the capacity increase:
 – Subcapacity CP speed boost: During the boost period, subcapacity engines are transparently activated at their full capacity (CP engines).
 – zIIP Capacity Boost: During the boost period, all active zIIPs that are assigned to an LPAR are used to extend the CP capacity (CP workload is dispatched to zIIP processors during the boost period).
At the time of this writing, the main System Recovery Boost users are z/OS (running in an LPAR), z/VM, and z/TPF.
z/VM uses the System Recovery Boost if it runs on subcapacity CP processors only (IFLs are always at their full clock speed). Second-level z/VM guest operating systems10 can inherit the boost if they are running on CPs.
•Level 3 and Level 4 cache enhancements use symbol ECC to extend the reach of prior z14 cache and memory improvements for improved availability. The level 3 and level 4 cache powerful symbol ECC is designed to make it resistant to more failure mechanisms. Preemptive DRAM marking is added to the main memory to isolate and recover failures more quickly.
•On-chip compression accelerating compression operations on core level, for all LPARs, which eliminates the virtualization layer that was needed for zEDC Express. The technology replaces zEDC Express PCIe cards, which improves reliability and availability.
1.3 z15 server technical overview
This section briefly reviews the following major elements of z15 servers:
•IBM Integrated Accelerator for zEnterprise Data Compression
1.3.1 Model and features
The IBM z15 server includes a machine type of 8561, and one model: T01. Five features are offered: Max34, Max71, Max108, Max145, and Max190. The feature name indicates the number of CPC drawers and available PUs, from one (Max43) to five (Max190).
Systems with up to four drawers have 41 active PUs per CPC drawer, while feature Max190 (five CPC drawers) has 43 active PUs per drawer. A PU is the generic term for the IBM z/Architecture processor unit (processor core) on the CP SCM.
On z15 servers, some PUs are part of the system base; that is, they are not part of the PUs that can be purchased by clients. They include the following characteristics:
•System assist processor (SAP) that is used by the channel subsystem. The number of predefined SAPs depends on the z15 model.
•One integrated firmware processor (IFP). The IFP is used in support of select features, such as and RoCE Express.
•Two spare PUs that can transparently assume any characterization during a permanent failure of another PU.
The PUs that clients can purchase can assume any of the following characteristics:
•CP for general-purpose use.
•Integrated Facility for Linux (IFL) for the use of Linux on Z.
•IBM Z Integrated Information Processor (zIIP) is designed to help free-up general computing capacity and lower overall total cost of computing for select data and transaction processing workloads.
 
zIIPs: At least one CP must be purchased with, or before, a zIIP can be purchased. Clients can purchase up to two zIIPs for each purchased CP (assigned or unassigned) on the system (2:1). However, during System Recovery Boost periods, the zIIP to CP ratio can be greater than 2:1.
•Internal Coupling Facility (ICF) is used by the CFCC.
•Extra (optional) SAPs are used by the channel subsystem.
A PU that is not characterized cannot be used, but is available as a spare. The following rules apply:
•In the five-feature structure, at least one CP, ICF, or IFL must be purchased and activated for any model.
•PUs can be purchased in single PU increments and are orderable by feature code.
•The total number of PUs purchased cannot exceed the total number that are available for that model.
•The number of installed zIIPs cannot exceed twice the number of installed CPs.
The multi-CPC drawer system design provides the capability to concurrently increase the capacity of the system in the following ways:
•Add capacity by concurrently activating more CPs, IFLs, ICFs, or zIIPs on a CPC drawer.
•Add a CPC drawer concurrently and activate more CPs, IFLs, ICFs, or zIIPs.
•Add a CPC drawer to provide more memory, or one or more adapters to support a larger number of I/O features.
1.3.2 Model upgrade paths
Within z15 Model T01, upgrades from Max34 to Max71 to max108 are concurrent. Any z14 or z13 model can be upgraded to any z15 feature disruptively. Upgrades from z15 Model T01 features Max34, Max71 and Max108 to features Max145 and Max190 are not allowed as these features are factory build only. Figure 1-1 on page 15 shows the supported upgrade paths.
 
Note: Consider the following points:
•An air-cooled z15 server cannot be converted to a water-cooled z15 server, and vice versa.
•The z15 server cannot be part of an Ensemble that is managed by the Unified Resource Manager (zManager).
Figure 1-1 z15 upgrades
z14 upgrade to z15
When a z14 is upgraded to a z15, the z14 driver level must be at least 36. Upgrading from z14 to z15 server is disruptive.
z13 upgrade to z15
When a z13 is upgraded to a z15, the z13 must be at least at Driver level 27. Upgrading from z13 to z15 servers is disruptive.
The following processes are not supported:
•Downgrades within the z15 models
•Upgrade from a z13s or z14 ZR1 to z15 servers
•Upgrades from zEC12 or earlier systems
1.3.3 Frames
The z15 Model T01 system is designed in a new format that provides configuration flexibility to fit customer requirements. The z15 is available in a 19-inch form factor and can be configured with one, two, three, or four frames, depending on processor and I/O requirements. The z15 also offers two power choices: Bulk Power Assembly and Intelligent Power Distribution Units. The frames are A, B, C, and Z, bolted together, and feature the following components:
•Up to three CPC drawers in Frame A
•Up to two CPC drawers in Frame B (CPC drawers in frame B are factory-installed only)
•Up to 12 PCIe+ I/O drawers that hold I/O features and special purpose features
•All CPC drawers and PCIe+ I/O drawers have redundant power supplies
•For BPA systems only: Bulk Power Assemblies in Frames A and B with Optional Internal Battery Feature (IBF)
•For PDU systems only: Power Distribution Units in Frames A, B, and C (configuration dependant)
•CPC Drawer cooling units for either air or water cooling in Frames A and B
•Two Ethernet switches in Frame A and two in Frame B (configuration dependent) to interconnect the CPC components through Ethernet
•Two 1U rack-mounted Support Elements (mounted in Frame A). The Support Elements have a new service console (stored in Frame A), which can be connected in the front or rear of a system.
1.3.4 CPC drawer
Up to three CPC drawers are installed in frame A and up to two in Frame B of a z15 server. Each CPC drawer houses the SCMs, memory, and I/O interconnects.
Single Chip Module technology
z15 servers are built on the superscalar microprocessor architecture of its predecessor and provide various enhancements over the z14. Each CPC drawer has four PU SCMs arranged in two logical CP clusters, and one SC SCM.
Two CPC drawer sizes are available in z15, depending on the number of active PU (cores). The z15 model T01 Max190 has 43 active cores (PUs) per CPC drawer. All other z15 models have 41 active cores. The PU SCM has 12 cores by design, with 9, 10, or 11 active cores, which can be characterized as CPs, IFLs, ICFs, zIIPs, SAPs, or IFPs.
The SCM provides a significant increase in system scalability and an extra opportunity for server consolidation. All CPC drawers are fully interconnected by using high-speed communication links through the L4 cache (in the SC SCM). This configuration allows the z15 server to be controlled by the PR/SM facility as a memory-coherent and cache-coherent SMP system.
The PU configuration includes two designated spare PUs per system and a variable number of SAPs. The SAPs scale with the number of CPC drawers that are installed in the server. For example, four standard SAPs are available with one CPC drawer that is installed, and up to 22 standard SAPs for five CPC drawers installed. In addition, one PU is used as an IFP and is not available for client use. The remaining PUs can be characterized as CPs, IFL processors, zIIPs, ICF processors, or extra SAPs. For z15, the SAPs operate in Simultaneous Multi-Threading (enabled by default, cannot be changed).
The PU SCMs are cooled by a cold plate that is connected to an internal water cooling loop. In an air-cooled system, the radiator units (RUs) exchange the heat from the internal water loop with air. The RU has redundant pumps and blowers. The SC SCM is air-cooled.
The z15 server offers also a water-cooling option for increased system and data center energy efficiency. Water-cooling option is only available with Bulk Power Assembly (BPA)-based systems. The water cooling units (WCUs) are fully redundant in an N+1 arrangement.
Processor features
The processor core operates at 5.2 GHz. Depending on the z15 feature, 41 - 215 active PUs are available on 1 - 5 CPC drawers.
Each core on the PU SCM includes an enhanced dedicated coprocessor for data compression and cryptographic functions, which are known as the Central Processor Assist for Cryptographic Functions (CPACF)11. Having standard clear key cryptographic coprocessors that are integrated with the processor provides high-speed cryptography for protecting data.
The z15 supports 64-bit addressing mode and uses Complex Instruction Set Computer (CISC), including highly capable and thus complex instructions. Most of the instructions are implemented at the hardware or firmware level for most optimal and effective execution.
Each PU is a superscalar processor, which can decode up to six complex instructions per clock cycle, running instructions out-of-order. The PU uses a high-frequency, low-latency pipeline that provides robust performance across a wide range of workloads.
 
z/Architecture addressing modes: The z/Architecture simultaneously supports 24-bit, 31-bit, and 64-bit addressing modes. This feature provides compatibility with earlier versions and with that compatibility, investment protection.
Compared to its predecessor, the z15 processor design includes the following improvements and architectural extensions:
•Better performance and throughput:
 – Fast processor units with enhanced microarchitecture
 – Larger L2, L3 caches
 – Up to 12 cores per processor chip
 – More capacity (up to 190 characterizable processor units versus 170 on the z14)
 – Larger cache (and shorter path to cache) means faster uniprocessor performance
 – Innovative core-cache design (L1 and L2 private to the processor core), processor chip-cache design (L3), and processor node design (L4), with focus on keeping more data closer to the processor, increasing the cache sizes, and decreasing the latency to access the next levels of cache.
This on-chip cache implementation optimizes system performance for high-frequency processors, with cache improvements, new Translation/TLB2 design, pipeline optimizations, better branch prediction, new accelerators, and architecture support.
•Reoptimized design for power and performance:
 – Improved instruction delivery
 – Improved branch prediction
 – Reduced execution latency
 – Optimized third-generation SMT
 – Enhanced out-of-order execution
 – New and enhanced vector instructions
•Dedicated co-processor for each processor unit (PU):
 – The Central Processor Assist for Cryptographic Function (CPACF) is well-suited for encrypting large amounts of data in real time because of its proximity to the processor unit.
CPACF supports DES, TDES, AES-128, AES-256, SHA-1, SHA-2, SHA-3, and True Random Number Generator. With the z15, CPACF supports Elliptic Curve Cryptography clear key, improving the performance of Elliptic Curve algorithms. The following algorithms are supported: EdDSA (Ed448, Ed25519), ECDSA (P-256, P-384, P-521), ECDH(P-256, P-384, P521, X25519, X448). Protected key signature creation is also supported.
 – IBM Integrated Accelerator for zEDC (On-chip Compression): The z15 is enhancing the compression by taking it from the I/O device level (zEDC Express feature) and moving it to the Nest Accelerator Unit on the processor chip, adding the Deflate compliant (lossless data compression algorithm), and GZIP (GNU zip - UNIX compression utility) compression and decompression support as hardware instructions.
The IBM Integrated Accelerator for zEnterprise Data Compression (zEDC) provides on-chip compression (DEFLATE/gzip/zlib) services for all LPARs, whereas the zEDC Express PCIe feature was assigned to 15 LPARs only.
This innovation results in improved compression performance and simplified management (no need to manage the zEDC Express PCIe features), on a processor chip level, without any delays associated with I/O requests, and with minimal CPU costs. The enhancement preserves the compatibility with an earlier version with the data that is compressed by zEDC Express features; data, which is compressed and written by zEDC Express features, is read and decompressed on the z15 and vice versa. This simplifies the migration to the z15 (on-chip compression removes the need to acquire zEDC Express PCIe features).
Transactional Execution Facility
The Transactional Execution Facility, which is known in the industry as hardware transactional memory, allows instructions to be issued automatically. Therefore, all results of the instructions in the group are committed or no results are committed, in a truly transactional manner. The execution is optimistic.
The instructions are issued, but previous state values are saved in transactional memory. If the transaction succeeds, the saved values are discarded. If it fails, they are used to restore the original values. Software can test the success of execution and redrive the code (if needed) by using the same or a different path.
The Transactional Execution Facility provides several instructions, including instructions to declare the start and end of a transaction and to cancel the transaction. This capability can provide performance benefits and scalability to workloads by helping to avoid most of the locks on data. This ability is especially important for heavily threaded applications, such as Java.
Guarded Storage Facility
Also known as less-pausing garbage collection, Guarded Storage Facility is a function that was introduced with the z14 to enable enterprise scale Java applications to run without periodic pause for garbage collection on larger heaps. This facility improves Java performance by reducing program pauses during Java Garbage Collection.
Simultaneous multithreading
Simultaneous multithreading (SMT) is built into the z15 IFLs, zIIPs, and SAPs, which allows more than one thread to simultaneously run in the same core and share all of its resources. This function improves the use of the cores and increases processing capacity.
When a program accesses a memory location that is not in the cache, it is called a cache miss. Because the processor must then wait for the data to be fetched before it can continue to run, cache misses affect the performance and capacity of the core to run instructions. By using SMT, when one thread in the core is waiting (such as for data to be fetched from the next cache levels or from main memory), the second thread in the core can use the shared resources rather than remain idle.
Adjusted with the growth in the core cache and TLB2, third-generation SMT on z15 improves thread balancing, supports multiple outstanding translations, optimizes hang avoidance mechanisms, and delivers improved virtualization performance to benefit Linux. z15 provides economies of scale with next generation multithreading (SMT) for Linux and zIIP-eligible workloads while adding support for the I/O System Assist Processor (SAP).
Hardware decimal floating point function
The hardware decimal floating point (HDFP) function is designed to speed up calculations and provide the precision that is demanded by financial institutions and others. The HDFP fully implements the IEEE 754r standard.
Vector Packed Decimal Facility
Vector Packed Decimal Facility allows packed decimal operations to be performed in registers rather than memory by using new fast mathematical computations. Compilers, such as Enterprise COBOL for z/OS, V6.2, Enterprise PL/I for z/OS, V5.2, z/OS V2.4 XL C/C++, the COBOL optimizer, Automatic Binary Optimizer for z/OS, V1.3, and Java, are optimized on z15.
Single instruction, multiple data
The z15 includes a set of instructions called single instruction, which is multiple data (SIMD) that can improve the performance of complex mathematical models and analytics workloads. This improvement is accomplished through vector processing and complex instructions that can process a large volume of data with a single instruction.
SIMD is designed for parallel computing and can accelerate code that contains integer, string, character, and floating point data types. This system enables better consolidation of analytics workloads and business transactions on the Z platform.
Runtime Instrumentation Facility
The Runtime Instrumentation Facility provides managed run times and just-in-time compilers with enhanced feedback about application behavior. This capability allows dynamic optimization of code generation as it is being run.
IBM Integrated Accelerator for zEnterprise Data Compression
With z15, a new on-chip compression accelerator (one per PU chip) was added to improve performance DEFLATE/gzip/zlib operations. The new accelerator replaces the zEDC Express feature and complements the functionality of the coprocessor (CPACF). Their functions are not interchangeable.
Processor RAS
In the unlikely case that a permanent core failure occurs, cores can be individually replaced by one of the available spares. Core sparing is transparent to the operating system and applications.
Concurrent processor unit conversions
The z15 supports concurrent conversion between various PU types, which provides the flexibility to meet the requirements of changing business environments. CPs, IFLs, zIIPs, ICFs, and optional SAPs can be converted to CPs, IFLs, zIIPs, ICFs, and optional SAPs.
Memory subsystem and topology
The z15 servers use double data rate fourth-generation (DDR4) dual inline memory module (DIMM) technology. For this purpose, IBM developed a chip that controls communication with the PU, which is an SC chip, and drives address and control from DIMM-to-DIMM. The DIMM is available in 32 GB, 64 GB, 128 GB, 256 GB, and 512 GB capacities.
Memory topology provides the following benefits:
•A RAIM for protection at the dynamic random access memory (DRAM), DIMM, and memory channel levels.
•A maximum of 40 TB of user configurable memory with a maximum of 50 TB of physical memory (with a maximum of 16 TB configurable to a single LPAR).
•One memory port for each PU SCM, and up to five independent memory ports per CPC drawer.
•Increased bandwidth between memory and I/O.
•Asymmetrical memory size and DRAM technology across CPC drawers.
•Large memory pages (1 MB and 2 GB).
•Key storage.
•Storage protection key array that is kept in physical memory.
•Storage protection (memory) key that is also kept in every L2 and L3 cache directory entry.
•A larger (256 GB) fixed-size HSA that eliminates planning for HSA.
PCIe fanout hot-plug
The PCIe fanout slots provides the path for data between memory and the PCIe features through the PCIe+ Generation 3 feature dual 16 GBps buses and cables. The PCIe+ fanout supports hot-pluggable features.
During an outage, a redundant I/O interconnect allows a PCIe+ Gen3 fanout feature to be concurrently repaired without loss of access to its associated I/O domains. Up to 12 PCIe+ fanout slots are available per CPC drawer. The PCIe fanout slots can also be used for the ICA SR. If redundancy in coupling link connectivity is ensured, the PCIe+ fanout features can be concurrently repaired.
1.3.5 I/O connectivity: PCIe+ Generation 3
The z15 server offers new and improved I/O features and uses PCIe+ Gen3 for I/O connectivity. This section briefly reviews the most relevant I/O capabilities.
The z15 uses PCIe+ Gen3 to implement the following features:
•PCIe+ Gen3 fanouts implements dual 16 GBps connections to the PCIe I/O features in the PCIe+ I/O drawers
•PCIe fanouts that provide dual 8 GBps coupling link connections through the Integrated Coupling Adapter Short Reach1.1 (ICA SR1.1).
1.3.6 I/O subsystem
The z15 PU SCM I/O implements PCIe Generation 4, which is used to connect the PCIe+ Gen3 dual port fanout features in the CPC drawers. The I/O infrastructure is designed to reduce processor usage and I/O latency, and provide increased throughput and availability.
z15 servers offer PCIe+ I/O drawers that host PCIe features. PCIe I/O drawers and I/O drawers that were used in previous IBM Z servers are not supported on z15.
PCIe+ I/O drawer
The PCIe+ I/O drawer, together with the PCIe features, offers finer granularity and capacity over previous I/O infrastructures. It can be concurrently added and removed in the field, which eases planning. Only PCIe cards (features) are supported, in any combination. Up to 12 PCIe+ I/O drawers can be installed on a z15 server.
Native PCIe and Integrated Firmware Processor
Native PCIe support was introduced in support of RoCE Express features, which are managed differently from the traditional PCIe I/O (FICON Express and OSA-Express) features. The device drivers for the native features are provided in the operating system. The diagnostic tests for the adapter layer functions of the native PCIe features are managed by LIC that is running as a resource group, which runs on the Integrated Firmware Processor (IFP).
With z15, the number of resource groups is four, which helps mitigate the effect of the disruptive Resource Group Microcode Change Level (MCL) installations. This firmware management approach contributes to the RAS of the server.
During the ordering process of the native PCIe features, features of the same type are evenly spread across the four resource groups (RG1, RG2, RG3, and RG4) for availability and serviceability reasons. Resource groups are automatically activated when these features are present in the CPC.
In addition to the 10GbE RoCE Express features, the following native PCIe I/O features are also managed by the resource groups:
•Coupling Express Long Reach (CE LR)
•zHyperLink Express1.1 and zHyperLink Express
•RoCE Express2.1, RoCE Express2, and RoCE Express features.
1.3.7 I/O and special purpose features in the PCIe I/O drawer
The z15 server (new build) supports the following PCIe features that are installed in the PCIe+ I/O drawers:
 – FICON Express16SA Short Wave (SX)
 – FICON Express16SA Long Wave (LX) 10 km (6.2 miles)
 – zHyperLink Express1.1
 – OSA-Express7S 25GbE Short Reach (SR) 1.1
 – OSA-Express7S 10GbE Long Reach (LR)
 – OSA-Express7S 10GbE Short Reach (SR)
 – OSA-Express7S GbE LX
 – OSA-Express7S GbE SX
 – OSA-Express7S 1000BASE-T
 – 25GbE RoCE Express2.1
 – 10GbE RoCE Express2.1
 – Crypto-Express7S 2 Port
 – Crypto-Express7S 1 Port
When carried forward on an upgrade, the z15 server also supports the following features in the PCIe+ I/O drawers:
 – FICON Express16S+ Short Wave (SX)
 – FICON Express16S+ Long Wave (LX) 10 km (6.2 miles)
 – zHyperLink Express
 – FICON Express 16S SX
 – FICON Express 16S LX
 – FICON Express 8S SX
 – FICON Express 8S LX
 – OSA-Express7S 25GbE Short Reach (SR)
 – OSA-Express6S 10GbE Long Reach (LR)
 – OSA-Express6S 10GbE Short Reach (SR)
 – OSA-Express6S GbE LX
 – OSA-Express6S GbE SX
 – OSA-Express6S 1000BASE-T
 – 25GbE RoCE Express2
 – 10GbE RoCE Express2
 – OSA-Express5S 10 GbE Long Reach (LR)
 – OSA-Express5S 10 GbE Short Reach (SR)
 – OSA-Express5S GbE LX
 – OSA-Express5S GbE SX
 – OSA-Express5S 1000BASE-T
 – 10GbE RoCE Express
 – Crypto-Express6S
 – Crypto-Express5S
Although they are used for coupling connectivity, the IBM Integrated Coupling Adapter (ICA SR) features are not listed here because they are attached directly to the CPC drawer.
1.3.8 Storage connectivity
z15 supports the IBM zHyperLink Express and FICON channels for storage connectivity.
 
Note: The IBM zHyperLink Express1.1 (FC 0451, new build for z15) and IBM zHyperLink Express (FC 0431, carry forward from z14) are functionally equivalent. Unless specified, these features are referred to as zHyperLink Express or zHyperLink.
IBM zHyperLink Express
zHyperLink Express is a short-distance mainframe attach link that is designed to increase the scalability of IBM Z transaction processing and lower I/O latency than High-Performance FICON (HPF) by for bringing data close to processing power.
zHyperLink Express feature directly connects the z15 central processor complex (CPC) to the I/O Bay of the DS8880 (R8.5 and newer). This short distance of up to 150 m (492 feet) direct connection is intended to reduce I/O latency and improve storage I/O throughput.
The improved performance of zHyperLink Express allows the z15 PU to make a synchronous request for the data that is in the DS8880 cache. This feature eliminates the undispatch of the running request, the queuing delays to resume the request, and the PU cache disruption.
The IBM zHyperLink Express is a two-port feature in the PCIe+ I/O drawer. Up to 16 features with up to 32 zHyperLink Express ports are supported in a z15 CPC. The zHyperLink Express feature uses PCIe Gen3 technology, with x16 lanes that are bifurcated into x8 lanes for storage connectivity. It is designed to support a link data rate of 8 GigaBytes per second (GBps)12.
The point-to-point link is established by 24x fiber optic cable with Multi-fiber Termination Push-on (MTP) connectors. For more information, see “zHyperLink Express1.1 (FC 0451)” on page 180.
FICON channels
Up to 160 features with up to 320 FICON Express16SA channels are supported on a new build z15. FICON Express 16SA supports 8 or 16 Gbps data link rate (NO 4 Gbps support). FICON Exptess16S+ and FICON Express 16S (both carry forward only) support link data rates of 4, 8, or 16 Gbps. FICON Express8S features (carry forward only) support link data rates of 2, 4, or 8 Gbps.
FICON Express16SA offers the same performance as FICON Express16S+ with its IBM I/O ASIC that supports up to 3x the I/O start rate of previous FICON/FCP solutions. As with the FICON Express16S+, both ports of a feature must be defined as the same CHPID type (no mix of FC and FCP CHPID for the same feature).
The FICON features on z15 support the following protocols:
•FICON (CHPID type FC) and High-Performance FICON for Z (zHPF). zHPF offers improved performance for data access, which is important to online transaction processing (OLTP) applications.
•FICON channel-to-channel (CHPID type CTC).
•Fibre Channel Protocol (CHPID type FCP).
FICON also offers the following capabilities:
•Modified Indirect Data Address Word (MIDAW) facility: Provides more capacity over native FICON channels for programs that process data sets that use striping and compression, such as Db2, VSAM, partitioned data set extended (PDSE), hierarchical file system (HFS), and z/OS file system (zFS). It does so by reducing channel, director, and control unit processor usage.
•Enhanced problem determination, analysis, and manageability of the storage area network (SAN) by providing registration information to the fabric name server for FICON and FCP.
•An Extended Link Service command, Read Diagnostic Parameters (RDP) is used to obtain extra diagnostic data from the Small Form Factor Pluggable optics that are throughout the SAN fabric to improve the accuracy of identifying a failing component.
1.3.9 Network connectivity
The IBM z15 supports the following technologies for network connectivity:
•Shared Memory Communications - Direct Memory Access over Internal Shared Memory (SMC-D)
Open Systems Adapter
z15 allows any mix of the supported OSA Ethernet features that are listed in 1.3.7, “I/O and special purpose features in the PCIe I/O drawer” on page 21. OSA-Express7S features are a technology refresh of the OSA-Express6S features. Up to 48 OSA-Express7S features, with a maximum of 96 ports, are supported. The maximum number of combined OSA-Express features cannot exceed 48.
OSA-Express features provide important benefits for TCP/IP traffic by reducing latency and improving throughput for standard and jumbo frames. Data router function that is present in all OSA-Express features enables performance enhancements.
With OSA-Express7S, OSA-Express6S, and OSA-Express5S, the functions that were performed in firmware are performed in the hardware. Extra logic in the IBM application-specific integrated circuit (ASIC) that is included with these features handle packet construction, inspection, and routing, which allows packets to flow between host memory and the LAN at line speed without firmware intervention.
On z15, an OSA feature that is configured as an integrated console controller CHPID type (OSC) supports the configuration and enablement of secure connections by using the Transport Layer Security (TLS) protocol versions 1.0, 1.1, and 1.2.
For more information about the OSA features, see 4.6, “Connectivity” on page 169.
HiperSockets
The HiperSockets function (also known as internal queued direct input/output or internal QDIO or iQDIO) is an integrated function of the z15 server that provides users with attachments to up to 32 high-speed virtual LANs with minimal system and network processor usage.
For communications between LPARs in the same z15 server, HiperSockets eliminate the need to use I/O subsystem features to traverse an external network. Connection to HiperSockets offers significant value in server consolidation by connecting many virtual servers.
HiperSockets can be customized to accommodate varying traffic sizes. Because the HiperSockets function does not use an external network, it can free system and network resources, which eliminates attachment costs while improving availability and performance.
HiperSockets can also be used for Dynamic cross-system coupling, which is a z/OS Communications Server feature that creates trusted, internal links to other stacks within a Parallel Sysplex.
Shared Memory Communication - Remote Direct Memory Access
zEC12 GA2 was the first IBM Z server generation to support Remote Direct Memory Access over Converged Ethernet (RoCE) technology. This technology is designed to provide fast, reduced CPU consumption and memory-to-memory communications between two IBM Z CPCs.
RoCE Express features reduce CPU consumption for applications that use the TCP/IP stack (sockets communication), such as IBM WebSphere Application Server that accesses a Db2 database. It is transparent to applications and also might help to reduce network latency with memory-to-memory transfers that use SMC-R in supported z/OS releases and Linux on Z.
IBM Z server generations continue to enhance the RoCE architecture. The 10GbE RoCE Express feature (carry forward only) supports sharing among 31 LPARs running z/OS or Linux on Z, while the RoCE Express2 and RoCE Express2.1 (10 GbE and 25 GbE) support 4x the number of LPARs and performance improvements. RoCE Express2 and RoCE Express2.1 support 63 Virtual Functions (VFs) per port for up to 126 VFs per PCHID (physical channel ID).
The 10GbE RoCE Express2, 10GbE RoCE Express2.1, and 10GbE RoCE Express features use SR optics and support the use of a multimode fiber optic cable that ends with an LC Duplex connector. Both support point-to-point and switched connections with an enterprise-class 10 GbE switch. A maximum of eight RoCE Express features can be installed in PCIe+ I/O drawers of z15.
The 25GbE RoCE Express2 and 25GbE RoCE Express2.1 also feature SR optics and supports the use of 50-micron multimode fiber optic that ends with an LC duplex connector. These features support point-to-point and switched connections with 25GbE capable switch (support only for 25 Gbps, no down negotiation to 10 Gbps).
Shared Memory Communications - Direct Memory Access
SMC-D enables low processor usage and low latency communications within a CPC that uses a Direct Memory Access connection over ISM. SMC-D implementation is similar to SMC-R over RoCE; SMC-D over ISM extends the benefits of SMC-R to operating system instances that are running on the same CPC without requiring physical resources (RoCE adapters, PCI bandwidth, ports, I/O slots, network resources, and 25/10 GbE switches).
Introduced with z13 GA2 and z13s, SMC-D enables high-bandwidth LPAR-to-LPAR TCP/IP traffic (sockets communication) by using the direct memory access software protocols over virtual Internal Shared Memory PCIe devices (vPCIe). SMC-D maintains the socket-API transparency aspect of SMC-R so that applications that use TCP/IP communications can benefit immediately without requiring any application software or IP topology changes.
z15 continues to support SMC-D with its lightweight design that improves throughput, latency, and CPU consumption and complements HiperSockets, OSA, or RoCE without sacrificing quality of service.
SMC-D requires an OSA or a HiperSockets connection to establish the initial TCP communications and can coexist with them. SMC-D uses a virtual PCIe adapter and is configured as a physical PCIe device. Up to 32 ISM adapters are available, each with a unique Physical Network ID per CPC.
 
Notes: SMC-R and SMC-D do not currently support multiple IP subnets.
1.3.10 Coupling and Server Time Protocol connectivity
IBM z15 support for Parallel Sysplex includes the Coupling Facility (running the CFCC13) and coupling links.
Coupling links support
Coupling connectivity in support of Parallel Sysplex environments is provided on the z15 server by the following features:
•Internal Coupling (IC) links that are operating at memory speed.
All physical coupling link types can be used to carry STP messages.
Integrated Coupling Adapter Short Reach1.1
The Integrated Coupling Adapter Short Reach1.1 (ICA SR1.1) feature was refreshed for z15. It is a two-port fanout that is used for short distance coupling connectivity. It uses PCIe Gen3 technology, with x16 lanes that are bifurcated into x8 lanes for coupling.
The ICA SR1.1 is designed to drive distances up to 150 m and support a link data rate of 8 GBps. The ICA SR1.1 fanout takes one PCIe fanout slot in the z15 CPC drawer. It is used for coupling connectivity between z15, z14, z13, and z13s CPCs, and cannot be connected to HCA3-O or HCA3-O LR coupling fanouts. The ICA SR1.1 is compatible with another ICA SR1.1 or ICA SR only.
Integrated Coupling Adapter Short Reach
The Integrated Coupling Adapter Short Reach (ICA SR) feature (introduced with IBM z13) is a two-port fanout that is used for short distance coupling connectivity and can be carried forward to z15. It uses PCIe Gen3 technology, with x16 lanes that are bifurcated into x8 lanes for coupling.
The ICA SR is designed to drive distances up to 150 m (492 feet) and support a link data rate of 8 GBps. The ICA SR fanout takes one PCIe I/O fanout slot in the z15 CPC drawer. It is used for coupling connectivity between z15, z14, z13, and z13s CPCs, and cannot be connected to HCA3-O or HCA3-O LR coupling fanouts. The ICA SR is compatible with another ICA SR or ICA SR 1.1 only.
Coupling Express Long Reach
Coupling Express Long Range (CE LR), which is a two-port feature is used for point-to-point long-distance coupling connectivity and defined as coupling channel type, CL5. The CE LR link is plugged in a PCIe+ I/O drawer slot, which uses industry standard I/O technology. It is used for long-distance coupling connectivity between z15, z14, z13, and z13s CPCs. It is not compatible with 1x InfiniBand (HCA3O-LR or HCA2O-LR) features.
The CE LR link allows for more granularity when scaling up or completing maintenance and uses Single Mode fiber (similar to InfiniBand 1x coupling links). The CE LR link provides point-to-point coupling connectivity at distances of 10 km (6.2 miles) unrepeated and 100 km (62.1 miles) with a qualified dense wavelength division multiplexing (DWDM) device.
CFCC Level 24
CFCC level 24 is delivered on the z15 with driver level 41. CFCC Level 24 introduces the following enhancements:
•CFCC Fair Latch Manager2
•Message Path SYID Resiliency Enhancement
•Shared-Engine CF Default is changed to “DYNDISP=THIN”
z15 servers with CFCC Level 24 require z/OS V2R1 or later, and z/VM V6R4 or later for virtual guest coupling. For more information, see “Coupling Facility Enhancements with CFCC level 24” on page 118.
Although the CF LPARs are running on different server generations, different levels of CFCC can coexist in the same sysplex, which enables upgrade from one CFCC level to the next. CF LPARs that are running on the same server share a single CFCC level.
A CF running on a z15 server (CFCC level 24) can coexist in a sysplex with CFCC levels 23, 22, 21 and 20. For more information about determining the CF LPAR size by using the CFSizer tool, see the System z Coupling Facility Structure Sizer Tool web page.
Server Time Protocol facility
Time synchronization for Parallel Sysplex Server Time Protocol (STP) is designed to ensure events that occur in different servers are properly sequenced in time. STP is designed for servers that are configured in a Parallel Sysplex or a basic sysplex (without a CF), and servers that are not in a sysplex but need time synchronization.
STP is a server-wide facility that is implemented in the LIC, which presents a single view of time to PR/SM. Any IBM Z CPC (including CPCs that are running as stand-alone CFs) can be enabled for STP by installing the STP feature.
STP uses a message-based protocol in which timekeeping information is passed over externally defined coupling links between servers. The STP design introduced a concept that is called Coordinated Timing Network (CTN), which is a collection of servers and CFs that are time-synchronized to a time value called Coordinated Server Time (CST).
Network Time Protocol (NTP) client support is available to the STP code on the z15, z14, z13, and z13s servers. By using this function, these servers can be configured to use an NTP server as an External Time Source (ETS). This implementation fulfills the need for a single time source across the heterogeneous platforms in the enterprise, including IBM Z servers and others systems that are running Linux, UNIX, and Microsoft Windows operating systems.
The time accuracy of an STP-only CTN can be improved by using an NTP server with the pulse per second (PPS) output signal as ETS. This type of ETS is available from various vendors that offer network timing solutions.
HMC can be configured as an NTP client or an NTP server. To ensure secure connectivity, HMC NTP broadband authentication can be enabled on z15, z14, and z13 servers.
 
Attention: A z15 server can coexist in the same (STP-only) CTN with z15, z14, and z13 servers. No older servers are supported in the same CTN with z15.
The z15 supports coupling and timing connectivity by using Integrated Coupling Adapter Short Reach (ICA SR) and Coupling Express Long Reach (CE LR). No InfiniBand connectivity is supported on the z15. For STP role playing servers, planning must consider only ICA SR and CE LR coupling or timing links.
1.3.11 Cryptography
A strong synergy exists between cryptography and security. Cryptography provides the primitives to support security functions. Similarly, security functions help to ensure authorized use of key material and cryptographic functions.
Cryptography on IBM Z is built on the platform with integrity. IBM Z platform offers hardware-based cryptography features that are used by the following environments and functions:
•Java
•Db2/IMS encryption tool
•Db2 built in encryption z/OS Communication Server
•IPsec/IKE/AT-TLS
•z/OS System SSL
•z/OS
•z/OS Encryption Facility
•Linux on Z
CP Assist for Cryptographic Functions
Supporting clear and protected key encryption, CP Assist for Cryptographic Function (CPACF) offers the full complement of the Advanced Encryption Standard (AES) algorithm and Secure Hash Algorithm (SHA) with the Data Encryption Standard (DES) algorithm. Support for CPACF is available through a group of instructions that are known as the Message-Security Assist (MSA).
z/OS Integrated Cryptographic Service Facility (ICSF) callable services and the z90crypt device driver that is running on Linux on Z also start CPACF functions. ICSF is a base element of z/OS. It uses the available cryptographic functions, CPACF, or PCIe cryptographic features to balance the workload and help address the bandwidth requirements of your applications.
With z15, a new Elliptic Curve Cryptography-supporting Modulo Arithmetic unit was implemented on each PU (core) along with a new message security assist extension 9 and Elliptic Curve Signature Authentication (ECSA) instruction. This provides hardware support for verification and signing using NIST P256, P384, P521 curves, Ed25519, Ed448-Goldilocks curves. The expected use cases include SSL libraries (authentication on the web) and Blockchain cryptography.
With z14 and carried on to z15, CPACF is enhanced to support pervasive encryption to provide faster encryption and decryption than previous servers. For every Processor Unit that is defined as a CP or an IFL, the following benefits are realized:
•Reduced overhead on short data (hashing and encryption)
•Up to 4x throughput for AES compared to z13
•Special instructions for elliptic curve cryptography (ECC)/RSA
•New hashing algorithms (for example, SHA-3)
•Support for authenticated encryption (combined encryption and hashing; for example, AES-GCM)
•True random number generator (for example, for session keys)
The z13 CPACF provides (supported by z15 and z14 also) the following features:
•For data privacy and confidentially: DES, Triple Data Encryption Standard (TDES), and AES for 128-bit, 192-bit, and 256-bit keys.
•For data integrity: Secure Hash Algorithm-1 (SHA-1) 160-bit, and SHA-2 for 224-, 256-, 384-, and 512-bit support. SHA-1 and SHA-2 are included as enabled on all z14s and do not require the no-charge enablement feature.
•For key generation: Pseudo Random Number Generation (PRNG), Random Number Generation Long (RNGL) (1 - 8192 bytes), and Random Number Generation Long (RNG) with up to 4096-bit key RSA support for message authentication.
CPACF must be explicitly enabled by using a no-charge enablement feature (FC 3863). This requirement excludes the SHAs, which are enabled by default with each server.
The enhancements to CPACF are exclusive to the IBM Z servers and are supported by z/OS, z/VM, z/VSE, z/TPF, and Linux on Z.
Crypto-Express7S
Crypto-Express7S represents the newest generation of cryptographic features. Cryptographic performance improvements with new Crypto-Express7S, which is available with two features, with one (FC 0899) or two (FC 0898) cryptographic co-processors that allow more data to be securely transferred across the internet. Crypto-Express7S is designed to complement the cryptographic capabilities of the CPACF. It is an optional feature of the z15 server generation.
The Crypto-Express7S feature is designed to provide granularity for increased flexibility with one or two PCIe adapters per feature. Although installed in the PCIe+ I/O drawer, Crypto-Express7S features do not perform I/O operations. That is, no data is moved between the CPC and any externally attached devices. For availability reasons, a minimum of two features is required.
z15 servers allow sharing of a cryptographic coprocessor across 85 domains (the maximum number of LPARs on the system for z15 is 85).
Crypto-Express7S provides higher density of the PCIe cryptographic features with enhanced PCIe Cryptographic Coprocessor (IBM 4769) and carries forward the functionality of the Crypto-Express6S, described in the following paragraph.
Crypto-Express6S
Crypto-Express6S (FC #0893) introduced with z14 server generation can be carried forward to z15. For availability reasons, a minimum of two features is required.
z15 servers allow sharing of a cryptographic coprocessor across 85 domains (the maximum number of LPARs on the system for z15 is 85).
The Crypto-Express6S is a state-of-the-art, tamper-sensing, and tamper-responding programmable cryptographic feature that provides a secure cryptographic environment. Each adapter contains a tamper-resistant hardware security module (HSM). The HSM can be configured as a Secure IBM CCA coprocessor, as a Secure IBM Enterprise PKCS #11 (EP11) coprocessor, or as an accelerator. Consider the following points:
•A Secure IBM CCA coprocessor is for secure key encrypted transactions that use CCA callable services (default).
•A Secure IBM Enterprise PKCS #11 (EP11) coprocessor implements an industry standardized set of services that adhere to the PKCS #11 specification v2.20 and more recent amendments. This new cryptographic coprocessor mode introduced the PKCS #11 secure key function.
•An accelerator for public key and private key cryptographic operations is used with Secure Sockets Layer/Transport Layer Security (SSL/TLS) acceleration.
The Crypto-Express6S is designed to meet the following cryptographic standards, among others:
•FIPS 140-2 Level 414
•Common Criteria EP11 EAL4
•ANSI 9.97
•Payment Card Industry (PCI) HSM
•German Banking Industry Commission (GBIC), (formerly DK, Deutsche Kreditwirtschaft)
Federal Information Processing Standard (FIPS) 140-2 certification is supported only when Crypto-Express6S is configured as a CCA or an EP11 coprocessor.
Crypto-Express6S supports several ciphers and standards that are described next. For more information about cryptographic algorithms and standards, see Chapter 6, “Cryptographic features” on page 217.
Trusted Key Entry workstation
The Trusted Key Entry (TKE) feature is an integrated solution that is composed of workstation firmware, hardware, and software to manage cryptographic keys in a secure environment. The TKE is network-connected or isolated, in which case smart cards are used.
The TKE workstation offers a security-rich solution for basic local and remote key management. It provides authorized personnel with a method for key identification, exchange, separation, update, and backup, and a secure hardware-based key loading mechanism for operational and master keys. TKE also provides secure management of host cryptographic module and host capabilities.
Support for an optional smart card reader that is attached to the TKE workstation allows the use of smart cards that contain an embedded microprocessor and associated memory for data storage. Access to and the use of confidential data on the smart cards are protected by a user-defined personal identification number (PIN).
TKE workstation and the most recent TKE 9.2 LIC are optional features on the z15. TKE workstation is offered in two types: TKE Tower (FC 0088) and TKE Rack Mount (FC 0087).
TKE 9.x15 requires the crypto-adapter FC 4769. You can use an older TKE version to collect data from previous generations of cryptographic modules and apply the data to Crypto-Express7S and Crypto-Express6S coprocessors.
TKE 9.x is required if you choose to use the TKE to manage a Crypto-Express7S. TKE 9.1 and later is also required to manage the new CCA mode PCI-HSM settings that are available on the Crypto-Express6S and Crypto-Express7S. A TKE is required to manage any Crypto-Express feature that is running in IBM Enterprise PKCS #11 (EP11) mode. If EP11 is to be defined, smart cards that are used require FIPS certification.
For more information about the cryptographic features, see Chapter 6, “Cryptographic features” on page 217.
For more information about the most current ICSF updates that are available, see the Web Deliverables download web page.
1.4 Reliability, availability, and serviceability
The z15 RAS strategy uses a building block approach, which is developed to meet the client’s stringent requirements for achieving continuous reliable operation. Those building blocks are error prevention, error detection, recovery, problem determination, service structure, change management, measurement, and analysis.
The initial focus is on preventing failures from occurring. This goal is accomplished by using Hi-Rel (highest reliability) components that use screening, sorting, burn-in, and run-in, and by taking advantage of technology integration.
For LIC and hardware design, failures are reduced through rigorous design rules; design walk-through; peer reviews; element, subsystem, and system simulation; and extensive engineering and manufacturing testing.
The RAS strategy is focused on a recovery design to mask errors and make them transparent to client operations. An extensive hardware recovery design is implemented to detect and correct memory array faults. When transparency cannot be achieved, you can restart the server with the maximum capacity possible.
System Recovery Boost (see also Appendix B, “System Recovery Boost” on page 491) is a new function that is implemented in the z15 firmware that brings a new dimension to the overall RAS approach. System Recovery Boost is designed to provide more CP capacity to LPARs running on a z15 CPC, capacity that is used for boosting (speeding up) operations during maintenance periods, such as system IPL, system shutdown, and stand-alone dumps.
1.5 Hardware Management Consoles and Support Elements
The HMCs and SEs are appliances that together provide platform management for IBM Z. The HMC is a workstation that is designed to provide a single point of control for managing local or remote hardware elements.
HMC is offered as a Tower (FC 0062) and a Rack Mount (FC 0063) feature. Rack Mount HMC can be placed in a customer-supplied 19-inch rack and occupies 1U rack space. z15 includes Driver level 41 and HMC application Version 2.15.0.
IBM z15 also introduces a new management feature, the IBM Hardware Management Appliance (FC 0100). With this feature, the need for a stand-alone HMC is eliminated, both Hardware Management Console appliance and Support Element Appliance running virtualized on the Support Element hardware servers integrated with the z15 CPC.
1.6 Operating systems
The IBM z15 server is supported by a large set of software products and programs, including independent software vendor (ISV) applications. (This section lists only the supported operating systems.) Use of various features might require the latest releases. For more information, see Chapter 7, “Operating system support” on page 255.
1.6.1 Supported operating systems
The following operating systems with required maintenance applied are supported for z15 servers:
•z/OS:
 – Version 2 Release 4
 – Version 2 Release 3
 – Version 2 Release 2
 – Version 2 Release 1 (compatibility support only, with extended support agreement)
•z/VM:
 – Version 7 Release 1
 – Version 6 Release 4
•z/VSE: Version 6 Release 2
•z/TPF Version 1 Release 1
•Linux on IBM Z distributions16:
 – SUSE SLES 15 SP1 with service, SUSE SLES 12 SP4 with service, and SUSE SLES 11 SP4 with service.
 – Red Hat RHEL 8.0 with service, Red Hat RHEL 7.7 with service, and Red Hat RHEL 6.10 with service.
 – Ubuntu 18.04.1 LTS with service and Ubuntu 16.04.5 LTS with service.
•KVM: Supported by Linux on IBM Z distributions
For more information about supported Linux on Z distribution levels, see the Tested platforms for Linux page of the IBM Z website.
For more information about features and functions that are supported on z14 by operating system, see Chapter 7, “Operating system support” on page 255.
z/VM support
z/VM 7.1 (available as of September 2018) increases the level of engagement with the z/VM user community. z/VM 7.1 includes the following new features:
•Single System Image and Live Guest Relocation included in the base (no extra charge).
•Enhances the dump process to reduce the time that is required to create and process dumps.
•Upgrades to a new Architecture Level Set (requires an IBM zEnterprise EC12 or BC12, or later).
•Provides the base for more functionality to be delivered as service after general availability.
•Enhances the dynamic configuration capabilities of a running z/VM system with Dynamic Memory Downgrade* support. For more information, see this web page.
•Includes SPE17s shipped for z/VM 6.4, including Virtual Switch Enhanced Load Balancing, DS8000 z-Thin Provisioning, and Encrypted Paging.
To support new functionality that was announced October 2018, z/VM requires fixes for the following APARs:
•PI99085
•VM66130
•VM65598
•VM66179
•VM66180
Support for z15 is provided in z/VM 7.1 and 6.4 with fixes for the following APARs:
•VM66248: z15 processor compatibility support (including Crypto-Express7S)
•PI99085: TCP/IP Stack support for OSA-Express7S
•VM66239: VMHCD support
•VM65598: VMHCM support
•PH00902: HLASM support
•VM66240: IOCP support.
For more information about the features and functions that are supported on z14 by operating system, see Chapter 7, “Operating system support” on page 255.
z/OS support
z/OS uses many of the following new functions and features of z14 (depending on version and release; PTFs might be required to support new functions):
•Up to 190 processors per LPAR or up to 128 physical processors per LPAR in SMT mode (SMT for zIIP)
•Up to 16 TB of real memory per LPAR (4 TB maximum for z/OS)
•Two-way simultaneous multithreading (SMT) optimization and support of SAPs (SAP SMT enabled by default) in addition to zIIP engines
•XL C/C++ ARCH(13) and TUNE(13) complier options
•Use of faster CPACF
•Pervasive Encryption:
 – Coupling Facility Encryption
 – Dataset and network encryption
•HiperDispatch Enhancements
•On-chip compression accelerator (transparent zEDC replacement)
•z15 Hardware Instrumentation Services (HIS)
•Entropy-Encoding Compression Enhancements
•Guarded Storage Facility (GSF)
•Instruction Execution Protection (IEP)
•IBM Virtual Flash Memory (VFM)
•Improved memory management in Real Storage Manager (RSM)
•CF use of VFM: CFCC Level 24
•Coupling Express Long Reach (CE LR) CHPID type CL5
•zHyperLink Express1.1
•FICON Express16SA; OSA Express7S
•RoCE-Express2.1 (25GbE and 10GbE)
•Cryptography:
 – Crypto-Express7S:
 • Next Generation Coprocessor support
 • Support for Coprocessor in PCI-HSM Compliance Mode
 • Designed for up to 85 domains
 – TKE 9.2 workstation
For more information about the features and functions that are supported on z15 by operating system, see Chapter 7, “Operating system support” on page 255.
1.6.2 IBM compilers
The following IBM compilers for Z servers can use z15 servers:
•Enterprise COBOL for z/OS
•Enterprise PL/I for z/OS
•Automatic Binary Optimizer
•z/OS XL C/C++
•XL C/C++ for Linux on Z
The compilers increase the return on your investment in IBM Z hardware by maximizing application performance by using the compilers’ advanced optimization technology for z/Architecture. Through their support of web services, XML, and Java, they allow for the modernization of assets in web-based applications. They also support the latest IBM middleware products (CICS, Db2, and IMS), which allows applications to use their latest capabilities.
To fully use the capabilities of z15 servers, you must compile it by using the minimum level of each compiler. To obtain the best performance, you must specify an architecture level of 13 by using the ARCH(13) option.
 
1 This data accounts for 80% of all data that is generated today and is expected to grow to over 93% by 2020.
2 Extract, Transform, Load (ETL) database operations that extract data from one or more databases, and transform and load it into another database for analyzing data in a different context.
3 FINFET is the industry solution; SOI is the IBM solution for SER.
4 Simultaneous multithreading is two threads per core.
5 Observed performance increases vary depending on the workload types.
6 IBM HSBN is a cloud service plan that is available on IBM Bluemix® for Blockchain.
7 For more information, see the Running Docker Containers on IBM Z topic of IBM Knowledge Center.
9 For more information, see Quantifying the Business Value of IBM Z.
10 z/OS configured as a guest system under z/VM does not use the boost.
11 Feature code (FC) 3863 must be ordered to enable CPACF. This feature code is available for no extra fee.
12 The link data rates do not represent the performance of the links. The actual performance is dependent upon many factors, including latency through the adapters, cable lengths, and the type of workload.
13 CFCC - Coupling Facility Control Code
14 Federal Information Processing Standard (FIPS) 140-2 Security Requirements for Cryptographic Modules
15 TKE 9.0 LIC, TKE 9.1 LIC, and TKE 9.2 LIC have the same hardware requirements. TKE 9.0 LIC and 9.1 LIC can be upgraded to TKE 9.2 LIC.
16 Customers should monitor for new distribution releases supported.
17 Small Program Enhancements, part of the continuous delivery model, see http://www.vm.ibm.com/newfunction/
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