Keywords[1] are predefined, nonescaped identifiers that define the language constructs. An escaped identifier is never treated as a keyword. All keywords are defined in lowercase.
The list is sorted in alphabetical order.
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The following is a list of keywords frequently used by Verilog simulators for names of system tasks and functions. Not all system tasks and functions are explained in this book. For details, refer to the IEEE Standard Verilog Hardware Description Language document. This list is sorted in alphabetical order.
$bitstoreal $countdrivers $display $fclose $fdisplay $fmonitor $fopen $fstrobe $fwrite $finish $getpattern $history $incsave $input $itor $key $list $log $monitor $monitoroff $monitoron $nokey
The following is a list of keywords frequently used by Verilog simulators for specifying compiler directives. Only the most frequently used directives are discussed in the book. For details, refer to the IEEE Standard Verilog Hardware Description Language document. This list is sorted in alphabetical order.
'accelerate 'autoexpand_vectornets 'celldefine 'default_nettype 'define 'define 'else 'elsif 'endcelldefine 'endif 'endprotect 'endprotected 'expand_vectornets 'ifdef 'ifndef 'include 'noaccelerate 'noexpand_vectornets 'noremove_gatenames 'nounconnected_drive 'protect 'protected 'remove_gatenames 'remove_netnames 'resetall 'timescale 'unconnected_drive