Cover image for Building a Programmable Logic Controller with a PIC16F648A Microcontroller

Building a Programmable Logic Controller with a PIC16F648A Microcontroller

Author Murat Uzam
Release Date: 2017/12/01
ISBN: 9781466589858
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Book Description

Programmable logic controllers (PLCs) are extensively used in industry to perform automation tasks, with manufacturers offering a variety of PLCs that differ in functions, program memories, and the number of inputs/outputs (I/O). Not surprisingly, the design and implementation of these PLCs have long been a secret of manufacturers. Unveiling the mysteries of PLC technology, Building a Programmable Logic Controller with PIC16F648A Microcontroller explains how to design and use a PIC16F648A-microcontroller-based PLC.

The author first described a microcontroller-based implementation of a PLC in a series of articles published in Electronics World magazine between 2008 and 2010. This book is based on an improved version of the project, including:

  • Updates to the hardware configuration, with a smaller CPU board and two I/O extension boards that now support 16 inputs and 16 outputs instead of 8
  • An increased clock frequency of 20 MHz
  • Improvements to several macros
  • Flowcharts to help you understand the macros (functions)

In this book, the author provides detailed explanations of hardware and software structures. He also describes PIC Assembly macros for all basic PLC functions, which are illustrated with numerous examples and flowcharts. An accompanying CD contains source files (.ASM) and object files (.HEX) for all of the examples in the book. It also supplies printed circuit board (PCB) (Gerber and .pdf) files so that you can have the CPU board and I/O extension boards produced by a PCB manufacturer or produce your own boards.

Making PLCs more easily accessible, this unique book is written for advanced students, practicing engineers, and hobbyists who want to learn how to build their own microcontroller-based PLC. It assumes some previous knowledge of digital logic design, microcontrollers, and PLCs, as well as familiarity with the PIC16F series of microcontrollers and writing programs using PIC Assembly language within an MPLAB integrated development environment.

Table of Contents

  1. Cover Page
  2. Half title
  3. title
  4. copy
  5. dedication
  6. preface
  7. ack
  8. fmchapter
  9. fmchapter
  10. Preface
  11. 1 Hardware of the PIC16F648A-Based PLC
  12. 2 Basic Software
    1. 2.1 Basic Software Structure
      1. 2.1.1 Variable Definitions
      2. 2.1.2 Macro HC165
      3. 2.1.3 Macro HC595
    2. 2.2 Elimination of Contact Bouncing Problem in the PIC16F648A-Based PLC
      1. 2.2.1 Contact Bouncing Problem
      2. 2.2.2 Understanding a Generic Single I/O Contact Debouncer
      3. 2.2.3 Debouncer Macros dbncrO and dbncrl
    3. 2.3 Basic Macros of the PIC16F648A-Based PLC
      1. 2.3.1 Macro initialize
      2. 2.3.2 Macro get_inputs
      3. 2.3.3 Macro send_outputs
    4. 2.4 Example Program
  13. 3 Contact and Relay-Based Macros
    1. 3.1 Macro Id (load)
    2. 3.2 Macro ld_not (load not)
    3. 3.3 Macro not
    4. 3.4 Macro or
    5. 3.5 Macro or_not
    6. 3.6 Macro nor
    7. 3.7 Macro and
    8. 3.8 Macro and_not
    9. 3.9 Macro nand
    10. 3.10 Macro xor
    11. 3.11 Macro xor_not
    12. 3.12 Macro xnor
    13. 3.13 Macro out
    14. 3.14 Macro out_not
    15. 3.15 Macro in_out
    16. 3.16 Macro inv_out
    17. 3.17 Macro _set
    18. 3.18 Macro _reset
    19. 3.19 Examples for Contact and Relay-Based Macros
  14. 4 Flip-Flop Macros
    1. 4.1 Macro r_edge (Rising Edge Detector)
    2. 4.2 Macro f_edge (Falling Edge Detector)
    3. 4.3 Macro latchl (D Latch with Active High Enable)
    4. 4.4 The Macro latchO (D Latch with Active Low Enable)
    5. 4.5 Macro dff_r (Rising Edge Triggered D Flip-Flop)
    6. 4.6 Macro dff_f (Falling Edge Triggered D Flip-Flop)
    7. 4.7 Macro tff_r (Rising Edge Triggered T Flip-Flop)
    8. 4.8 Macro tff_f (Falling Edge Triggered T Flip-Flop)
    9. 4.9 Macro jkff_r (Rising Edge Triggered JK Flip-Flop)
    10. 4.10 Macro jkff_f (Falling Edge Triggered JK Flip-Flop)
    11. 4.11 Examples for Flip-Flop Macros
  15. 5 Timer Macros
    1. 5.1 On-Delay Timer (TON)
    2. 5.2 Macro Ton_8 (8-Bit On-Delay Timer)
    3. 5.3 Off-Delay Timer (TOF)
    4. 5.4 Macro Tof_8 (8-Bit Off-Delay Timer)
    5. 5.5 Pulse Timer (TP)
    6. 5.6 Macro TP 8 (8-Bit Pulse Timer)
    7. 5.7 Oscillator Timer (TOS)
    8. 5.8 Macro TOS_8 (8-Bit Oscillator Timer)
    9. 5.9 Example for Timer Macros
  16. 6 Counter Macros
    1. 6.1 Move and Load Macros
    2. 6.2 Counter Macros
    3. 6.3 Up Counter (CTU)
    4. 6.4 Macro CTU_8 (8-Bit Up Counter)
    5. 6.5 Down Counter (CTD)
    6. 6.6 Macro CTD_8 (8-Bit Down Counter)
    7. 6.7 Up/Down Counter (CTUD)
    8. 6.8 Macro CTUD_8 (8-Bit Up/Down Counter)
    9. 6.9 Examples for Counter Macros
  17. 7 Comparison Macros
    1. 7.1 Macro R1_GT_R2
    2. 7.2 Macro R1_GE_R2
    3. 7.3 Macro R1_EQ_R2
    4. 7.4 Macro R1_LT_R2
    5. 7.5 Macro R1_LE_R2
    6. 7.6 Macro R1_NE_R2
    7. 7.7 Macro R_GT_K
    8. 7.8 Macro R_GE_K
    9. 7.9 Macro R_EQ_K
    10. 7.10 Macro R_LT_K
    11. 7.11 Macro R_LE_K
    12. 7.12 Macro R_NE_K
    13. 7.13 Examples for Comparison Macros
  18. 8 Arithmetical Macros
    1. 8.1 Macro R1addR2
    2. 8.2 Macro RaddK
    3. 8.3 Macro R1subR2
    4. 8.4 Macro RsubK
    5. 8.5 Macro incR
    6. 8.6 Macro decR
    7. 8.7 Examples for Arithmetical Macros
  19. 9 Logical Macros
    1. 9.1 Macro R1andR2
    2. 9.2 Macro RandK
    3. 9.3 Macro R1nandR2
    4. 9.4 Macro RnandK
    5. 9.5 Macro R1orR2
    6. 9.6 Macro RorK
    7. 9.7 Macro R1norR2
    8. 9.8 Macro RnorK
    9. 9.9 Macro R1xorR2
    10. 9.10 Macro RxorK
    11. 9.11 Macro R1xnorR2
    12. 9.12 Macro RxnorK
    13. 9.13 Macro inv_R
    14. 9.14 Example for Logical Macros
  20. 10 Shift and Rotate Macros
    1. 10.1 Macro shift_R
    2. 10.2 Macro shift_L
    3. 10.3 Macro rotate_R
    4. 10.4 Macro rotate_L
    5. 10.5 Macro Swap
    6. 10.6 Examples for Shift and Rotate Macros
  21. 11 Multiplexer Macros
    1. 11.1 Macro mux_2_1
    2. 11.2 Macro mux_2_1_E
    3. 11.3 Macro mux_4_1
    4. 11.4 Macro mux_4_l_E
    5. 11.5 Macro mux_8_1
    6. 11.6 Macro mux_8_l_E
    7. 11.7 Examples for Multiplexer Macros
  22. 12 Demultiplexer Macros
    1. 12.1 Macro Dmux_1_2
    2. 12.2 Macro Dmux_1_2_E
    3. 12.3 Macro Dmux_1_4
    4. 12.4 Macro Dmux_1_4_E
    5. 12.5 Macro Dmux_l_8
    6. 12.6 Macro Dmux_1_8_E
    7. 12.7 Examples for Demultiplexer Macros
  23. 13 Decoder Macros
    1. 13.1 Macro decod_1_2
    2. 13.2 Macro decod_1_2_AL
    3. 13.3 Macro decod_1_2_E
    4. 13.4 Macro decod_1_2_E_AL
    5. 13.5 Macro decod_2_4
    6. 13.6 Macro decod_2_4_AL
    7. 13.7 Macro decod_2_4_E
    8. 13.8 Macro decod_2_4_E_AL
    9. 13.9 Macro decod_3_8
    10. 13.10 Macro decod_3_8_AL
    11. 13.11 Macro decod_3_8_E
    12. 13.12 Macro decod_3_8_E_AL
    13. 13.13 Examples for Decoder Macros
  24. 14 Priority Encoder Macros
    1. 14.1 Macro encod_4_2_p
    2. 14.2 Macro encod_4_2_p_E
    3. 14.3 Macro encod_8_3_p
    4. 14.4 Macro encod_8_3_p_E
    5. 14.5 Macro encod_dec_bcd_p
    6. 14.6 Macro encod_dec_bcd_p_E
    7. 14.7 Examples for Priority Encoder Macros
  25. 15 Application Example
    1. 15.1 Remotely Controlled Model Gate System
    2. 15.2 Control Scenarios for the Model Gate System
    3. 15.3 Solutions for the Control Scenarios
      1. 15.3.1 Solution for the First Scenario
      2. 15.3.2 Solution for the Second Scenario
      3. 15.3.3 Solution for the Third Scenario
      4. 15.3.4 Solution for the Fourth Scenario
      5. 15.3.5 Solution for the Fifth Scenario
      6. 15.3.6 Solution for the Sixth Scenario
      7. 15.3.7 Solution for the Seventh Scenario
      8. 15.3.8 Solution for the Eighth Scenario
  26. About the CD-ROM
  27. References
  28. Index
52.15.59.163