Chapter 7

Transistor Amplifier Circuits

7.1 INTRODUCTION

The analysis of a transistor amplifier is considered in this chapter. Since the transistor is not a linear device, general analytical analysis is not possible. The analysis carried out is based on various practical assumptions. The graphical analysis is the way out when the input signal is large, that is, for large inputs, the nonlinearity of the device cannot be eliminated and so, the output of the amplifier can only be estimated by graphical method by the use of input and output characteristics of the transistor. Generalised analytical analysis is not possible in this case. However, the device can be assumed to be linear when the input signal is small. So, for the input signals, which are small, the device can be modelled as a two-port network and analytical equations can be developed for the estimation of various parameters of the amplifiers. Once again, the problem can be further simplified when the frequency of the input signal is considered. For low-frequency signals, the interelectrode capacitances and other sort of couplings can be neglected since the impedance offered by such parameters would be very large in shunt with regular two-port parameters. So, the analysis of low-frequency small signal model of a transistor amplifier can be done analytically. The model has to be recast taking into account the interelectrode capacitances and other such parameters, which leads to high-frequency small signal model of a transistor amplifier.

The analysis of a transistor amplifier thus depends on various constraints. Whatever may be the case, it is advisable to choose the operating point in the mid-region of the active region for a reasonably good amplification by the transistor. In many cases, the amplification offered by a single stage transistor amplifier circuit is not sufficient for a given application. In such cases, two or more transistor amplifier circuits are to be cascaded. The analysis of such amplifier chain can be accomplished with the above procedures or, in practice, when some tolerance of the deviations of the parameters can be allowed, simplified model of the transistors can be taken up. With all such practically possible assumptions, the analysis of transistor amplifier circuits is presented in this chapter.

7.2 LARGE SIGNAL ANALYSIS OF TRANSISTOR AMPLIFIER

When the input signal to a common emitter amplifier is large, analytical analysis of the amplifier cannot be performed. This is because the device is not linear or, in other words, the shift in the output characteristics of a CE amplifier is not equal for equal increments of the input base current. This introduces a sort of distortion in the output of the circuit, even though the input is assumed to be a perfect sinusoid. Due to this nonlinearity, modelling of a transistor using two-port network for large signals is not possible. Two-port network analysis is applicable only for linear, bilateral and finite networks. So, the analysis of such amplifiers with large signals at the input is to be performed graphically.

For the amplifier whose analysis is to be performed, the output and input characteristics of the transistor amplifier in CE configuration are plotted and based on the effective load resistance the load line is drawn on the output characteristics and the operating point is selected appropriately. The input ac signal is imposed at the base of the transistor, as shown in Fig. 7.1. So the input ac signal, which has a zero average value, is now applied to the base of the transistor, which is already biased at the dc base current, the operating point. Now, the input base current varies sinusoidally with an average value of biasing base current. The output collector current can then be estimated by superimposing the input sinusoid variations on the operating point that is located in the active region of the output characteristics of the transistors shown in Fig. 7.2(a). With the help of this analysis, the output current can be estimated and plotted to scale and the output voltage of the amplifier can also be plotted since the output current flows through a linear resistor.

In the above analysis, the input current is assumed to be perfect sinusoid. But this condition is not satisfied since the input to the amplifier is voltage but not current and also that the relation between input current and voltage is not linear. If one assumes a perfect sinusoidal voltage to be applied at the input of the amplifier, the current variations can be estimated with the help of input characteristics as shown in Fig. (7.2b). These current variations are then transferred to the output characteristics to estimate the exact collector current variations.

In the above discussion, the output wave form has encountered two types of distortions, namely, input nonlinear distortion and output nonlinear distortion. The input nonlinear distortion is due to the nonlinearity of the voltage current relationship in the input of the circuit. The input voltage is applied between the forward biased base-emitter junctions. Since the V-I characteristics of the forward biased junction are not linear but exponential, even though one assumes the input voltage to be perfect sinusoid, the input current is not a linear replica of the input voltage. This causes the current at the input to be a distorted version of the sinusoidal signal and so this type of distortion is known as input nonlinear distortion. This distortion can be estimated and plotted as shown in Fig. 7.3(a).

The output nonlinear distortion in a CE amplifier is due to the fact that the shift in the output characteristics is not in proportion to that of input base current increments. The increase in the collector current is large for small variations in the base current when the base current is a small value, but the rate of increase in the collector current decreases as the base current increases. In other words, the amplification offered by the amplifier at low base currents is large when compared to the amplification when the base current is high. That is, the small signal current gain of a CE amplifier is not a constant value but depends upon the input base current, selection of the operating point. When the variation of the input base current is large enough around the operating point such that the collector current variation above the operating point is not the same as that below the operating point, even though the base current variation above and below the operating point is same, a distortion is introduced into the circuit at the output of the device as shown in Fig. 7.3(b). This distortion is termed as output nonlinear distortion.

In the above graphical analysis, various types of currents and voltages were encountered. So as to avoid confusion, a standard notation for identifying the instantaneous variation, quiescent values, instantaneous total value, effective value of the varying component and supply is to be followed and is tabulated in Table. 7.1

 

7.3 TWO-PORT MODEL OF A TRANSISTOR

The transistor amplifier can be modelled as a linear bilateral network and two-port network analysis can be applied to this device when the transistor is a linear device. The transistor can be assumed to be operating in a linear portion when the input signal is very small such that the nonlinearity that is present in this small range of current variation can be neglected. One more assumption made in this type of analysis is that the frequency of the input signal is low. When a low-frequency signal is considered, the interelectrode capacitances and such coupling parameters tend towards a very large value and thus the impedance offered by them can be assumed to be infinity. So, these parameters can be neglected when low-frequency signals are assumed to be applied to the input of the transistor amplifier. Thus, the two-port network analysis can be applied to a transistor amplifier circuit when low-frequency small signals are assumed to be applied at the input of the transistor amplifier circuit.

Technical analysis of any circuit can be performed easily and analytically when the circuit is modelled. The reason for construction of models is that the physical systems are usually too complex and practical analysis is very complex. The complexity of analysis of transistor amplifier is that the transistor is a nonlinear device and establishing an analytical relation between output and input parameters is too difficult without modelling. Modelling of the transistor is nothing but a simple passive network representation of the basic component. When an equivalent circuit consisting of passive components and dependent or independent sources of either voltage or current can replace the basic component, the analysis of this circuit is nothing but simply applying the known network theorems to the equivalent circuits to derive a definite analytical relation between the output and input parameters.

The analysis of the two-port network can be performed by modelling the network into various bilateral linear components. There are various methods of this two-port network analysis where the input and the output currents and voltages can be related by analytical expressions. The parameters are expressed in terms of a 2–2 matrix whose elements are either impedances or admittances or ABCD or hybrid parameters and so on. Many such matrix elements can be adopted as per the convenience of the application of the concerned circuit. In this amplifier circuit analysis the parameters of importance are voltage gain, current gain and input and output impedances. The most suitable matrix of a two-port network to describe the transistor amplifier circuit is the hybrid parameter model or, in short, h-parameter model. This model is also referred to as low-frequency small signal model of a transistor amplifier circuit. So, in this analysis of transistor amplifier circuit, h-parameter model is adopted.

7.4 SMALL SIGNAL LOW-FREQUENCY MODEL OF A TRANSISTOR

As discussed in the above section, hybrid parameter model is the best model of two-port network, which can be adapted to a transistor amplifier circuit. The general equation relating the input and output parameters with reference to Fig. 7.4 can be written as

 

        v₁ = h₁₁i₁ + h₁₂v₂

        i₂ = h₂₁ i₁ + h₂₂v₂             …(7.1)

The parameters h₁₁, h₁₂, h₂₁ and h₂₂ are called hybrid or h-parameters. The parameters can be defined as follows:

input resistance (at port 1) when output is short circuited (v₂ = 0).

= reverse voltage gain with open input,

= forward current gain with output short circuited,

= output conductance (at port 2) when input open circuited (i₁ = 0)                     …(7.2)

The above notation for the hybrid two-port network is the general notation that is adopted universally. When this model is adopted for transistor circuits, a third suffix is to be added so as to identify the parameter for a given configuration of the transistor. This leads to great confusion and the following standard notation for transistor circuits is accepted internationally. The first two suffixes are replaced with an alphabet i, r, f and o in place of 11, 12, 21 and 22, respectively. The second suffix is added as an alphabet once again (e, b and c identifying the configurations to be common emitter, common base and common collector configurations, respectively). This notation simplifies the analysis to a great extent. Thus,

        h_i = h₁₁ = input impedance,

        h_r = h₁₂ = reverse voltage gain,

        h_f = h₂₁ = forward current gain,

        h_o = h₂₂ = output admittance.

For example, for common emitter configuration the following h-parameter model is accepted. For the common emitter configuration, the input voltage is v_be, input current is i_b, output voltage is v_ce and output current is i_c. Therefore, the governing equations can be written as

        v_be = h_iei_b + h_rev_ce

        i_c = h_fei_b + h_oev_ce             …(7.3)

where,

	= input impedance,
	= reverse voltage gain,
	= forward current gain,
	= output admittance.    …(7.4)

Similarly, the equations and the h-parameters for common base and common collector configurations can be drafted accordingly.

With the help of Eq. (7.3), the equivalent circuit of a transistor can be drawn. Considering the first equation of the two, this equation is a voltage equation, which satisfies KVL around a loop. So, the input of a transistor is a loop of a input resistor h_ie and a dependent voltage source, h_rev_ce in series. Considering the second equation, which is a current equation, it will satisfy the KCL at the output node. So, the output circuit is a parallel combination of an admittance h_oe in shunt with a dependent current source h_fei_b. So, the h-parameter model for a transistor in common emitter configuration is as shown in Fig. 7.5.

Similarly, the governing equations and the equivalent h-parameter model can be drawn for common base and common collector. The input terminal for a common base configuration is between emitter and base terminals and the output port is between collector and base of the transistor as shown in Fig. 7.6. The four h -parameters for the common base transistor configuration are defined as

 

	veb = hibie + hrbvcb
	ic = hfbie + hobvcb	…(7.5)

where

	= reverse voltage gain,
	= forward current gain,
	= output admittance.    …(7.6)

The input terminal for a common collector configuration is between base and collector terminals and the output port is between emitter and collector of the transistor, as shown in Fig. 7.7. The four h-parameters for the common collector transistor configuration are defined as

        v_bc = h_ici_b + h_rcv_ec

          i_e = h_fci_b + h_ocv_ec             …(7.7)

where,

	= input impedance,
	= reverse voltage gain,
	= forward current gain,
	= output admittance.    …(7.8)

For each configuration, from KCL, one can note that

 

The circuit models and equations are valid for either an npn or a pnp transistor and are independent of the type of load or method of biasing.

7.5 ANALYSIS OF A TRANSISTOR AMPLIFIER CIRCUIT

In order to use the transistor as an amplifier, it is sufficient to provide signal source at the input of the transistor terminals and to drive the appropriate load at the output terminals of the transistor. The basic block diagram of such an amplifier is as shown in Fig. 7.8. Proper biasing of the transistor and selection of operating point are assumed and the transistor is available as a device that can amplify the input sinusoidal signals of low frequency and small signal amplitude. For all the ac analysis of transistor amplifiers, the dc biasing voltages and currents need not be considered and one can assume that the device is properly biased in the active region. So, any dc voltage source or current source can be assumed to be zero in such an analysis.

Considering Fig. 7.8, the R_s is the source resistance and Z_L is the load impedance. For analysing this amplifier, one has to replace the active device by its equivalent circuit and for transistor the small signal h-parameter model is used and the equivalent circuit is drawn as shown in Fig. 7.9. For convenience, the second suffix to the h-parameters is not shown and so the derivation is for any general configuration of the transistor and suitable suffix can be added depending on the configuration of the transistor involved. It is assumed that the parameters are constant over the range of operation. For an amplifier, the parameters that are of interest are voltage gain, current gain, input impedance and output impedance. These parameters can be evaluated by simply applying known networks theorems to this equivalent circuit.

The current gain or current amplification: The current amplification A_I for a transistor amplifier stage can be defined as the ratio of output current to input current. Or,

From the circuit, applying KCL to the output node,

 

and,             V₂ = − I₂Z_L             …(7.12)

Therefore,

The negative sign in the above equation indicates that there is a phase shift of 180° between the input and output of the transistor amplifier.

The input impedance: The impedance seen between the two terminals 1 and 1′ is the amplifier input impedance Z_i and can be given as

Applying KVL to the input loop,

 

and,         V₂ = − I₂Z_L = A₁I₁Z_L             …(7.16)

Dividing Eq. (7.15) by I₁ and substituting Eq. (7.16),

 

It can be observed that the input impedance is a function of load impedance.

The voltage gain or voltage amplification: The voltage gain or voltage amplification A_V is the ratio of output voltage to input voltage and can be given as

From Eqs. (7.16) and (7.14),

The voltage amplification taking source impedance into consideration: The voltage amplification taking source impedance into consideration, A_Vs, can be defined as the ratio of output voltage to the source voltage, that is,

From the equivalent circuit of the input of the amplifier, as shown in Fig. 7.10(a),

Then,

If R_s = 0, then A_Vs = A_V. Hence, A_V is the voltage gain for an ideal voltage source. In practice, the quantity A_Vs is more meaningful than Av since the source resistance has an appreciable effect on the overall voltage amplification.

The current amplification taking source impedance into consideration: The current amplification taking source impedance into consideration, A_is, can be defined as the ratio of the output current to the source current and can be given as

From Fig. 7.10(b),

Therefore,

If R_s = ∞, then A_Is = A_I. Hence A_I is the current gain for an ideal current source.

The output impedance: The output impedance Z_o can be defined as the ratio of voltage to current when a voltage source V₂ drives the output circuit with the load set to infinity (Z_L = ∞) and the source voltage set to zero (V_s = 0). If I₂ is the current drawn by the output circuit, then

Or, in our discussion, it is convenient to work with γ_o = 1/Z_o. From Eq. (7.11),

 

with V_s = 0, from the input loop,

 

or,         (I₁/V₂) = − h_r/(h_i + R_s)             …(7.29)

Thus,

The output impedance is a function of source impedance.

Table 7.2 summarizes all the equations derived in the above analysis.

7.6 TRANSISTOR AMPLIFIER CONFIGURATIONS

It is sometimes necessary to convert the h-parameters of one configuration to any of the other two depending on application. For example, if the problem has a transistor in CE configuration, but the h-parameters are specified in CC configuration, to analyze the amplifier circuit, one has to convert the available h-parameters into the other required configuration. In such a case very approximate conversion formulas as listed in Table 7.3 can be used and the analysis be carried out as usual.

 

Table 7.2 Small Signal Low-Frequency Analysis of Transistor Amplifier

Ai	− hf/1 + hoZL	−hfe / 1 + hoe ZL
Ri	hi + hrAiZL	hie + hrg Ai ZL
AV	AI ZL / Zi	AI ZL / Zi
γo
AVs
AIS
AP	AV. Ai	AV.Ai

The typical h-parameters for all the three transistor configurations for comparison of the three configurations are as listed in Table 7.4.

 

Table 7.3 Approximate Conversion for Hybrid Parameters

hie = hic	hre ≈ 1
hfe = − (1 + hfc	hoc = hoe

 

The h-parameters of a given configuration transistor can be determined from the output and input characteristics. The h-parameters do depend on the operating point selected. The variations of the parameters are to be taken over very small range over the operating point. Since the characteristics are nonlinear but they are assumed to be linear in this analysis, very small variations are to be considered. The forward current gain and output admittance parameters of the transistor can be obtained graphically from the output characteristics, while the input impedance and the reverse voltage gain can be obtained from the input characteristics.

From Fig. 7.11, the parameters h_fe and h_oe can be determined. By definition,

As seen from the figure, these variations are taken over the operating point.

The rest of the two parameters can be similarly determined from the input characteristics as shown in Fig. 7.12.

The operating point is transferred to the input characteristics and then the variations are taken over this point. Thus, by definition,

As seen from the above discussion, the h-parameters are not constant for a given transistor. They not only depend on the operating point, but also on the temperature. The typical variations of these parameters with collector current and junction temperature are as depicted in Fig. 7.13.

Table 7.5 gives relative values of the transistor amplifier parameters for the three configurations of the transistor.

As can be seen from Table 7.5, the CE transistor amplifier configuration is best suited as a power amplifier. CE configuration has both voltage and current gain very large compared to 1 and so, in the output, both voltage and current are very large compared to the input and thus, the power, which is the product of voltage and current, is very large compared to input power. In other words, the CE amplifier offers power gain, which is not possible either in CB or CC configuration since in CB configuration current gain is small compared to 1 and in CC configuration voltage gain is small compared to 1 and so, in both cases large power amplification is not possible in practice. The drawback of the CE transistor amplifier is that both the input and output impedances are of medium range, whereas one requires high input impedance and low output impedance for a good voltage amplifier.

CC configuration of transistor amplifier has a voltage gain of approximately 1, that is, the input and output voltages are approximately same. The advantage of this circuit is that the input impedance is very high and output impedance is very low, as required for that of a voltage amplifier. The CC configuration, also called as emitter follower circuit, finds application as buffer amplifier.

The transistor in CB configuration is not useful as a voltage amplifier, even though it has voltage amplification more than 1. This is due to the fact that input impedance is very low and output impedance is very high in contrast to what is required for a voltage amplifier. In this configuration, the current gain is approximately 1, that is, the output current would be approximately same as the input current. So, this transistor in CB configuration would be a good current buffer.

When very large amplification is required, a single transistor amplifier is not sufficient and a cascade of amplifiers is required. Cascading of amplifiers is nothing but connecting various single stage transistor amplifiers in series. The output of the first stage of the amplifier drives the input of the next stage and the output of this stage drives the consecutive stage. This cascading of different transistor amplifier stages is known as a multistage amplifier. The function of the multistage amplifier is not only large amplification but a good impedance match between the amplifier chain and the source and the last stage of amplifier with the load impedance. This matching of the impedances at the input and output of the amplifier chain can be achieved by appropriate selection of various stages in a multistage amplifier.

For example, when high source impedance is to drive the amplifier chain with low input impedance, the first stage of the chain can never be chosen as CE transistor amplifier, since the input impedance of this configuration is a medium value. The best choice in this case is the emitter follower, which has a high input impedance and low output impedance and so acts as a very good impedance transformation network. The voltage gain of this CC amplifier is unity and so one cannot expect the voltage to be amplified in the first stage of such an amplifier chain. The consecutive stages can be surely CE amplifiers since it is only amplifier configuration that gives both voltage and current gain. On similar argument, the final stage of the multistage amplifier can be chosen as emitter follower when a good matching of impedances of the output of the amplifier and the unknown load is required. So, in total, one can consolidate that in a poorly matched source and load impedance condition, the first and last stage of the amplifier chain need to be emitter follower and the intermediate stages can be CE configurations. One has to make a note that in such a chain, the first and last stages in the amplifier chain will not offer any voltage amplification.

The common base configuration of a transistor amplifier is rarely used in an amplifier chain where voltage gain is of prime concern. This configuration finds application wherever current is the prime parameter of interest. Common base configuration is a very good circuit, which produces a constant current in the output of the circuit, that is, the collector current of CB transistor amplifier is almost a constant value. This constant current is very useful for charging a capacitor so as to produce a sawtooth wave form.

7.7 LINEAR ANALYSIS OF A TRANSISTOR CIRCUIT

In practice, amplifier circuits are not simple as those discussed in the above section, consisting of simple CE, CB or CC configurations of transistor circuits. There may be resistors or any such components between the output and input networks or any other possible network combinations in the circuit configuration. In such cases the equations derived in the above sections cannot be applied directly to evaluate the amplifier parameters. The amplifier parameters can be evaluated by applying the known network tools to the equivalent circuit, as discussed in the following steps.

1. Draw the actual amplifier circuit diagram correctly.
2. Identify the transistor and its three terminals, emitter (E), base (B) and collector (C) on this circuit diagram.
3. Identify the transistor configuration by determining the input and output ports of the transistor.
4. Maintaining the relative positions of the three terminals of the transistor intact, replace the transistor with its small signal model.
5. Transfer all the remaining components from the basic circuit to this equivalent circuit, maintaining their positions in the circuit exactly.
6. Replace all ideal dc voltage sources by short circuit and all ideal dc current sources by open circuit. The source resistances, if any, are to be retained in the circuit.
7. Apply known network theorems like KVL, KCL, and Miller theorem to the resultant linear network. Solve for determining the amplifier parameters.

By following the above steps, the problem of analysis of transistor amplifier circuit can be brought down to simple linear network analysis. It is to be once again emphasized that this linear analysis is only applicable to low-frequency small signals.

7.8 MILLER’S THEOREM AND ITS APPLICATIONS

By applying the above-mentioned linear analysis steps, it is possible to analyse any transistor amplifier circuits. But, in some cases, when there is impedance connected between the output and input of the amplifier (for example, a resistor between base and collector of CE transistor amplifier) or when an impedance is connected in series with the common terminal of output and input of the amplifier (for example, emitter resistor in CE configuration), analysing the circuit with the help of KVL and KCL would be a bit complex and the problem can thus be simplified by the use of Miller’s theorem and its dual. The Miller’s theorem helps to find an equivalent circuit that does not have a resistor between the output and input of the amplifier or in the common terminal of the amplifier but its equivalent is either in series with or parallel to the output and input circuits of the amplifier.

Miller’s theorem: Consider a two-port network with feedback impedance Z′ between port-1 and port-2 of the network as shown in Fig. 7.14(a). The Miller’s theorem helps to find two impedances, one each in shunt with each port as shown in Fig. 7.13(b), which is equivalent to the circuit in (a). The values of Z₁ and Z₂ can be given as

        Z₁ = Z′/(1 − K)                         …(7.31)

        Z₁= Z′K/(K − 1)                     …(7.32)

where K = V₂/V1, the voltage gain of the two-port network.

Dual of Miller’s theorem: Consider a two-port network with feedback impedance Z′ in series with terminal 3 of the network as shown in Fig. 7.15(a). The dual of Miller’s theorem helps to find two impedances, one each in series with terminals 1 and 2, as shown in Fig. 7.15(b), which is equivalent to the circuit in (a). The values of Z₁ and Z₂ can be given as

        Z₁ = Z′(1 − A_I)                         …(7.33)

        Z₂= Z′(A_I − 1)/A_I                     …(7.34)

where A_I = − I₂/I₁, the current gain of the two-port network.

Assuming the two-port network to be transistor amplifier circuit, the above two cases can be simplified for analysis to a large extent by applying the Miller’s theorem and its dual. Now, after applying the Miller’s theorem or its dual or both, if need be, the two-port network is simple without any feedback impedance between the two ports or series impedance in the common terminal. The analysis discussed in Section 7.5 can be directly applied to the basic two-port network and the total analysis of the circuit can be performed by applying the KVL or KCL to the two ports of the network and determining the required amplifier parameters.

7.9 SIMPLIFIED MODEL OF A TRANSISTOR

In the analysis procedures discussed in the above sections for a transistor amplifier, the detailed calculations of all four parameters of the device are made. That is, exact values of voltage amplification, current amplification, input and output impedances can be determined. But, in practice, appropriate approximations can be allowed since analysing the circuit exactly gives no guarantee of the figures, which are achieved practically. This is because of the fact that the transistor parameters are not stable and depend on various factors like temperature, ageing and so on. So, even though exact analysis is performed and the parameters are determined accurately, in practice, one is not sure of achieving the same. So, approximations may be allowed within tolerable limits. In such a case detailed lengthy calculations need not be done and a simplified model of a transistor can be assumed and the mathematical analysis be simplified to a large extent.

Of the four h-parameters, only h_ie and h_fe are sufficient for the approximate analysis of low-frequency transistor circuits, provided that the load resistance is small enough to satisfy the condition

 

The simplified model of the transistor is as shown in Fig. 7.16. This equivalent circuit can be used for any configuration by grounding the appropriate node. The source is connected between the input node and ground and the load between the output and ground. If the above condition is satisfied, then the error in calculation of various parameters will not be more than 10%.

Simplified CE configuration: Figure 7.17 shows the equivalent simplified circuit of a CE transistor amplifier. The current gain of this circuit can be given as

 

Since h_oeR_L < 0.1, this term in the denominator of Eq. (7.13) can be neglected when compared to 1. This leads to not more than 10% error, which is tolerable.

For the input impedance, consider Eq. (7.17),

Since h_reh_fe/h_ieh_oe ≈ 0.5 for any transistor, ∣A_I∣ ≈ h_fe and h_oeR_L < 0.1. The second term will be less than 0.05 and so can be neglected compared to one in the brackets.

With the above two approximations, the voltage gain can be evaluated as

 

All the above three expressions are well within the tolerance limit of 10% and so the approximations are valid.

To calculate the output impedance, if V_s is made zero and R_L is infinite, there is only one dependent ideal current source, h_feI_b, in the output circuit and so, the output impedance would be infinity. The effective output impedance will be equal to the load resistance, that R∲_o = R_L.

If the transistor amplifier is to drive a circuit, then the effective load resistance would be a shunt combination of various components of the load, R′_L. In such a case, the condition to be satisfied can be modified as

 

Simplified CC configuration: The equivalent circuit for a transistor in CC configuration is as shown in Fig. 7.18.

The current gain can be derived to be

 

The input impedance be given as

 

The voltage gain for an emitter follower is approximately unity and so,

 

For output impedance, the ratio of open circuit voltage to the short circuit output current can be given as

and,

and so,

The tolerance limits of all these parameters are well within the specified value, 10%.

7.10 CE AMPLIFIER WITH EMITTER RESISTANCE

The selection of the operating point for stable operation of the amplifier in the active region of the transistor requires self-biasing of the transistor. This self-bias circuit requires an emitter resistor R_e in the emitter lead of the transistor circuit. This circuit achieves a very good stabilisation of the operating point, but since this emitter resistance is present in the common terminal of the CE transistor amplifier circuit, it acts as feedback network between the output and input. So, the amplification of the amplifier is reduced and one has to analyse the circuit afresh and determine the effect of this emitter resistance on various parameters of the CE transistor amplifier. An approximate solution assuming the condition h_oeR_L < 0.1 can be presented with the help of equivalent circuit as shown in Fig. 7.19.

The current gain can be given as the ratio of − I_c to I_b

 

The input impedance is given as

 

Since h_fe is very large and so,

 

And, the voltage gain is

 

The output impedance, as in the previous case, can be taken as infinity and the effective output resistance taking load into consideration is the load resistance, R_L itself.

By applying the Miller’s theorem dual for simplifying the analysis, a resistance R₂ comes in series with the load resistance and so effective load resistance would be the sum of R₂ and R_L. Thus,

 

And so, the condition for simplified analysis can be written as

 

7.11 MULTISTAGE AMPLIFIERS

Whenever large amplification with very good impedance matching is required using an active device such as a transistor or a field-effect transistor, a single active device and its associated circuitry will not be able to cater to the needs. In such case, single stage amplifier is not sufficient and one requires more stages of amplification. That is, the output of the first stage is connected to the input of the second stage amplifier circuit and the chain can continue until the required characteristics of the amplifier is achieved. Such an amplifier chain is called multistage amplifier and the different stages of the amplifier are said to be cascaded.

In a cascade multistage amplifier, the coupling of the sinusoidal signal from one stage to the next can have different configurations. When the output of one stage is coupled to the input next stage directly without any passive components, either in series or in shunt, the amplifier chain is called as direct coupled amplifier.

If coupling between the different stages of the amplifier chain is via an inductor or a transformer, the amplifier can be referred to as transformer coupled. In such amplifiers, analysis is bit complex and losses in the circuit would be large. The mutual inductance between the two windings is to be considered for exact analysis of the circuit. The advantage is that only ac is coupled but dc cannot be coupled via a transformer. So, dc isolation between the stages can be achieved in total.

If resistor and capacitor network is used for the interstage coupling, the chain is referred to as RC coupled amplifier. This RC coupled amplifier is most popular, in practice, since it is very good to adopt with minimum losses and also the biasing of the one stage does not affect the other stage since the capacitor, which is in series in the circuit acts as a dc blocking or ac coupling component. Such a capacitor is referred to as coupling or blocking capacitor. The capacitor, having an infinite reactance at zero frequency or dc current, does not allow the dc biasing current to flow from one stage to the other when they are cascaded. So, the consecutive stages of the amplifier are totally isolated in terms of dc biasing voltages and currents and so the biasing current of one stage will not affect the biasing of the other stage to disturb the operating point. But this being a capacitor, if the value of the capacitance is properly chosen such that the reactance of the capacitor at the operating frequency is very small or, if possible, negligible, this offers a short circuit to the ac sinusoid signal and so the coupling, of one stage to the other can be achieved without any problem. Thus, ac coupling and dc isolation between stages is achieved. Thus, such a coupling between different stages is very comfortable and so RC coupled amplifier finds a large application. Along with coupling, stability of the operating point is also of utmost importance. As we have already discussed and concluded, the self-bias circuit of CE configuration amplifier has a very good stability. So, such self-bias circuits are generally used in different stages of the amplifier chain. These circuits have an emitter resistance that acts as a feedback to bring down the amplification of the particular stage. One cannot afford such loss in gain of the stage but stability is also of prime concern. The way out is to have an emitter capacitor C_e in shunt with the emitter resistance R_e.. The emitter capacitor acts as an open circuit, offering infinite impedance to dc currents and so, the dc currents are passed through the emitter resistor and not through the capacitor. Whereas selecting the capacitor value such that it offers negligible reactance at operating frequency allows the ac signal to take the minimum resistance path and, thus, ac signals do not pass through the emitter resistor but are bypassed by this emitter capacitor. Such a capacitor is referred to as emitter bypass capacitor. Since the ac signals are bypassed by this capacitor and are not allowed through the emitter resistor, the effect of the resistor on the amplification factor is not felt and so, the amplification of the stage is not much affected by the presence of the emitter resistor. Such a circuit of RC coupled amplifier is as shown in Fig. 7.20.

In the ac analysis of a RC coupled amplifier, all capacitors can be assumed to be short circuits and can be neglected while determining the parameters of the amplifier stages. Similarly, for determining the operating point and bias stabilisation, these capacitors can be assumed to have infinite impedance and can be treated to open circuits.

The analysis of a multistage amplifier involves various steps. The individual amplifier parameters are to be determined and the analysis for the whole of the amplifier chain is to be performed. The analysis is to be started with the last stage first and after determining those parameters, one has to take up the previous stage for analysis. This is due to the fact that the determination of the parameters such as current gain, input impedance and voltage gain requires the knowledge of the load resistance. The load impedance of a given stage is, in general, the collector resistance in shunt with the input impedance of the next stage and few other biasing resistors. Since the input impedance of the next stage is unknown, starting the exercise with the first stage is not possible. If one starts the exercise with the last stage, since the load impedance is known, the above three parameters can be determined without difficulty. Once the last stage parameters are determined, the load to the previous stage can be calculated and determination of the three parameters is a simple network problem. Thus, to determine current gain, input impedance and voltage gain of various individual stages, one has to start the exercise from the last stage and proceed to first stage in the reverse order. In contrast, determination of output impedance requires the knowledge of source resistance. So, this parameter cannot be determined as the other three parameters, but the analysis of the first stage is to be taken first and one then proceeds to the consecutive stages in the forward direction.

When the amplifier stage parameters of all the individual stages are determined, the next step is to determine the overall performance of the amplifier chain. This can be achieved by simply following the known steps of the amplifier analysis as discussed in previous sections. The ratios of output current to input current, output voltage to input voltage, input voltage to input current and output voltage to output current can be determined by applying KVL and KCL appropriately.

While designing the multistage amplifiers, one has to be very careful with selection of operating point of each stage such that the required amplification is achieved with the selected transistor. Not only this, as the signal is proceeding in the various stages of the amplifier chain, its magnitude increases and so, the validity of the linear small signal model of the transistor for that particular stage is to be carefully checked. If proper checks are not done, one may lead to land in the nonlinear region of operation and so lot of distortion in the output of the signal may be introduced and also if the transistor is driven into saturation, clipping and other similar problems may creep in, spoiling the output signal totally. Also, one has to keep in mind the frequency of operation. All the analysis discussed so far is meant for low-frequency signals only. High-frequency analysis of a transistor amplifier is discussed in the following sections.

Darlington connection: The input impedance offered by the emitter follower circuit is not sufficient in some applications and one requires very high values. In such cases, Darlington pair connection gives the necessary very high input impedance values. Darlington connection is nothing but two emitter follower circuits in cascade with infinite load emitter resistance of first stage. The Darlington pair and its equivalent circuit is as shown in Fig. 7.21.

Some manufacturers deliver the Darlington pair as a single composite package with basic three terminals of base, emitter and collector. The collectors of the two transistors are tied up and brought out as collector terminal, the emitter of the first terminal is connected to the base of the second transistor internally, the emitter of the second transistor is brought out as the emitter output terminal and input terminal is the base of the first transistor.

Assuming the simplified analysis condition is satisfied, only two h-parameters, h_ie and h_fe are considered. For the second stage, the parameters can be derived to be

 

For the first stage, current gain is

And now, the overall current gain can be given as

and the input impedance of the first stage or the circuit can be given as

The above equation shows that the input impedance is very large to that of a single emitter follower circuit. For example, if R_e is 4 K, R_i2 would be 205 K and R_i1 will be 1.73 M from the typical values of h-parameters. Thus, for emitter follower if the input is of the order of hundreds of kiloohms, input of Darlington would be of the order of megaohms or higher. One can also note that even though the voltage gain of the pair is approximately unity, the current gain of the pair is very large compared to single emitter circuit.

The output impedance can be given as

The output impedance of the Darlington pair may be greater or smaller than that of a single transistor emitter follower depending upon the value of R_e relative to h_ie2, where h_ie2 is the h_ie of the second stage.

The drawback of the Darlington pair is that the leakage current of the transistor is amplified by the second. Hence, the overall leakage current may be high and a Darlington connection of three or more transistors is usually impractical.

The composite transistor pair may be used as a CE transistor amplifier. The advantage of this pair would be a very high overall h_fe nominally equal to the product of current gains of the individual transistors.

7.12 FREQUENCY RESPONSE OF AN AMPLIFIER

Frequency response of an amplifier is a plot of amplification versus frequency. This plot gives the ability of the transistor amplifier to amplify at a given frequency. It is to be noted that the amplifier will not be able to amplify signals of all possible frequencies. With the help of this frequency response of the amplifier, one can estimate the frequency range in which the designed amplification is achieved without distortion in the output of the amplifier. Fidelity of faithful reproduction of the signal at the output of the amplifier depends on the frequency of operation. The shape of the signal should remain unaltered, even though the amplitude and phase change. Then, the amplifier is said to have good fidelity.

Let the input signal to the amplifier be a sinusoidal waveform with angular frequency of ω, then v = V_m sin (ωt + f). If the amplifier has a gain of A, then the output signal will be

 

 

This output signal suffers a phase sift of θ and the total phase of he signal is θ + ϕ. To preserve the form of the signal, it is required that the amplification is independent of frequency and the phase shift θ is proportional to the frequency. Then the waveform shape is retained while there would be a shift in time by and amount θ/ ω.

Lack of fidelity is the extent to which an amplifier’s amplitude response is not uniform, and its time delay is not constant with frequency. It is not necessary to specify both amplitude and time delay response since the two are related and one having been specified, the other is uniquely determined.

The frequency response of an amplifier can generally be divided into three parts. First, the midband, where the amplification of the amplifier is constant or uniform with frequency. In this range of frequencies, the amplification is almost constant, equal to A_o and the time delay is also quite uniform. This is a useful range of frequencies where the amplifier has a good performance. Generally, the response is normalised and A_o (maximum amplification) will be made equal to 1. The amplification at other frequencies will be relative to this value. It is most practical to express the frequency response in decibels and so, the y axis is expressed in dB. 20 log (A) is the parameter of interest on such response graph.

At low frequency ranges, it is observed that the amplification is very low and the response rises as the frequency increases. This is the lower end of the response where the characteristic resembles the response characteristic of a high-pass filter. So, one can identify cut off frequency of this response where the filter allows signals above the cut off frequency and blocks the frequencies below this frequency. This cut off frequency would be 3 dB down the midband amplification factor A_o. This frequency f_L is the lower cut off frequency of the amplifier. The frequencies above this value would have good amplification with A_o. So, in the frequency range from zero to f_L, the amplifier does not offer optimum gain and the response starts with zero at dc frequency and increases towards A_o gradually.

As the frequency increase in the midband, the uniform characteristic of the response falls back towards zero. This is third part of the response curve, which is similar to that of low-pass filter. Once again, the cut off frequency of the low-pass characteristic is important. This determines the upper limit of the useful range of frequencies with the amplifier. Thus, the frequency f_H, called higher cut off frequency, is the frequency above which the response falls to zero gradually. The frequencies below this value are amplified with A_o in an amplifier. Above this frequency, the response is not optimum and gain falls down towards zero.

Figure 7.22 shows a complete frequency response curve of an amplifier. Thus, the range of frequencies that are amplified by the amplifier lie between the lower and higher cut off frequencies. In this useful range of frequencies the distortion of the signal would be minimum. This range is defined as the bandwidth of the amplifier. Thus,

 

The cut off frequencies of the high-pass and low-pass filters can be given and determined from the equivalent RC circuits. Consider a RC high-pass filter as shown in Fig. 7.23. The transfer ratio, the ratio of output response to input excitation, of such a circuit can be derived to be

where,

 

f_L is the frequency at which the response suffers by 3 dB from the maximum and is termed as 3 dB cut off frequency. The absolute value of the response at this frequency would be 0.707 (1/) of the maximum (1). Since this is the lower edge of the frequency response of the amplifier, it is called as lower cut off frequency.

Considering the RC low-pass filter as shown in Fig. 7.24, the higher cut off frequency can be characterised.

The transfer ratio of such a RC low-pass circuit can be derived to be

 

where,

 

7.13 BANDWIDTH OF A CASCADED AMPLIFIER

When a multistage amplifier is cascaded, the amplifier parameters can be determined from the analysis steps, as discussed in the previous sections. The frequency response is also affected by the cascading of amplifier stages and the new cut off frequencies can be determined as follows.

The high 3 dB frequency for n cascaded stages is f_H^* and equals the frequency for which the overall voltage gain falls to 1/ or by 3 dB of its midband value. To obtain the overall transfer ratio of the noninteracting stages, the transfer gains of individual stages are to be multiplied together. Thus,

For n stages with identical upper or higher 3 dB frequencies,

 

Thus,

and so,

The lower 3 dB frequency for n cascaded stages is f_L* and equals the frequency for which the overall voltage gain falls to 1/ or by 3 dB of its midband value. To obtain the overall transfer ratio of the noninteracting stages, the transfer gains of individual stages are to be multiplied together. Thus,

For n stages with identical lower 3 dB frequencies,

 

Thus,

and so,

From the above discussion, one can observe that the cascaded stages have a lower f_H and higher f_L and thus the effective bandwidth is lowered or reduced. That is, even though the amplification increases in cascaded stages, the bandwidth of the amplifier decreases.

7.14 EMITTER BYPASS CAPACITOR

An emitter bypass capacitor in shunt with the emitter resistor is generally used in the CE self-bias transistor amplifier circuit to bypass the effect of feedback on the amplification factor. In the general analysis, the reactance of the emitter bypass capacitor is assumed to be negligible, tending towards zero. This might be possible to some extent by choosing the appropriate capacitance value. But when exact analysis is to be considered, this reactance value cannot be neglected and so, the impedance, a resistor is shunt with a capacitance in the emitter lead of the amplifier is to be considered and the analysis steps are to be followed. Thus, the effect of the bypass capacitor on the low-frequency response of the amplifier can be estimated.

The circuit diagram of a CE amplifier with emitter resistor and capacitor in the common emitter terminal is as shown in Fig. 7.25. Also, the equivalent circuit of the same in a simplified transistor model is given in the same figure for simplified analysis of the circuit.

To simplify the analysis, the biasing resistors R₁ and R₂, which are in shunt, are assumed to be very large compared to the source resistance and so can be neglected in the analysis. Also, the load resistance R_c is assumed to be of small value such that the simplified model of the transistor can be adopted. The blocking capacitor is also omitted and its effect will be separately considered in the following section.

With the above assumptions, from the simplified equivalent circuit of the amplifier, the output voltage V_o can be derived to be

where

Solving for voltage gain A_V,

where,

 

The midband gain A_o can be obtained with ω → ∞ or

 

The effect of emitter bypass capacitor on the voltage gain can be estimated by the above equations. If more exact analysis is required, all the four h parameters are to be considered and after a complex network problem solution, the voltage gain of the amplifier stage can be determined.

7.15 COUPLING CAPACITOR

In a RC coupled amplifier a blocking capacitor is used in series with the two-cascaded stage to obtain dc isolation and ac coupling. In the previous analysis of the multistage amplifiers, the effect of this capacitor on the low frequency of the amplifier is neglected, assuming that the capacitor reactance tends to zero at operating frequency. But, in order to estimate the effect of this capacitor on the response, the following analysis is performed.

A single intermediate stage of any of the cascades is considered and is represented as shown in Fig. 7.26. The amplifier parameters may be expressed in h-parameters if the active device is transistor, or, in terms of mutual conductance, if it is a FET. In case of a FET, I = g_m V_i, R_i = ∞and R_o = r_d and when a BJT is considered, I = h_feI_b, R_i = h_ie and R_o =1/h_oe. The equivalent circuit suggests a high-pass filter and so, the cutoff frequency of the lower 3 dB frequency would be affected by the presence of coupling capacitor. The 3 dB cut off lower frequency can now be estimated as

where,    R′_o = R_o//R_y and R′_i = R_i //R_b     …(7.71)

and R_y is biasing resistor, collector resistance R_c in case of BJT or drain resistance R_d in case of FET.

Thus, the lower 3 dB frequency of such an amplifier can be estimated with a time constant, which is equal to the blocking capacitor multiplied by the sum of the effective resistances R′_o to the left of the capacitor and R′_i to the right of the capacitor.

If in a given transistor amplifier both emitter bypass and blocking capacitors are present, first compute the lower 3 dB frequency assuming the emitter bypass capacitor to be infinity. Then, calculate the f_L assuming that only emitter bypass is present. If the two cut off frequencies are significantly different, the higher of the two is approximately the low 3 dB frequency of the stage.

7.16 HIGH-FREQUENCY MODEL OF A CE TRANSISTOR

In the analysis performed at low frequencies, it is assumed that the response of the active device is instantaneous. That is, the output responds immediately to any changes in the input of the circuit. The time delay for the charge carriers to travel from input to output is negligible in this case of low frequency since for low frequencies, the time period is very small and the response time of the device can be neglected. So, the storage action or time delay or diffusion time is not considered in the above analysis. But, as the frequency of operation is increased, the signal time period decreases and so, the charge carriers take significant time to respond compared to the time period of the signal. By the time the response for the change input reaches the output, the input might have changed and the response cannot be instantaneous. There is some time delay in the circuit leading to storage action and thus the capacitances involved in the terminals of the device cannot be neglected. These capacitances were totally neglected in the analysis of low-frequency signals. Also, diffusion mechanism cannot be neglected and consideration of all these parameters leads to very complex analysis of the transistor amplifier. A model based on the transmission line equations would be quite accurate, but the resulting equivalent circuit is too complicated to be of practical use. Hence, approximations are made and cruder the approximations, the simpler is the circuit. A compromise model, which is accurate as well as simple, is hybrid pi (Π) or Giacoletto model.

The simplicity of this model is that the resistive components can be derived from the low-frequency h-parameters of the transistor. The analysis of this hybrid Π model is in excellent agreement with that of the experimental results. All the parameters are assumed to be constant with frequency. The parameters may vary with the quiescent operating point but are assumed to be constant under the given condition.

The Giacoletto model of a CE transistor is as shown in Fig. 7.27. The model discussed is only valid for common emitter configuration. Since the other two find little application as amplifier at high frequencies, they are not discussed in this context. As one can observe, there is one dependent current source in the output circuit, which depends on the input voltage and there is no voltage source as in the low-frequency model. There are four more additional conductances and two capacitors. The understanding of the existence of the conductances and capacitances is as discussed in the following paragraphs.

There are two base terminals in the figure, B and B′. B is the physical base terminal and is accessible externally but the terminal B′ is electrical and is not physical. All references to base terminal are made with respect to this terminal. Between these two terminals there is a resistor r_bb′, the base spreading resistor. This is the resistance that is felt by the charge carriers moving from the highly doped emitter terminal to thin, lightly doped base region. This is represented as a lumped element between the two terminals.

For small changes in the voltage V_b′e across the emitter junction, the excess minority carrier concentration injected into the base is proportional to V_b′e and, therefore, the resulting small signal collector current with the collector shorted to the emitter is proportional to V_b′e. This accounts for the current generator g_mV_b′e. g_m is the mutual conductance and can be defined as the ratio of output current to input voltage.

g_b′e is the conductance between the base and emitter of the device which is due to the fact that increase in minority carriers in the base results in increase in recombination base current. The excess minority carrier storage in the base is represented by the diffusion capacitance C_e between the base and the emitter.

There is a feedback between the output collector and input base of the transistor. The cause for such a feedback is the early effect. The feedback is represented by a shunt combination of conductance g_b′c and a collector junction barrier capacitance C_c. The conductance between the collector and emitter is g_ce.

The typical values of these parameters are as follows:

g_m = 50 mA/V, r_bb′ = 100 Ω, r_b′e = 1 K, r_b′c = 4 M, r_ce = 80 K, C_c =3 pF and C_e = 100 pF.

7.16.1 Hybrid Π Conductances

Transistor transconductance g_m: In the active region of operation for a transistor in CE configuration, the output collector current can be given as

 

Since the short circuit current is g_m V_b′e, g_m can be defined as

If the emitter diode resistance r_e is given by ∂V_E/∂I_E, then

 

Or, with the known expression for forward dynamic resistance of a diode (r = ηV_T/I), the above equation can be approximated as

 

The value of the transconductance achieved in this case would be very large compared to that of a FET.

The input conductance g_b′e: The circuit shown in Fig. 7.28 is the hybrid Π model of a CE transistor at low frequency. In other words, the circuit is redrawn neglecting the capacitances at low frequency. Comparing this circuit with that of the low-frequency h-parameter model, the values of the conductances can be derived in terms of h-parameters.

From the typical values of the hybrid Π conductances, r_b′c >> r_b′e and so, the input current I_b can be assumed to be flowing into r_b′e and no current is coupled to r_b′c. Or,

 

Therefore,

 

By definition, the short circuit current gain h_fe is the ratio of collector current to base current at short-circuited collector to emitter. Thus,

 

Or,

 

Thus, the input resistance r_b′e of the transistor is directly proportional to temperature and inversely proportional to the output current.

The feedback conductance g_b′c: With input open circuited, the ratio of input voltage to output voltage is defined as the reverse voltage gain h_re′

or,

 

Since h_re << 1,

        r_b′e = h_rer_b′c

        g_b′c = h_reg_b′e                 …(7.82)

The base spreading resistance r_bb′: The ratio of input voltage to input current with output shorted is h_ie given by

        h_ie = r_bb′ + r_b′e

or,

        r_bb′ = h_ie − r_b′e             …(7.83)

The output conductance g_ce: The output conductance with input open circuited is h_oe and, thus, when I_b = 0,

and

 

Thus,

or,

 

7.16.2 The Hybrid Π Capacitances

The equivalent model of CE transistor, as given by hybrid Π model, consists of two capacitances C_c and C_e. These values are also to be determined for complete analysis of the circuit.

Capacitance C_c: The capacitance between the terminals base B′ and collector C is C_b′c. This is nothing but the collector capacitance C_e. This value of collector capacitance is generally specified in the manufacturer catalogue of the transistor and is represented as C_ob. The variation of the collector capacitance with voltage depends on whether the junction is step or graded type. The variation would be V_CE⁻ⁿ where n takes value of 1/2 or 1/3 for the step or graded junctions, respectively.

Capacitance C_e: The sum of the transition and diffusion capacitance at the emitter is the value of emitter capacitance C_e. In general, diffusion capacitance is very large compared to transition capacitance at the emitter junction and thus,

 

To calculate the emitter diffusion capacitance, the accumulated charge should be evaluated. From the Fig. 7.29, the excess minority injection into the region can be assumed to be linear since the thickness of the layer is very small. Thus, the area under the curve is p′(0)/2 and the volume is WA. The total charge accumulated in the base region is the electron charge q, i.e.,

 

and current

 

D_B is the diffusion constant of minority carriers in the base. From the above equations,

 

Then, C_De can be given as

where r_e = V_T/I_E is the emitter resistance. Then,

 

So, the diffusion current is proportional to the emitter bias current. It may be noted that the above equation gives the diffusion capacitance. But, determination of its value is difficult since no manufacturer specifies the value of the base width W and also the diffusion constant is difficult to get from the available data. The emitter capacitance can be determined experimentally as

 

where f_T is the frequency at which the CE short circuit current gain drops to unity. This value can be experimentally determined and used to establish the emitter capacitance value.

7.17 VALIDITY OF THE HIGH-FREQUENCY MODEL

The Giacoletto high-frequency model of a CE transistor assumes that the parameters defined are constant with frequency. This is possible under some specified conditions and so, the model is only valid under these conditions. From the discussion of mutual conductance and diffusion emitter capacitance, it is assumed that the minority charge carrier distribution in the base region is triangular. If this distribution remains triangular even when the voltage V_BE varies, the initial slope and final slope would be the same and so, the emitter and collector currents would be equal. Thus, the hybrid Π model is valid under dynamic conditions when the rate of change of V_BE is small enough so that the base incremental current I_b is small compared with the collector incremental current I_c. It can now be stated that the parameters are frequency independent, provided that

We know that

Thus,

From the above, one can conclude that the high-frequency hybrid Π model of a CE transistor is only valid for frequencies up to approximately f_T/3.

7.18 HIGH-FREQUENCY CURRENT GAIN

The analysis of the CE transistor at high frequencies can be performed with the help of the above-discussed hybrid Π model. A single stage amplifier at high frequencies is considered with R_c′ the collector resistance as the load impedance. For simplifying the problem under consideration, the load resistance R_L = R_c is assumed to be zero such that the analysis is performed for maximum load current. Thus, R_L = 0, and from the typical values of the parameters, r_b′c >> r_b′e, r_b′c can be neglected since the input current flows entirely in the r_b′e approximately. Since the collector is shorted to emitter, the collector is also at ground potential and thus the capacitances C_c and C_e will be in shunt between the base and emitter terminals. With all these simplifications and appropriate assumptions, the equivalent circuit only consists of g_b′e in shunt with capacitance of value C_c + C_e in the input between the base and emitter and a short-circuited dependent current source g_m V_b′e in the output of the circuit as shown in Fig. 7.30.

The load current is

 

and,

 

Thus, the current amplification can be given as

or,

 

where

At f = f_β, ∣A_i∣ is equal to 1/ of its low-frequency value h_fe. The frequency range up to f_β is referred to as bandwidth of the circuit. At ω = 0, the value of A_i is − h_fe, which is in agreement with the definition of the short-circuit low-frequency CE current gain.

7.19 GAIN BANDWIDTH PRODUCT

The parameter f_T as discussed in the preceding section is the frequency at which the short-circuit current gain of a CE transistor equals unity. From Eq. (7.100), the magnitude of the current gain can be given as

 

Or, since h_fe >> 1, at f = f_T, ∣A_i∣ = 1 and so,

Thus,

 

The parameter f_T is an important parameter of high-frequency characteristic of a transistor. The parameter, being the product of short-circuit current gain and the bandwidth (the lower 3 dB frequency is so small that it can be assumed to be zero), it represents the gain bandwidth product of a transistor. This product constant is a very important parameter for a given transistor since it gives the behaviour gain and bandwidth of the transistor. If the transistor is designed for optimum gain, the bandwidth would be a small value and if the amplifier is designed for a large bandwidth, the gain suffers. If two transistors have the same value of the product, the transistor with lower h_fe will have larger bandwidth and vice versa.

From Eq. (7.100),

when

 

and when

 

or,

 

That is, the product of the current gain at operating frequency and the frequency of the amplifier is approximately equal to the gain bandwidth product of the transistor.

To determine the value of the emitter capacitance C_e′ one needs to establish the value of f_T experimentally. But determining the value of f_T experimentally is very difficult in some cases since the value would be very large. In such cases, the value of f_T can be determined by the measurement of the current gain at a given frequency. The product of this gain with frequency gives the required value of f_T approximately.

7.1    The following test results are obtained in a CE amplifier circuit while measuring h-parameters experimentally.

1. With ac output short-circuited i_b = 20 μA, i_c = 1 mA, v_be = 22 mV, and v_ce = 0
2. With ac input open-circuited v_be = 0.25 mV, i_c = 30 μA, v_ce = 1 V and i_b = 0. Determine the h -parameters of the given transistor.

Solution    From short-circuited data,

From the open-circuit test data,

7.2    Convert CE h-parameters to the CB h-parameters.

Solution    To convert one set of parameter (X) to another set of parameters (γ), first draw the original diagram of γ. Then redraw γ as X. Apply KVL and KCL equations and find the required ratio.

In this example CE h-parameters are going to be converted into CB h parameters. So, we will draw CB model with emitter as a common one. This is as shown below as in Fig. (b).

Now, let us go for the definitions of CE h-parameters,

we have

From circuit (b) we have

 

The current I in h_ob is = h_ob · V_bc = (1 + h_fb)I_e         …(1)

Applying KVL to the outer periphery of the circuit in (b),

h_ibI_e + h_rbV_cb + V_bc + V_ce = 0                     … (2)

Getting I_e from (1) and substituting in (2),

To find h_oe:

we have             I_c = h_fbI_e + h_ob · V_bc

To find h_ie and h_fe. Make V_ce = 0 for Fig. (b)

Then the circuit will become as shown below:

From circuit         V_cb = − V_bc = − V_be         …(3)

Writing KVL in left-hand mesh,

h_ibI_e + h_rbV_cb + V_be = 0                 …(4)

Writing KCL at node B

I_e + I_b + h_fbI_e − h_ob · V_be = 0

To find h_fe:

From Fig. (c)

We have from Fig. (c)

We have from (3) and (4)

(Using approximations that h_rb << 1, h_ibh_ob << (1 + h_fb)).

In order to convert from CE to CB simply interchange subscripts b and e.

7.3     h_fe = 50, h_ie = 0.83 KΩ, find out the values of h_fb and h_ib for a transistor in CB configuration.

Solution

7.4     Find CE parameters in terms of CC h-parameters.

Solution     First draw the CC h-parameters diagram.

Now, redraw this diagram with emitter made as common between input and output,

Now we have the definitions of CE h parameters as

By making V_ce = 0 in Fig. (b)

h_reV_ec source is replaced with a short circuit and h_oe in parallel with a short circuit also disappears the circuit becomes as below.

Writing KCL at node C

                I_b + h_fc·I_b + I_c = 0

⇒                                I_c = − (1 + h_fc) I_b

Writing KVL in the outer periphery

By making I_b = 0 in Fig. (b)

h_fe· I_b = 0 so current source is open circuited and the circuit becomes,

Writing KVL on the outer periphery,

If approximation is made that h_rc << 1.

If we want to convert from CC to CE, just interchange subscripts c and e in the above formulas.

7.5    The h parameters of a transistor used in single stage amplifier circuit are h_ic = 1100 r, h_rc = 1, h_fc = − 51 h_oc = 25 μΑ. Determine the amplifier parameters for CC configuration when R_S = R_L = 10 K.

Solution

7.6    For the circuit shown, verify that the modified h-parameters (indicated by primes) are

1.         
2.         
3.         
4.         
5. To what these expressions reduce if h_oeR_e << 1.

Solution    Replacing the transistor with its h-parameter model,

1.         

   when         V_CN = 0, V_ce = − (I_b + I_c)R_e             …(1)

   But             I_c = h_feI_b + h_oeV_ce             …(2)

   ∴ from (1) and (2) V_ce = − I_bR_e − h_feI_bR_e − h_oeV_ceR_e

       V_ce(1 + h_oe R_e) = − I_b (1 + h_fe)Re

   

   Since h_re << 1.

   
2.         

   	VbN Vbe + VeN hieIb + hreVce + VeN
   Since	Ib = 0, VbN = hreVce + Ven
   Again	Ic = hfeIb + hoeVce = hoeVce =

   

   From figure

   

   Thus	VbN	=   Vbe + VeN
   		=   hre Vce + VeN
   		(From (2))

   
3.         

   We have         I_c = h_feI_b + h_oeV_ce

   With

   
4.         

   From figure

   If I_b = 0, we have from eqn. (2)

   
5. If hoe R_e << 1, then these equations reduce to

           h′_ie = h_ie + (1 + h_fe) R_e

           h′_re = h_re + h_oeR_e

           h′_fe = h_fe − h_oeR_e ≈ h_fe

           h′_oe = h_oe

7.7    For any single-stage amplifier express Input Resistance in terms of current gain and h-parameters only.

Solution    We know that     R_i = h_i + h_r · A_I · R_L

and,

Substituting R_L in the expression for R_i, we get

7.8    Draw the equivalent circuit for the CE and CC configurations subject to the restriction that R_L = 0. Show that the input impedances of the two circuits are identical.

Solution    CE hybrid model with V_CE = 0 is

From the circuit input impedance

CC h-parameter model with R_L = 0 is

Writing KVL in the input loop

But we know that h_ic = h_ie

∴ From (1) and (2) R_i = R′_i

7.9    Prove that where R_{i ∞} = R_i for R_L ≡ ∞ and R_io ≡ R_i for R_L = 0.

Solution    We have an expression for

and,         R_i = h_i + h_rA_IR_L

From (1), h_oh_i − h_fh_r = h_oR_i∞

7.10    For the emitter follower with R_s = 0.5 K, R_L = 5K, calculate A_I, R_i, A_V, A_Vs and R_o. Assume hf_e = 50, hi_e = 1 kΩ, h_oe = h_re = 0.

Solution

7.11    The transistor amplifier shown uses a transistor with typical h parameter values. Calculate A_I = I_o/I_i, A_V, A_Vs, R_o and R_i.

Solution    By killing all dc sources, and short circuiting capacitances the circuit becomes.

Let

Parallel combination of 100 K and 10 K results 9.09 kΩ = R₁₂

7.12    Find the input impedance for the circuit shown, in terms R_L and R_e′ h-parameters. (using exact h-parameter model)

Solution    Replacing transistor with its h-parameter model, the circuit will become as below:

            V_eN = (I + h_feI + V_ceh_oe) R_e

            V_ce = − V_eN − R_L(h_feI + V_ce · h_oe)

                  = − (I + h_feI + V_ceh_oe) R_e − R_L (h_feI + V_ce · h_oe)

            V_ce(1 + h_oeR_e + h_oeR_L) = − I ((1 + h_fe)R_e + h_feR_L)

From (2) and (3)

7.13 For the amplifier shown, find A_I = I_o/I_i, A_V, A_VS and R_i use typical h-parameter values.

Solution

1. Replacing all dc sources and capacitors with short circuits, the circuit becomes as shown below:
   
2. Replacing the transistor with its exact h-parameter model, and replacing 10 K ∥ 100 K with an equivalent of 9.09 kΩ,
   

From the circuit I_o = − (h_feI_b + h_oeV_ce)

 

 

 

 

Substituting equations (2) and (3) into (1).

 

− Io	=	50 Ib + 25 × 10−6 (5000 I0 − 1000 Ib + 1000 Io)
	=	50Ib + 25 × 10−6(6000 I0 − 1000 Ib)
	=	50 Ib + 0.15 Io − 0.025 Ib
− 1.15 Io	=	49.975 Ib

Again,       V₁ = h_ieI_b + h_re V_ce + (I_b − I_c)R_e

From (2), (3) and (4),

 

Vce	=	5000 (Io) − 1000 (Ib − Io)
	=	6000 Io − 1000 Ib
	=	− 1888.18Ib − 1000Ib
Vce	=	−2888.18Ib             …(5)
V 1	=	1100 Ib + 2.5 × 10−4(− 2.88 × 103Ib) + (44.45) Ib × 103
	=	Ib (1.1 + 44.45 − 7.22 × 10−4) 103
	=	Ib(44.828) − 103
Ri1	=
AI	=

From (4)

∴                   A_I = (− 43.45) (168.59) × 10⁻³

                           = − 7.325

The resulting values are

 

	AI = − 7.325
	Ri = 7.55 kΩ
	AV = − 4.84
	AVs = − 2.085

7.14    Derive the equation for voltage gain, V_o/V_s for the circuit shown in terms of R_s, R_e and R_L. Assume simplifial CE modle of transistor [h_oe (R_e + R_L) ≤ 0.1.]

Solution    Since h_oe(R_e + R_L) ≤ 0.1, approximate h-parameter model can be used.

 

Input impedance

7.15    Calculate A_I = I_o/I_i, A_V, A_Vs and R_i for the circuit shown.

Solution    After replacing transistor with its h parameter model, the circuit will become as shown below:

From the circuit

 

	Io = (Ii − Ib) − I
where	I = hfe Ib + hoe Vce
Io = (Ii − Ib) − hfe Ib − hoe Vce
	= Ii − Ib − 50Ib − 25 × 10−6Vce
	= − 51 Ib + Ii − 25 × 10−6 Vce    …(1)
Vce	= Vo − (Ii − Io) Re
	= Vo + (Io − Ii) Re
	= Vo + 100Io − 100Ii         …(2)

Also, from figure

 

Put (3) and (2) in (1)

 

 

From the circuit,

 

From the outside loop,

 

Subtracting (5) and (6).

h_ieI_b + h_re V_ce + (I_i − I_o) R_e − R_f (I_i − I_o) − V_o = 0      …(7)

From (2) and (3)

 

Put (8) in (7)

1100I_b + 2.5 × 10⁻⁴ (101 × 100 I_o − 100I_i) + 100(I_i − I_o) − 200 × 10³(Ii − I_b) − 10⁴I_o = 0

⇒ I_b(1100 + 200 × 10³) + I_i (− 2.5 × 10⁻⁴ × 100 + 100 − 200 × 10³)

+ I_o (2.5 × 10⁻⁴ × 100 × 101 − 100 − 10⁴) = 0

⇒ I_b(201.1 × 10³) + I_i (− 0.025 + 100 − 200 × 10³)

+ I_o(2.525 − 100 − 10⁴) = 0

⇒ I_b(201.1 × 10³) + I_i(− 199900.025) + I_o (− 10097.475) = 0

∴ From (9) and (4)

 

Io	=	− 51(0.99 Ii + 0.0503Io) + 1.0025 Ii − 0.2525Io
	=	−49.487Ii − 2.767 Io
Io	=	− 13.135 Ii                          …(10)

From (9) and (10)

 

	Ib	=	0.99 Ii + 0.0503 (− 13.135Ii)
		=	(0.99 − 0.6607)Ii = 0.3293Ii     …(11)
So,	Ib	=	0.33Ii
	Io	=	− 13.135Ii

From (6), (11) and (10)

 

	Vi = 200 × 103 (1 − 0.33) Ii + 104 (− 13.135) Ii
	= (200 × 103 × 0.67 − 131.35 × 103) Ii
	= 2.65 × 103Ii

7.16    Calculate R_i = V_s/I_i, A_V and A_I = − I_o/I_i for the circuit shown here. h_ic = 1.1 kΩ, h_fc = − 51, h_oc = 0 A/V and h_rc = 1

Solution    First stage is an emitter follower, second is also an emitter stage. Let A_I1, A_I2, be the current gians of two stages. R_i1, R_i2 be their input impedances.

Here, load resistance of first stage is the input resistance of second stage,

∴	AI1	=
		=	22.15
	Ri1	=	hic + hrc·· AI1 · RL
		=	1.1 + 1 × 22.15 × 52.1
		=	1155.10 kΩ
	AV1	=
∴	AV	=	AV1 · AV2 = 0.9905
	AI	=	AI1· AI2 = 1129.65

7.17    When a transistor is biased at 20 mA, 20 V it has following h-parameters at room temperature h_ie = 500 Ω, h_fe = 100, h_re = 10⁻⁴, h_oe = 4 × 10⁻⁵ Ʊ. It has f_T = 50 MHz and C_c = 3 pF. Find all the values of hybrid π components.

Solution

7.18    A transistor biased at 5 mA, 10 V, h_ie = 600 Ω, h_fe = 100 C_C = 3 PF and current gain of 10 at a frequency of 20 MHz. Find β cut off frequency, gain band width product, C_e′, r_b′e and r_bb′.

Solution    Magnitude of current gain as a function of frequency is given by

7.19    Find the base width of a silicon pnp trasistor whose figure of merit is 450 MHz. Diffusion length of holes is 15 cm²/sec.

Solution    Figure of merit = f_T = 450 MHz

7.20    When a Ge pnp transistor is biased at 2 mA, 15 V, it has a base width of 2 μm. Find C_e and f_T given that D_B = 50 cm²/sec.

Solution

7.21    The 3-db bandwidth of an amplifier extends from 20 Hz to 20 kHz. Find the frequency range over which the voltage gain differs by only 1 db from the mid band value.

Solution    −1 dB = 10^−1/20 = 0.8916

We have         

Taking logarithm on both sides,

 

at                      f = f₂, gain falls by 1db          …(1)

∴    20 log A_V (f₂) = 20 log A_Vo − 1          …(2)

From (1) and (2)

	f2 = 0.5079 fH
	= 0.5079 × 20 K = 10.16 kHz
	at f = f1, gain falls by 1 db.

∴    20 log A_V (f₁) = 20 log A_Vo − 1           …(3)

From (2) and (1)

 

∴    1 db bandwidth is from 39.37 to 10.16 kHz

7.22    It is desired to build an audio amplifier with a pass band of 20 Hz to 20 kHz and a mid-band gain of 64000. Three stages are used in cascade for this purpose. What should be the mid band gain and band width of each stage?

Solution    For three stages n = 3

We have      f_H = Individual high 3 dB frequency

7.23    It is desired that the voltage gain of an RC-coupled amplifier at 60 Hz should not decrease by more than 10% from its mid-band value. Show that the coupling capacitance C must be at least equal to 5.5/R′, where R′ = R′_o + R′_i is expressed in kΩ, and C in μF.

Solution    We have

7.24

1. For the transistor stage shown with 1/h_oe = ∞ calculate the percentage tilt in the output if the input current I is a 200 Hz square wave.
2. What is the lowest-frequency square wave which will suffer less than 2% tilt?

Solution

1. We have f_L        

    

   	R′ o= 3 K ∥ ∞ = 3 kΩ
   	R′i = 2 K
   	Cb = 10 μF

   

2.  

   

   ⇒	f = 200 πfL
   	= 200 × 3.14 × 3.1847
   	≈ 2 kHz.

7.25    The hybrid-π parameters of a transistor are as follows:

r_b′e = 1 kΩ, g_m = 50 mA/V C_e = 100 pF, C_c = 3 pF, r_bb′ = 100 Ω, g_ce and g_b′c are very small. Find

1. 3 dB frequency of current gain (I_L/I_s).
2. 3 dB frequency of voltage gain.
3. Voltage gain at the cut off frequency of current gain.

Solution    Replacing transistor with its hybrid model, and using Miller’s theorem,

 

                           = 253 pF

Current gain

∴     Current gain

Put          s = Jw

Let          w₁ = cut off frequency

So,

(b) Using Thevenin’s theorem, with respect to b′e terminals

                    R_TH = r_b′e ∥ (R_s + r_bb′)

                          = 1000 ∥ (100 + 100) = 166.67 Ω

So, the circuit will become,

We can write f_H = 3 db freq. of voltage gain

(c) Voltage gain

We have    

Writing this as a function of frequency

7.26    A transistor used in a CE amplifier has parameters h_fe = 100, g_m = 0.1 Ʊ, r_bb, = 100 Ω, C_c = 1pf = f_T = 400 MHz.

1. What should be the source resistance to get a 3 db bandwidth of 5 MHz with R_l = 500 Ω?
2. Find midband voltage gain

Solution

1. We have C = C_e + C_c(1 + g_mR_L) from the previous problem.
   
   

   We have       R = (R_s + r_bb′) ∥ r_b′e

   

   Using the value of r_b′e in (1).

   

   ⇒ R_s (1000 − 350 − 74) = − 100 × 1000 + 1100 × 350.74

   ⇒             R_s = 440.21 Ω

2. Mid-band voltage gain =
   

7.27    Consider a single stage CE amplifier with the load resistance R_L shunted by a capacitance C_L.

1. Prove that the internal voltage gain
   
2. Prove that the 3-db frequency is given by provided that the condition is satisfied

         g_b′eR_L(C_c + C_L) >> C_e + C_c(1 + g_mR_L)

Solution

1. The circuit will be as shown:
   

   Replacing transistor with its hybrid-Π model and using Miller’s theorem, we get

   

   Since

   
   

   Hence proved.

2.  

   

   at the Input side = C = C_e + C_c(1 − K)

   Input time constant = r_b′e · C (neglecting r_bb′)

   ∴      r_b′e(C_e + C_c(1 − K_o)          …(2)

   where K_o is midband value of K.

   Output time constant = R_L·· (C_L + C_c)      …(3)

   From equation (1), midband value of K is

    

   K_o = K∣_w→∞ = − g_mR_L       …(4)

   Using (4) in (2)

   Input time constant = r_b′e (C_e + C_c (1 + g_mR_L)

   Output time constant = R_L(C_c + C_L)     …(5)

   Given that g_b′eR_L(C_c + C_L) >> C_e + C_c(1 + g_mR_L)

   ⇒ R_L(C_c + C_L) >> r_b′e [C_e + C_c(1 + g_mR_L)].     …(6)

   From equations (5) and (6), output time constant is more than input time constant. So, output time constant being larger will predominate and yet decide the 3 dB bandwidth.

   ∴            w_H = R_L (C_c + C_L)

   is the equation for 3-db bandwidth.

7.28    For a single-stage CE amplifier with typical hybrid-π parameters, find the value of R_s which will give a 3-dB frequency which is (a) half the value for R_s = 0. (b) Twice the value for R_s = ∞. Use Miller’s theorem and approximate analysis.

Solution

1. We have

   where           C = C_e + C_c( 1 + g_mR_L)

   and                R = (R_s + r_bb′) ∥ r_b′e

2. with
   

   Let

   
   
   

   ∴ given that        …(3)

   From (1), (2) and (3)

   

   2 × (R_s +1100)90.90 = 1000 (R_s + 100)

   ⇒ (2000 − 180.80)R_s = − 1000 × 100 + 1100 × 180.80

   ⇒             R_s = 122.19 Ω

(b) with

if	Rs = ∞
	R = rb′e

and

given that f_H = 2f_H1          …(3)

⇒ from (1), (2) and (3).

⇒       R_s + h_ie = 2 (R_s + r_bb′)

⇒    h_ie − 2r_bb′ = R_s

               R_s = 1100 − 200

                   = 900 Ω

7.29    Show that the low-frequency voltage gain of the FET stage with r_d >> R_s + R_L is given by

1.         

   where

   
2. If g_mR_s >> 1 and g_m = 5 mA/V, find C_s so that a 50 Hz square wave input will suffer no more than 10 % tilt.
   

Solution

1. Replacing all dc sources with their internal resistances, and replacing FET with its small signal model, we have,
   

   We are having R_s and C_s in parallel, call it as

   

   Since r_d >> (R_L + R_s), it can be neglected.

    

   V_o = − g_mV_gs · R_L       …(2)

    

   Writing KVL in the loop G–S–N–G,

   − V_s + V_gs + g_mV_gs · Z_s = 0

   
   

   From (2) and (4)

   

   To find A_o, midband gain take limit as w tends to infinity in A_V expression.

   Then,                A_o = − g_mR_L

   

   Since given that and

   Hence proved.

2. If g_mR_s >> 1, then f_p >> 1, so f_L is decided by f_p only.
   
   

7.30    For a two stage RC coupled amplifier, the parameters of the transistors are h_fe = 50, h_ie = 1.1 k, h_re = h_oe = 0. Find (a) midband gain (b) the value of C_b necessary to give a low 3-dB frequency of 20 Hz. (c) find the value of C_b necessary to ensure less than 10 % tilt for a 100 Hz square wave input.

Solution

1. To find the value of gain, assume C_z and C_b as short-circuits.
   

   Now, Replacing transistor with their h-parameters,

   

   	RL2	= load resistance of 2nd stage = 2 kΩ
   	RL1	= load resistance of Ist stage
   		= 2 K ∥ 50 K∥ 50 K ∥ Ri2
   		= 0.69 kΩ
   	Ri1	= Input resistance of Ist stage = hie = 1.1 kΩ
   	Ri2	= hie = 1.1 kΩ

   ∴ Second stage calculations:

    

   	RL2 = 2 K, Ri2 = 1.1 kΩ
   ∴	Ai2 = − hfe = − 50

   

   First stage calculations:

   	RL1 = 0.69 kΩ, Ri1 = 1.1 kΩ
   	Ai1 = − hfe = − 50

   

   ∴ Mid-band gain = A_V1 · A_V2

                         = 2851.85

2. To find C_b: We cannot make it as short circuit, only C_z is made short circuit. Then, the equivalent circuit will become,

   We have

   
   

   	R′o	= 2 K ∥ ∞ = 2 K
   	R′i	= 25 K ∥ hie = 1.053 kΩ

   Given that f_L = 20 Hz

   

   So, we need a C_b of value 2.607 μF, to get a lower 3-db frequency of 20 Hz.

3. We have % tilt =
   

7.31    For the two-stage FET RC-coupled amplifier shown the following are the parameters g_m = 10 mA/V, r_d = 5.5 K R_d = 10 K, R_g = 0.5 M for each stage. Assume C_s to be arbitrarily large.

1. What must be the value of C_b in order that the frequency characteristic of each stage be flat within 1 dB down to 10 Hz?
2. Repeat part (a), if the overall gain of both stages is to be down 1 db at 10 Hz
3. What is the overall midband voltage gain?

Solution

1. Since the value of C_s is assumed to be large, it acts as a short circuit. Replacing transistor (FET) with its small signal model, we have (killing all dc sources),
   

   	Ro	=    rd = 5.5 kΩ
   	R′o	=    rd ∥ Rd = 5.5 ∥ 10 = 3.548 kΩ
   	Ri	=    ∞ , Ri = ∞ ∥ Rg = 0.5 MΩ

   

   In the low frequency region, we can write

        where A_o is mid-band value.

   

   given that gain is −1 db at f = 10 Hz

   

   ∴             f_L = f × 0.509 = 5.09 Hz          …(2)

   Therefore, from (1) and (2)

   
2. Since two stages are cascaded, gains (voltage) are going to be multiplied.
   
3. At the second stage
   

   ∴		= − gm (Rd||rd) = Ao2 = midband gain of 2nd stage.
   ∴	Ao2	= − 10 × 10−3 (10 K ∥ 5.5 K)
   		= − 35.48

   Since the voltage gain of Ist stage is also same as second stage.

               A_o1 = midband value

                     = − 35.48

   ∴ overall midband value = A_o1 · A_o2

                                    = 1258. 83

7.32    A three stage RC -coupled amplifier uses FET’S with the following parameters g_m = 2.6 mA/V, r_d = 7.7 kΩ, R_d = 10 K, R_g = 0.1 MΩ, C_b = 0.005 μF and C_s = ∞. Evaluate (a) the overall mid-band voltage gain in decibels (b) f_L of each individual stage (c) the overall lower 3 dB frequency.

Solution

1. After replacing FET with its small signal model, the diagram will become as shown below:
   

   Since these three stages are cascaded, the overall gain is the product of individual gains. In decibels they are going to be added.

   Since R_g of one stage shunts R_d, we can write

    

   	∣Ao∣	= mid-band value of gain one stage. = gmR.
   where,	R	= rd∥ Rd∥ Rg
   		= 7.7 K ∥ 10 K ∥ 100 K
   		= 4.1689 kΩ
   ∴	∣Ao∣	= 2.6 × 4.16789 = 10.84
   	Ao db	= 20 log ∣Ao∣ = 20.7 dB

   ∴ Overall mid-band gain of 3 stages = 3 × 20.7

                                                        = 62.10 dB

2. We have
   
3.                 f_L^* = Overall 3-db frequency of 3 stages.
   

7.33    The amplifier stage shown is required to provide a voltage gain with a dc quiescent voltage of 10 V. Draw the small signal equivalent circuit model and determine:

1. R₁ and R₂.
2. the input impedance.

            Assume that h_fe = 200 and V_BE = 0.6 V.

Solution    Let the voltage at point B with respect to ground as V_B. Under dc conditions capacitors act as open circuit.

Then,	VE	= voltage between E and N
		= VB − VBE = 5 − 0.6 = 4.4 V

given that V_CEQ = 10 V

Now, replacing transistor with its small-signal model.

From the circuit	Vi =	[hie + R1 (1 + hfe)] Ib       …(2)
	Vo =	− 500 hfeIb                   …(3)

From (2) and (3)

given that       A_V = − 5

⇒	200 × 500	= 5500 + R1(1005)
⇒	R1	= 94.02 Ω

From equation (1) R₂ = 880 − 94.02

                              = 785.98 Ω

From equation (2)	= Input resistance
	= hie + (1 + hfe) R1
	= 19.99 kΩ

7.34

1. Find the voltage gain A_Vs of the amplifier shown. Assume hie = 1000 Ω, h_re = 10⁻⁴, h_fe = 50, h_oe = 10⁻⁴ A/V.
2. Find R′_o.

Solution

1. For the second stage h_oeR_L = 10⁻⁴ × 5 × 10³

                                            = 0.5 > 0.1

   ∴ Approximate model is not suitable for second stage we have to use exact analysis for second stage. Since for second stage output is taken at emitter terminal it should be a common-collector configuration

   

   First stage is a common-emitter configuration.

    

   RL1	= 10 K ∥ 171 K = 9.44 kΩ
   hoe·RL1	= 10−4 × 9.44 × 103 = 0.944 > 0.1

   Here also, we have to use exact analysis.

   
2. Since these two stages are cascaded, R_o is decided by the last stage.
   

   R_s2 is the source resistance for 2nd stage.

   
   

    

   ∴	Ro2	= 114.746 Ω
   ∴	R′o	= Ro2 ∥ RL2 = 114.746 ∥ 5 KΩ
   		= 112.17 Ω

7.35    For the two-stage amplifier of the diagram, calculate the input and output impedances, and the individual and overall voltage gains. Assume h_fe = 50, h_ie = 1.1 kΩ h_re = h_oe = 0.

Solution    Since h_oe = 0, h_oeR_L2 = 0 so we can use approximate model for Q₂. As well as Q₁. Replacing transistor with their small signal model, by killing dc voltage sources,

Second stage calculations

This is a CC stage,

 

	Ai2	= 1 + hfe = 51
	RL2	= 5 kΩ
	Ri2	= hie + (1 + hfe) RL2
		= 1.1 + (51) × 5 = 256.1 kΩ

First stage calculations

This is a CE amplifier stage

∴ overall gain	AV	=	AV1 · AV2 = − 221.80
	R in	=	overall input resistance = Ri1 ∥ R1∥ R2
		=	1100 ∥ 22 K ∥ 100 K = 1036. 59 Ω

 

7.1 Convert CC h-parameters into CE h-parameters.

 

7.2 In a single-stage Amplifier the h-parameter values are h_re ≈ 1, h_fe = - 50, h_oe = 24 μA/V. Find A_I, R_i, A_Vs and R_o for the CC configuration with R_s = R_L = 5 K.

 

7.3 For the emitter follower, with R_s = 0.1 kΩ, R_L = 5 k, h_fe = 50, h_ie = 1000 Ω, h_oe = 25 μA/V, calculate A_I, A_V, A_Vs, R_i and R_o.

 

7.4 For the transistor amplifier shown find A_I, A_V, A_Vs and R_o, R_i with h_oe = h_re = 0. h_fe = 100, h_ie = 1.1 kΩ.

7.5 When a transistor is biased in 10 mA, 10 V it has following h-parameters at room temperature. h_ie = 600 Ω, h_fe = 50, h_re = 2 × 10⁻⁴, h_oe = 4 × 10⁻⁵. It has f_T = 100 Mhz and C_c = 3 pf. Find all the hybrid π-components.

 

7.6 Find the base width of a silicon pnp transistor whose figure of merit is 500 MHz. diffusion length of holes is 15 cm²/sec.

 

7.7 When a Ge pnp transistor is biased at 10 mA, 10 V, it has a base width of 2 microns. Find Ce and f_T given that D_B = 50 cm²/sec.

 

7.8 The 3-dB bandwidth of an amplifier extends from 50 Hz to 50 KHz. Find the frequency range over which the voltage gain differs by only 2 dB from its midband value.

 

7.9

1. Show that the relative voltage of an amplifier with an emitter resistor Re bypassed by a capacitor C_z may be expressed in the form.
   
2. Prove that lower 3-db frequency is

7.10 In a transistor circuit shown below, R_s = 500 Ω, R₁ = R₂ = 50 K, R_c = R_e = 2 k, h_ie = 1.1 kΩ, h_fe = 50, h_re = h_oe = 0, C_b = 5 μF.

1. Neglecting the effect of C_z, find f_L.
2. Neglecting the effect of C_b, find f_p and f_o due to C_z alone.

1. Explain the different types of distortion in an amplifier. Sketch the frequency response of an RC coupled amplifier.
2. Draw the high-frequency model of one stage RC coupled amplifier and derive an expression for upper 3 dB frequency.
3. Discuss the effect of emitter bypass capacitor on the low-frequency response of a CE amplifier.
4. Draw the hybrid Π equivalent circuit of a transistor in CE configuration and explain the various parameters in it. In terms of h-parameters derive the equations for the various components of this circuit.
5. Draw a circuit diagram for a CE transistor amplifier and derive expressions for voltage and current gain and input and output impedance.
6. State Miller’s theorem and its dual and give its applications.
7. Among the three configuration of BJT, CE configuration is widely used. Justify this statement and give its applications.
8. Classify amplifiers with respect to operating point selection and compare them in terms of efficiency, distortion and nonlinearity.
9. Compare CB, CE and CC configurations with respect to their characteristics and performance.
10. Draw the circuit diagram of Darlington emitter follower and derive the expression for input impedance.
11. Draw the equivalent circuit of a CE amplifier and derive the equation for all the four amplifier parameters.
12. Why is hybrid model of two-port network employed to represent a transistor? Explain each of the four h-parameters of the model and give their expressions.
13. State the linear analysis of a transistor amplifier circuit. State the Miller’s theorem and its dual and give its applications.
14. When and why is the simplified model of a transistor employed? Give its circuit and derive the amplifier parameters of a CE transistor amplifier using this model.
15. Draw the simplified model of a CC transistor amplifier circuit and derive its parameters.
16. Discuss in detail about the selection of transistor configuration in each stage of a multistage amplifier.
17. Derive the bandwidth of a multistage amplifier, assuming that each stage has same upper and lower cut off frequencies.
18. Discuss the effect of emitter bypass and coupling capacitors on the frequency response of the CE amplifier.
19. Derive the equations for the parameters of high-frequency conductances in terms of h-parameters.
20. Derive the expression for the two capacitances associated with high-frequency model of transistor. Give the validity condition of Giacolletto model.
21. What is unity crossover frequency? Give its significance.
22. Derive an expression for short-circuit gain of a transistor in CE configuration at high frequencies.
23. What is the significance of gain bandwidth product of a transistor amplifier? Discuss in detail.
24. What are input and output nonlinear distortions? Explain and give the effect on the output signal of an amplifier.
25. Derive equations for current gain and voltage gain of a simple amplifier in terms of h-parameters at low frequency, taking into account the souce resistance.
26. What is a Darlington pair? Draw its circuit and explain the special features of the pair.
27. What is unity crossover frequency? What is its significance? Discuss about gain bandwidth product.
28. Sketch a typical frequency response curve of an amplifier and identify its bandwidth.
29. Discuss briefly about the choice of transistor configuration in a cascaded amplifier.
30. Under what conditions does an amplifier preserve the form of the input signal?