Chapter 13

Operational Amplifiers

13.1 INTRODUCTION

All the types of amplifiers discussed are designed for a specific application or use. They involve either transistor or FET circuits either in single or multi stage configurations. But, Operational Amplifier, known as Op-Amp, is an amplifier, which has a number of applications. Op-Amp is a cascade of large number of amplifier stages designed such a way that any electronic circuit whether linear or non-linear, digital or analog, amplifier or oscillator, comparator or converter, ac or dc signal processing, mathematical or logic computations is possible. Operational Amplifiers are the most popular electronic devices in use these days. They are versatile and easy to use. Its popularity is due to the fact that nearly ideal characteristics are achievable in practice. The feedback circuit obtains the performance of an Op-Amp circuit.

An Operational amplifier is an Integrated Circuit (IC) consisting of several stages of transistor amplifier stages to achieve ideal characteristics of the circuit. Basically it has two input terminals and an output terminal. The two input terminals are: Inverting and Noninverting terminals. The output and the input are out of phase when the signal is applied at the inverting terminal of the Op-Amp whereas the input and output signal will be in same phase when the input signal is applied at the non-inverting terminal of the input. The Op-Amp has two types of amplifications: differential gain and common mode gain. Ideally the differential gain is infinity while the common mode gain is zero. That is, the Op-Amp amplifies the difference of the two input signals while the common mode signal is suppressed. In other words, if the input to the two terminals of the Op-Amp is same, the output will have to be zero.

Ideally, the Op-Amp has infinite gain. Thus, the Op-Amp circuit can be designed with feedback to the gain magnitude as required. The feedback controls the circuit parameters. The parameters of the circuit designed depend on the external circuit to the Op-Amp but not on the Op-Amp. Thus controlling and achieving required parameters is very easily obtained. The same Op-Amp can be used to achieve very high gain (several lakhs) or very low gain (less than unity) over the entire range of frequencies including zero (dc). Another advantage of the Op-Amp is its stability. Very high stability of the circuit is obtained. In addition to the stability, nonlinearity can be reduced, bandwidth can be improved, input and output impedances can be increased or decreased as per the circuit requirements. Another big advantage with Op-Amp is that replacing an Op-Amp does not affect circuit performance. The gain of the Op-Amp can either be positive or negative. That is either phase inversion between the output and input can be introduced or not.

Nonlinear amplifier design is also possible with Op-Amp. Proper selection of diode and capacitors can lead to the design of any type of nonlinear amplifiers. Precision rectifiers, peak detectors, peak-to-peak detectors, average value detectors or full wave rectifiers and so on can be easily be designed with Op-Amps. A high gain achievable with Op-Amp has another very important application of Op-Amp—comparators. The output of the Op-Amp changes its polarity whenever the input signal crosses zero voltage is the Zero Cross Detector. It can be converted to Level Detector when the reference voltage is changed to some other value, which is achieved by small change in bias. Comparators with Hysteresis are also to be designed with Op-Amp.

Any electronic signal processing can also be achieved with Op-Amp circuit. All types of filters viz. Low Pass, High Pass, Band Pass, and Band Stop can be designed with Op-Amps. The greatest advantage of these filters compared to the filters designed with passive devices is that these have gain and also precise frequency response can be obtained easily. They are very stable and use of inductors is eliminated. The ripple, phase, roll off of all the filters can be exactly controlled by selection of filter types—Chebyshev, Butterworth or Bessel etc. Any combinations of these characteristics are also possible with these active filters. Impedance matching either at input or output is easy.

All mathematical operations like summing, difference, multiplication, division, differentiation, integration, squaring, square root etc can be achieved with Op-Amp circuits. When nonlinear devices like diodes or transistors are used in feedback circuit of an Op-Amp circuit, logarithmic characteristics can be devised. Op-Amp circuits can solve differential equations also. In other words, Op-Amp circuit can be treated as ‘analog computer’. All types of multivibrators can be realized with Op-Amp. Flip flop or bistable multi, monostable and astable multivibrators designed with Op-Amp have superior performance when compared to transistor circuits. Power levels can be increased to any desired value with Op-Amp circuits.

Any form of signal can be generated with Op-Amp circuits. Sinusoidal, ramp, saw tooth, square, rectangular or triangular of any frequency, duty cycle, or amplitude can be designed with these Op-Amp Circuits. The step size, step period, and reset time can be independently controlled for stair case generators. Also the rise time and other parameters can be easily be controlled in case of square wave generators. All these adjustments can be done with voltage control. The Op-Amp makes voltage control of parameters much easier than is possible using discrete parts.

Op-Amp finds very wide application as regulator. Voltage regulators designed with Op-Amps can control the voltage, current or temperature very accurately. Special Op-Amp circuits designed with Op-Amps for regulator applications are referred to as Monolithic Voltage Regulators. Series pass, shunt, positive output, negative output, switching, foldback, current limited, floating, high voltage and precision regulators are few examples of regulators realized with Op-Amp circuits. In special applications, current regulators are possible. Sampling, sample & hold, analog to digital, digital to analog conversions required in digital circuit applications are few more examples of Op-Amp circuits. Modulators, demodulators, discriminators, detectors, frequency multipliers, limiters, simulators, time and phase circuits are other applications of the Op-Amp in communication engineering and allied fields.

An Op-Amp consists of several inbuilt transistors. Each transistor gain is limited to a value which is of very low of order of 100 and depends on the input and output circuit configuration. Whereas for the Op-Amp, the gain can extend to very large value tending towards infinity. The gain of Op-Amp depends on the feedback circuit involved in the circuit. Dc signals also can be amplified with Op-Amp. The bandwidth of a transistor depends on the gain bandwidth product value of the transistor amplifier circuit. Bandwidth of an Op-Amp is ideally infinity that is, signal of any frequency is amplified with same gain throughout the frequency range. The input impedance of the Op-Amp can be very large extending beyond 1 Mega ohms compared to transistor input impedance, which is of order of few kilo ohms. Similarly, the output impedance of Op-Amp can be very low even up to the order of 1 ohm whereas that of transistor is of order of hundreds or kilo ohms.

13.2 CHARACTERISTICS OF AN IDEAL OP-AMP

Operational Amplifier has very good performance with practical parameters tending towards ideal characteristics. Even though ideal parameters are not achieved in practice, it is interesting to note that nearly very satisfactory results are achieved. Thus, it is very important to understand the characteristics of an ideal Op-Amp. The following are the important characteristics of Ideal Operational Amplifier.

• Differential voltage gain, A_d is infinity.
• Common mode voltage gain, A_c is zero.
• Bandwidth is infinity.
• Input impedance is infinity.
• Output impedance is zero.
• Balanced output that is, output is zero when the same signal is applied to two input terminals.
• Parameters do not change with temperature.
• Equivalent noise is zero.
• Distortion is zero.

All the listed characteristics of the Op-Amp are for ideal case. In practical Op-Amp, all these characteristics may not be available at a time, but one can optimize the performance for given set of parameters by comprising on the remaining parameters. In a given application of an Op-Amp, all the parameters are not usually required at a time. Thus, the performance can be tuned for a particular application at the stake of the other unimportant parameters. For example, in a low noise amplifier, noise content can be made to be very low with the use of Op-Amp but the gain of the amplifier is to be compromised. Or, an amplifier designed for very large bandwidth may not give very high input impedance. Thus, optimizing all the parameters may not be possible, but it is very easy to tune the Op-Amp to perform for a set of optimum parameters.

With the characteristics of ideal Op-Amp as listed here, there are two basic rules, which can be derived, and which simplify the design of Op-Amp circuits. They are:

• Input terminals of the Op-Amp draw no current.
• Voltage across the input terminals is zero.

These two rules are by and large sufficient for design of any Op-Amp circuits. These two rules lead to concept of virtual ground. Virtual ground is a condition of short circuit between the two terminals of the Op-Amp. Fig. 13.l shows an inverting amplifier. The input is fed at inverting terminal through an impedance Z and Z_f is the feedback impedance between inverting terminal and output of the Op-Amp. The non-inverting terminal of the input is at ground potential as shown. By the first rule, the device does not draw any current and so the whole of the input current will flow through the feedback impedance to the output. Also, by the second rule, since the potential drop between the two input terminals is zero, the inverting terminal is also at ground potential. That is a short circuit between the two terminals of the input virtually. This is referred to as virtual ground. This concept eases the design of Op-Amp to very large extent. The input voltage is entirely across the impedance Z and the output voltage is entirely across the feedback Z_f and the current in the two impedances is the same. Thus, calculating gain of the amplifier is simply the ratio of Z_f to Z with a negative sign since the input is fed at the inverting terminal. The impedance between the two terminals at the input is infinity and the voltage between them is zero! This is the concept of virtual ground.

In practice the Op-Amp exhibits some offset voltages and currents. For example, the output may not be zero when same input is applied at the two inverting and non-inverting terminals of the Op-Amp. In order to improve the performance of the Op-Amp, one has to adjust these offset parameters and use the Op-Amp. To be more specific, care should be taken to reduce these offset voltages or currents to zero before use of Op-Amp in a circuit. Appropriate voltages are to be applied at the offset adjustment terminals to make the errors to be zero. Also frequency compensation is to be taken care to get the optimum performance of the Op-Amp. The IC package of Op-Amp also brings out two terminals for the power supply biasing requirements.

13.3 BLOCK DIAGRAM OF OP-AMP

The Op-Amp has various transistor stages embedded in the IC. The basic block diagram of such an Op-Amp is as given in Fig. 13.2. The first and second stages of the Op-Amp are differential amplifiers as shown in the figure. The next stage is a level translator followed by a output driving circuit. The last stage of the Op-Amp is a power amplifier.

The Differential Amplifier has two inputs and wither one or two outputs. The differential amplifier amplifies the difference of the two input signals and has very high differential gain. Two transistors are employed in this circuit of differential amplifier. The input differential impedance is large but in order to increase this value further, each transistor in the circuit can be replaced by Darlington pair. The performance of the amplifier depends on the common emitter resistance. The higher the resistance value, the higher the common mode rejection ratio achieved. Common mode rejection ratio is the ability of the circuit to eliminate common mode signals in the output and to amplify the difference signal. Thus, this biasing emitter resistance is replaced with a constant current source in order to improve gain and common mode rejection ratio. The first differential amplifier is double ended, that is, the output is delivered in two terminals. The detailed analysis of this circuit is discussed in section 13.4. The first differential amplifier determines the gain, stability, common mode rejection, bias drift, input impedance, slew rate, bandwidth and noise performance of the overall Op-Amp. Thus the design of this first stage is very critical and to be carefully handled.

The second differential amplifier of the Op-Amp is also similar to that of the first stage except that this is single ended, that is, only one terminal is available at the output. Also the design of this stage is not as critical as that of the first. Since common mode rejection is not of prime concern here, the emitter resistance can be retained while designing the amplifier for very large gain values.

The Op-Amp is to be designed for perfect balance. That is, when the same dc signal is applied to the two input terminals of the amplifier, the output should be zero and also the output should be zero when the two input terminals are grounded. This is to be ensured in the circuit of Op-Amp. Any residue of the voltages after the first two stages of amplifications is to be nullified and made zero. This is achieved by the Level Translator circuit. Since no coupling capacitor is used in the IC of Op-Amp, direct coupling is implemented. This increases the dc level of the output of each stage. In order to achieve good performance of the circuit, this dc level is to be adjusted back to zero after each stage output. If dc level is not checked, it will limit the output signal since the quiescent operating points are shifted. A simple level shifter circuit is as shown in Fig. 13.3. It is basically an emitter follower circuit. Thus it also acts as a very good buffer circuit to isolate the high differential amplifier stages with output power amplifier stages. Current mirror circuit is employed in the circuit in order to avoid attenuation of the signal. The level shifting can be given as

 

The next stage of the Op-Amp is output driver circuit. This circuit is to provide sufficient driving current, very low output impedance and wide bandwidth. This normally employs an emitter with complementary transistors as shown in Fig. 13.4. The npn transistor handles the positive output signal and the pnp transistor handles the negative output signal. This stage drives the output of the Op-Amp and the current driving capacity of this circuit should be high so that loading of the device can be avoided what the current drawn by the output circuit.

Power Amplifier stage is an optional stage at the last stage of the Op-Amp. This is provided whenever very high power at the output is required.

13.4 DIFFERENTIAL AMPLIFIER

The purpose of a differential amplifier is to provide very large amplification to the difference signal and to suppress or eliminate the common mode signal (average of the two input signals) at the output. This increases the value of Common Mode Rejection Ratio (CMRR), which is defined as the ratio of differential gain to common mode gain. Also the input impedance of the circuit should be very high tending towards several mega ohms. The basic circuit diagram of a differential amplifier employing two similar transistors is as shown in Fig. 13.5. As no coupling capacitors are employed, the gain can be achieved even at dc signals.

The drawback of using cascaded stages of amplifier circuit for achieving very good gain is that the operating point shifts with temperature since the reverse saturation current, base to emitter voltage and small signal current gain of the transistors depends on the temperature. This problem can be solved by the use of balanced differential amplifier as shown in Fig. 13.5. It is basically emitter coupled differential amplifier. Since the circuit is symmetric, it has very low drift. It can also be designed to have very high differential input impedance when the two transistors Q₁ and Q₂ are replaced by Darlington pairs. Darlington pair gives very high input impedance as already discussed in the previous chapters. The input of transistor is non-inverting terminal and the input to transistor Q₂ is inverting terminal. When the two transistors are exactly identical, since emitter resistance R_E is common and if the collector resistances were chosen same for both the transistors, the operating point of the two transistors would precisely be the same. This ensures that the dc voltage between the two output terminals of the transistors would be zero. Thus, the dc quiescent voltage between the two collector terminals will be zero and so, the coupling to next stage will not effect the quiescent point of that stage. This avoids the coupling capacitor and direct coupling can easily be incorporated without any difficulty. The output of the differential can be either double ended or single ended. In a double ended differential amplifier, the two outputs are taken from the two collectors and two more circuits are driver at the output. This is the case with first stage of Op-Amp. The outputs of two collectors drive two input terminals of the next differential amplifier. In a single ended differential amplifier, the output is taken across the two collectors as in the second stage of Op-Amp. The difference signal is applied to the load, which is level translator in this case.

If the differential amplifier is ideal, the output would be amplified version of the difference signal without any other signal appearing in the output. Thus,

 

where A_d is the differential gain of the amplifier, v_d is the difference signal and v₁, v₂ are the two input signals. But in practice no differential gives only the difference signal at the output but a common mode signal is also present in the output. The common mode signal can be given as

 

Thus the output signal can be rewritten as

 

where A_c is the common mode gain of the amplifier.

The output can also be expressed as

 

where A₁ is the gain of the first signal when the second signal is zero and similarly, A₂ is the gain of the second signal when the first signal is zero.

Therefore,

 

By definition, Common Mode Rejection Ratio (CMRR) is the ratio of differential gain to common mode gain.

 

From Fig. 13.5, for a transistor differential amplifier, the CMRR can be derived with appropriate approximations to be

 

and         A_c = [− h_fe R_c / (R_s + h_ie + {1 + h_fe} 2 R_E)]                 …(13.9)

Therefore, CMRR = A_d / A_c can be determined. It can be observed that the CMRR is directly proportional to the emitter resistance R_E. Since h_fe is large and when R_E is chosen to be very large, it can be observed that

 

It can be seen here that CMRR can be made to infinity when R_E is chosen to be infinity. But this leads to biasing limitation of the circuit. Thus, one requires very high emitter resistance with minimum biasing current for emitter. Thus, the solution to this problem is to replace emitter resistance with a constant current source (common base transistor configuration) which is adjusted to maintain the same biasing current to the emitter circuit. The current gain of a common base circuit is approximately unity and it has low input impedance and very high output impedance. Thus, it is the best choice in these type of circuits. Such a circuit incorporating constant current source is as shown in Fig. 13.6. The CMRR of this circuit is very high and is best suited as the first stage of Op-Amp.

13.5 ERROR VOLTAGES AND CURRENTS

The Op-Amp performance can tend towards ideal characteristics but achieving ideal situation is bleak. In practice, there are some error voltages and currents attached with the Op-Amp. These errors are to be compensated before the use of the device in a given circuit for optimum performance of the Op-Amp in the circuit. The dc parameters of importance in this context are:

• Input Bias Current is the average current of the input terminals to balance the OP-Amp. In other words it is half of the sum of input currents when the output voltage is zero. Thus,

   

  I_b = ½ (I₁ + I₂)∣_{vo = 0}                 …(13.11)

  Ideally this current should be zero so that it will not the feedback incorporated into the circuit. Its value is of order of nA or pA in practical amplifiers.

• Input Offset Current is difference in the input currents of a balanced Op-Amp. There is difference in the currents drawn by the Op-Amp between the two terminals. Thus, the difference of the two input currents when output voltage is zero is defined as the input offset current.
  
  
  

  Fig. 13.6 Differential amplifier with improved CMRR

  This value also should be ideally zero and is of order of few to several hundreds of nA.

• Input Offset Current Drift is the ratio of change in Input Offset Current to the change in temperature.
• Input Offset Voltage is the voltage that has to applied between the two terminals of the Op-Amp in order to make the Op-Amp balanced. Thus,
  

  By definition of balanced condition, the output voltage should be zero when both the input terminals are at ground potential. Thus, ideally V_io should be zero and in practice it is of order of few mV.

• Input Offset Voltage Drift is the ratio of change in Input Offset Voltage to the change in temperature.
• Output Offset Voltage is the voltage at the output of the Op-Amp when the two input terminals are at ground potential. Ideally this should be zero.
  
• Power Supply Rejection Ratio (PSRR) is the ratio of change in input offset voltage to the change in power supply voltage. In general, it is expressed as µV/V or dB. The change in V_io is very small compared to power supply voltage and so this parameter is very small. This gives the ability of the Op-Amp to reject the changes in power supply voltage variations. Very small values of PSRR are preferred. If the Op-Amp has poor PSRR, care should be taken in the power supply requirements of the Op-Amp and it should very stable and highly regulated.

13.6 AC PARAMETERS OF OP-AMP

The ac parameters of interest with respect to Op-Amp are:

• Voltage Gain is a parameter which is often referred to as open loop gain and is specified at dc. It is the ratio of change of voltage at the output to the change of voltage at the input of the amplifier. Differential voltage gain at dc is the ratio of output voltage to the voltage between the two input terminals. Common mode voltage gain is the ratio of output to the input when the same signal is applied between the two terminals of the input.
• Frequency Response: The bandwidth of an operational amplifier is infinite ideally. In practical op-amp circuits the gain decreases at high frequencies because of the effect of inter electrode capacitances of the transistors used for the construction of an operational amplifier. Fig. 13.7 gives the equivalent circuit of an Op-Amp at high frequencies taking the effect of inter electrode capacitances.

C in the figure represents the effect of all capacitances. From the circuit by voltage division,

The gain of the amplifier considering the load can be derived to be

Where f_H = ½pR_oC is the corner frequency or cut-off frequency of the operational amplifier. The magnitude and phase angle of the transfer function can be written as

The values of the normalized magnitude and phase angles for different values of f/f_H are shown in the following Table 13.1.

 

From Table 13.1, it can be noted that at low frequencies, the gain remains constant and decreases as the frequency increases. At f = f_H the gain falls by 3dB. Thus, f_H is called as corner frequency or cut-off frequency. Similarly the phase angle changes from 0 to −90 as the frequency increases from 0 to ∞. These two responses are plotted in Fig. 13.8.

If the bandwidth required is of high value and closed loop gain is low, compensation techniques are used to achieve these two requirements. Compensation can be provided externally or internally to an Op-Amp. External compensation is of two types named as dominant pole compensation and pole-zero compensation technique. In dominant pole compensation, a pole is introduced into the transfer function of the Op-Amp. This newly introduced pole will decide the bandwidth of Op-Amp and hence reduces the value drastically. This compensation is used in low-bandwidth applications. In case of pole-zero compensation technique, a new pole and zero are introduced into the transfer function. The new pole decides the bandwidth of Op-Amp. Fig. 13.9 gives the basic circuits that are used to provide external compensation.

• Bandwidth of Op-Amp can be defined in different ways. They are:
  • 3dB Bandwidth is the frequency at which closed loop voltage gain of the amplifier is 3dB down. In general, closed loop gain is of interest rather than the open loop gain. The bandwidth in an Op-Amp is the upper cutoff frequency since the lower cutoff frequency of an Op-Amp is zero as the Op-Amp operates from dc voltages (zero frequency).
  • Unity Gain Cross Over Frequency is the frequency at which the gain of the amplifier is unity (0dB). Since the lower cutoff frequency of Op-Amp is dc (zero), this also gives the bandwidth at which the gain falls to unity.
  • Unity Gain Rise Time is similar to unity gain cross over gain except that the gain is not measured directly but the small signal rise time calculated for the noninverting unity gain and bandwidth is calculated (0.35/rise time).
  • Full Power Bandwidth is defined as the maximum frequency at which an undistorted sine wave can be available at the output of Op-Amp. This is usually 10 to 100 times lower than unity gain cross over frequency.
• Slew Rate is the slope of the triangular waveform at the output of Op-Amp when the Op-Amp is overdriven by input high frequency sinusoidal signal. When frequency at the input is increased to very large extent, the output signal appears as triangular form. The slope of this waveform is slew rate and is measured as volts per second. Very high slew rates are required in design of Op-Amp circuits since this ensures large bandwidth of operation. Slew rate limiting is characterized by definite flattening on some portion of the sine wave. This flat portion is due to the constant current source charging a capacitance. Slew rate is higher for higher gain circuits. Thus, input signal can be reduced to decrease this effect. In some cases, the compensation capacitor may be too large and some other compensation technique may be used.
• Input impedance is either differential or common mode. Differential input impedance is the between two terminals of Op-Amp while the common mode input impedance is between either of the input terminals to the negative power supply terminal. Differential input impedance is an important parameter but the common mode input impedance is not specified in general. The differential input impedance is of order of several mega ohms. The effect of common mode input impedance on the circuit is so small that it is usually not considered. The effect of differential input impedance can also be neglected unless its value is very small of order of l0K or less.
• Input Capacitance is of two types—Common mode and differential capacitances. The effect of these parameters on the inverting amplifier is very small such that they are never considered. The typical values of both the capacitances are of the order of 1 to 2pF and a maximum of 3pF. At high frequencies, the common mode capacitance may have some effect of attenuation. The only way out is to choose Op-Amp with low common mode input capacitance values.
• Output Impedance of Op-Amp is often very small. In inverting amplifier configuration when feedback is employed, the effective output impedance is further reduced since it is divided by feedback factor times the voltage gain. So, there is no effect in the mid range of frequencies, but when the frequency of operation tends towards the cutoff value, the voltage gain falls and the output impedance may seem to be increasing.
• Equivalent Input Noise affects the dc as well as ac performance of the Op-Amp. Op- Amp manufacturer specifies the noise content up to range of 1 MHz of frequency. The noise generation in the Op-Amp is not at a specified point but to simplify noise calculations, it is specified as equivalent input noise voltage or current.
• Output Voltage Swing indicates the value of positive and negative saturation voltages of Op-Amp. These will never exceed the supply voltage.
• Transient Response characteristics are rise time and overshoot. These parameters are important in selection of Op-Amp when used for ac applications. Rise time is of order of 0.3ms and overshoot is 5 percent.

13.7 MATHEMATICAL COMPUTATIONS USING OP-AMP

There are numerous applications of Op-Amp in various fields. The most important is mathematical computations. Almost all mathematical operations can be performed using an Op-Amp. Any mathematical problem can be solved using Op-Amp. In other words, Op-Amp circuits can be referred to as Analog Computer. In this section, few of the mathematical operations that are possible with an Op-Amp are discussed.

1. Inverting Amplifier: amplifiers are the basic fundamental application of Op-Amp. In most analog circuits, the basic building block is the inverting amplifier. Inverting amplifier is where the input signal is amplified to the extent required with a 180° phase shift between the input and output signals. The input signal is applied at the inverting terminal of the Op-Amp and the non--inverting terminal is at ground potential as shown in Fig. 13.10. The various names of such a circuit are Inverting mode amplifier, phase inverter, and inverter.
   

   Fig. 13.10 Inverting Amplifier

   Assuming ideal Op-Amp, the output of the above circuit can be given as

    

   V_o = [ − R_f /R ] V_i                 …(13.19)

   Thus the gain offered by the amplifier is −R_f/R, independent of Op-Amp. The negative sign indicates the phase difference between the input and output signals. The gain offered by the circuit depends on the two resistances and so by choosing these two resistances properly, any gain can be easily achieved. A series resistance R_c may be added between the non-inverting terminal and ground which would compensate any offset errors present in the Op-Amp.

   

   Fig. 13.11 Non-inverting amplifier

2. Non-inverting Amplifier. Non-inverting amplifier amplifies the input signal applied to its non-inverting terminal. There is no phase difference between the output and input signal. The gain can once again be controlled by the feedback and input resistances. The circuit diagram of such an amplifier is as shown in Fig. 13.11. The output voltage of the circuit may be derived to be

    

   V_o = [1 + (R_f /R)] V_i                 …(13.20)

   Thus the gain offered by the circuit is 1 + (R_f / R). A resistor R_c may be added between the inverting terminal and the node of R and R_f in order to compensate for any offset errors, if any.

3. Summing Amplifier: The input of the ideal Op-Amp is infinity and so it draws no current and all the current is diverted into the feedback circuit. Fig. 13.12 is an example of summing amplifier. In this configuration, the output is proportional to the sum of all the signals at the input. The current in the feedback resistor R_f is sum of all the currents delivered by various input signals. Thus, the output voltage is R_f times the sum of all these currents. The output voltage of the circuit can be derived to be

    

   V_o = −R_f [V₁/R_l + V₂/R₂ + V₃/R₃]                 …(13.21)
   

   Fig. 13.12 Inverting summing amplifier

   In the above circuit, it can be observed that output is the inverted version of input. If R₁ = R₂ = R₃ = R_f, then the output voltage will be V_o = −(V₁ + V₂ + V₃). This summing can be extended to any number of inputs for an ideal Op-Amp but is limited by the fan-in capacity of the Op-Amp in practice. If one does not require the phase shift between the output and input signals, the non-inverting summing amplifier is as shown in Fig. 13.13. The output of such a circuit is

   
   

   Fig. 13.13 Non-inverting summing amplifier

4. Difference Amplifier: Difference amplifier amplifies the difference of the input signals. The two signals whose difference is applied to the non-inverting and inverting terminals of the Op-Amp is shown in Fig. 13.14. This figure has the wieghtage to be equal and so the output is simply the subtraction of the two signals. So, it can be referred to as subtractor. The wieghtage to the signals can be adjusted with the help of proper selection of the input and feedback resistances. Even Adder-Subtractor can be realized when all the signals to be added are fed in at non-inverting terminal and all the signals to be subtracted are fed at the inverting terminal. By choosing proper input resistance of each signal and the feedback resistance, even a simple mathematical equation employing addition and subtraction can be easily realized.
   

   Fig. 13.14 Subtracting amplifier

5. Scale Changer: If the inverting amplifier, feedback and the input resistors R_f and R are chosen to be pure precision resistors in Fig. 3.10, the output is multiplied by a factor, −k = −R_f /R. Thus the input signal is changed by scale equal to the constant −k.
6. Phase Shifter: Whenever one requires a phase shift of required phase angle, the input and the feedback resistors can be replaced by impedances in the circuit of Fig. 13.10. If the magnitude of the two impedances is chosen to be equal but differing in phase angle, the required phase shift can be achieved. Phase angles of any desired value between 0° and 360° is possible.
7. Voltage Follower: Common collector configuration of transistor acts as a buffer circuit providing high input impedance and low output impedance. In order to improve these impedances further, Darlington pair is at rescue. But, in some applications further improvement in these two impedances are required. That is, the input impedance should tend towards infinity (of order of hundreds of mega ohms) and output impedance towards zero (of order of one or two ohms) with a voltage gain of unity. This can be best achieved with Op-Amp circuit. Non--inverting amplifier is with R_f zero and R infinity. Such a circuit is known as Voltage Follower and is as shown in Fig. 13.15. This gives unity gain with very high input impedance and very low output impedance.
   

   Fig. 13.15 Voltage follower

8. Integrator: When the feedback resistor of the inverting amplifier is replaced with ideal capacitor, the circuit works as a good integrating circuit. The circuit is as shown in Fig. 13.16.
   

   Fig. 13.16 Integrator

   The current in the input circuit is

    

   i = V_i /R                 …(13.23)

   The same current flows in the feedback capacitor C and thus

    

   V_i /R = − C(dV₀ /dt )                 …(13.24)

   Or,

   V_o = − (1/RC) ∫ V_i dt                 …(13.25)

   So, the output voltage is the time integral of the input signal. Thus, this circuit acts as very good integrator. This circuit is also a basic Low Pass Filter, which allows signals at low frequency to pass through with minimum attenuation and suppresses the high frequency signals above cutoff frequency with very high attenuation. If the circuit is used with variable frequency input, it acts a low pass filter and if the circuit is used at a given frequency, it is a very good integrating amplifier.

9. Differentiator: When the positions of resistor and capacitor in Fig. 13.16 are interchanged as shown in Fig. 13.17, a differentiator or High Pass Filter results.
   

   Fig. 13.17 Differentiator

   The current in the capacitor is C(dV_i /dt) and the same current is flowing the feedback resistor and thus equating the two,

    

   V_o = − (RC)(dV_i /dt)                 …(13.26)

   The Eq. (13.26) shows that the above figure differentiates the input signal. This circuit is very good high pass filter passing signals of frequencies above cutoff frequency and suppressing the frequencies below it.

10. Logarithmic Amplifier: Logarithmic applications are many in number. Whenever the signal is to be compressed or whenever multiplication or division of different signals is required, logarithmic amplifier is very much amplifier. These amplifiers are basically non-linear. Anti logarithmic amplifiers are inverse of logarithmic amplifiers and they are expanders of the input signal. In mathematical operations like multiplication, division, square root and so on, these are very widely used. The voltage-current relationship of a diode is taken into consideration while designing the logarithmic amplifier. The basic V-I equation of a diode is given as

     

    I = I₀ (e^V/ ^{η V}T − 1)                 …(13.27)

    Or,

    V = η V_T (ln I − ln I₀)                 …(13.28)

     

             ≈ η V_T ln I      since I >> I₀                 …(13.29)

    The basic logarithmic amplifier is as shown in Fig. 13.18. The feedback resistor R_f of the basic inverting amplifier is replaced by the diode. Thus the voltage across the diode is given by the Eq. (13.29) and thus from the principle of the Op-Amp, the output voltage can be derived as

     

    V_o = − ηV_T ln (V_i/R)                 …(13.30)

    Thus the output of the circuit is proportional to the natural logarithm of the input signal.

    

    Fig. 13.18 Logarithmic Amplifier

    The above Circuit is temperature dependent since both η and V_T are temperature dependent variables. The circuit can be made temperature independent by use of matched diodes, two Op-Amps, a thermistor and a temperature independent current source.

    When the positions of the resistor and diode are interchanged in the circuit of Fig. 13.18, an anti logarithmic amplifier results as shown in Fig. 13.19.

    

    Fig. 13.19 Anti Logarithmic amplifier

11. Multiplier: Multiplying two signals can be easily achieved with logarithmic and anti logarithmic amplifiers. The two signals to be multiplied are applied to log amplifiers. These two signals are added in a summing amplifier circuit. The output of this circuit is applied to anti logarithmic amplifier. The output of this anti log amplifier is the multiplication of the basic signals. The block diagram of the multiplier circuit is as shown in Fig. 13.20.
    

    Fig. 13.20 Multiplier

12. Divider: When summing amplifier of the multiplier circuit is replaced with a subtracting circuit, a good divider circuit results as shown in Fig. 13.21.
    

    Fig. 13.21 Divider

13.8 CONVERTERS AND COMPARATORS

There are lot many applications of Op-Amp. Of these, converters and comparators are very popularly used in many electronic circuits. Some of these are discussed in brief in this section of the chapter. There are large Converters in many electronic circuit applications. Some of them are voltage to current (transconductance amplifier) and current to voltage (transresistance amplifier). Similarly, there are a number of types of Comparators (also referred to as Detectors). They are: Inverting and non-inverting zero crossing detectors, detectors with Hysteresis (Schmitt Trigger circuits), inverting and non-inverting level detectors and so on.

CONVERTERS

Voltage to current converter (Transconductance Amplifier): Transconductance amplifier is an amplifier with input parameter as voltage and output parameter as current. In other words, it is a device, which converts voltage to current. The basic circuit configuration of such a converter is as shown in Fig. 13.22.

In Fig. 13.22 (a), the load is floating and the current through this load can be derived as

 

That is, the output current is the function of input voltage. Since there exists a virtual ground between the two input terminals of the Op-Amp, the inverting terminal voltage is the same as that of the non-inverting terminal, V_i. Also from the figure, it can be seen that the current in the load impedance and the resistor R is the same. Since the load is not grounded in this circuit, it is not very useful in many applications. Fig. 13.22 (b) shows a circuit with one end of the load at ground potential.

 

	IL = I1 + I2 = (V1 − Vi /R + (V0 − V1)/R	…(13.32)
Or,	V1 = (Vi + V0 − ILR)/2	…(13.33)

Since the gain of the non-inverting amplifier is 1 + R/R = 2, the output voltage is given as

 

	V0 = 2 V1 = Vi + V0 − ILR
Thus,	IL = Vi/R	…(13.34)

Current to voltage converter (Transresistance Amplifier): A Transresistance amplifier is reverse to the transconductance amplifier. Here, the input parameter is current and the output parameter is voltage. The basic circuit diagram of such a current to voltage converter is as shown in Fig. 13.23. The principle of operation of the circuit is self-explanatory. The output voltage is

Thus the output voltage is a function of input source current.

COMPARATORS

Zero crossing detector and Level detector: Zero crossing detector is also called zero crossing comparator or zero level detector. Basically there are two types of these detectors. They are Inverting and Non-inverting types. A zero crossing detector compares the input voltage to zero voltage and the response of this circuit is the output can be only two voltages (states). In inverting mode, the output voltage will be positive saturation voltage (+V_cc) when input voltage is less than zero and the output voltage is negative saturation voltage (−V_cc) when the input voltage is more than zero voltage. Thus, the output voltage changes between positive saturation and negative saturation whenever the input voltage crosses zero voltage level. Whatever be the shape of input voltage, the output voltage is always rectangular switching between +V_cc and −V_cc. Thus, one can convert a sinusoidal voltage to square with such a circuit. In inverting mode, there would be a phase shift between the input sinusoid and output rectangular but both the signals can be made to be in phase when the zero crossing detector is in non-inverting mode. In this non-inverting mode, the output is +V_cc whenever the input signal voltage is more than zero and the output voltage will be −V_cc whenever the input voltage is less than zero. The circuit diagram for the two types of the zero crossing detectors is as shown in Fig. 13.24.

The explanation of these circuits can be easily understood without any expression for the output. The output is always at saturation voltage. This polarity of this saturation voltage is determined by the voltage difference between the two input terminals of the Op-Amp. If the non-inverting terminal potential is at more potential compared to inverting terminal voltage, the output is positive and if the non-inverting terminal is at less potential compared to inverting terminal, the output is negative. The above two circuits can be converted to Level Detector when a reference voltage source is connected in series with the other terminal and the ground. That is, in case of inverting type, the reference voltage is applied at the non-inverting terminal and in case of non-inverting type, the reference voltage is applied at the inverting terminal. In this case, the switchover of the output voltage is not on the zero voltage but on the reference voltage magnitude. The reference voltage may be positive or negative. The input voltage is compared to reference voltage and in case of inverting type, when the input voltage is less than the reference voltage the output is +V_cc and whenever the input voltage is more than the reference voltage, the output is −V_cc. The logic may be reversed in case of non-inverting type. The input-output characteristic of zero crossing detector and level detector is as shown in Fig. 13.25.

If one requires the output voltage to be different than the saturated Op-Amp voltage V_cc, two zener diodes in series opposing across the output can be connected as shown in Fig. 13.26.

In the inverting level detector in Fig. 13.26, the output depends on the zener voltages of diodes Z₁ and Z₂. The resistance R₁ is so chosen that the current does not exceed the rating of the zener diodes. The output voltage can be given as

where V_d is the cutin voltage of the diode which is forward biased.

Comparators with Hysteresis: In the above discussion, the Op-Amps are assumed to be ideal. But, in practice, they are not so and there are several errors and noise which are to be compensated to achieve good performance of the comparators. The first and foremost error is the input current. The bias and input offset currents cause errors in the performance of the circuit and so these errors have to compensated. This can be done by adding a compensation resistor in the other terminal of the input to reduce the input currents to large extent.

Another problem is the switching time from one state to the other. This is not instantaneous and depends on the slew rate of the Op-Amp. The switching speed cannot be made faster than the slew rate of the Op-Amp.

The Op-Amp comparator has a drawback of Chatter. If the input voltage has noise of significant magnitude, the output may switch between the two states several times before the final decision is made. This can be avoided by introducing Hysteresis into the circuit. Hysteresis will also help to improve the switching speed of the circuit. Such comparator with hysteresis is referred to as Schmitt Trigger Circuit. All types of comparators can be realized with hysteresis of which only inverting zero crossing detector with hysteresis is considered in this discussion. The same principle can be extended to other circuits also.

Comparators with Hysteresis work on the same principle as circuit without hysteresis except that the change between the two states do not occur at the reference voltage but at voltage slightly above and below the reference voltage as defined by the circuit. The change of the states does not occur at the same reference level but it depends on the input voltage change whether is increasing or decreasing. The change of the state occurs at a voltage known as Upper Threshold Point when the input voltage is small and increasing to cross the reference voltage. The change of state occurs at a different voltage known as Lower Threshold Point when the input voltage is more and decreasing to cross the reference voltage. Thus the input-output characteristic of the comparator exhibits hysteresis and is as shown in Fig. 13.27. Fig. 13.28 shows the circuit of inverting zero crossing detector with hysteresis.

When the input voltage is very small, below zero, the output of the circuit will be at positive saturation voltage V_cc. Now, the voltage across the resistor R₂ and the reference voltage is not zero, but

 

So, when the input voltage increases from a voltage far below zero towards positive value, it does not change its state at zero voltage reference, but at UTP (Upper Threshold Point) from positive to negative saturation value. Beyond this point, the output voltage remains at positive saturation voltage. When the input voltage is very high well above zero, the output voltage is at negative saturation voltage −V_cc and the voltage across the resistor R₂ is not the same as the previous case and is given as

 

Thus the reference voltage is as given by Eq. (13.38) and the change of the state does occur at LTP (Lower Threshold Point) from negative to positive saturation value. This state continues even as the input voltage drops far below the LTP. Thus, the reference point is not the same for increasing voltage and decreasing voltage. This is the concept of hysteresis.

The noise present around the reference voltage (zero in this case) does not affect the performance of the detector since the circuit does not respond at zero voltage but at either above or below this reference. The delta change of voltage can be designed based on the noise level present in the input voltage by selecting the values of the resistors R_l and R₂ appropriately.

13.1    Find the CMRR of the differential amplifier assuming operational amplifier as an ideal one.

Solution    Let V_a and V_b be the voltage at nodes a and b respectively.

KCL Node ‘a’

KCL at Node ‘b’

Because of virtual ground concept, V_a = V_b.

∴ From (1) and (2),

 

            91(0.99 V₂) = V_o + 90 V₁.

                  90.9 V₂ = V_o + 90 V₁

                         V_o = 90 V₁ + 90.09 V₂                         (3)

If V_c and V_d are the common mode voltage and differential mode voltages, then

equation (3), becomes,

	Vo =
	=  45.00 × 10−3 Vc + (−90.045) Vd
	=   Ac Vc + Ad Vd
where	Ac  =  common Mode gain = 45.00 × 10−3.
	Ad  =  differential mode gain = −90.045

CMRR in decibels = 20 log (2001) = 66.024

13.2    For a differential amplifier gain = 1000, under differential mode of operation, CMRR = 10⁶. Calculate output voltage V_out when v₁ = 1.1 mV and v₂ = 1.0 mV.

Solution    Differential mode signal, v_d = v₁ − v₂ = 0.1 mV.

Common mode signal,

Differential mode gain A_d = 1000

CMRR, ρ	= 106.
Output voltage Vo	=
	= 0.1(1 + 10.5 × 10−6)
	= 100.00 mV.

13.3    A differential amplifier has inputs v₁ = 100 mV and v₂ = 90 mV. It has a differential mode gain of 40 db and a CMRR of 70 db. Find the percentage error in the output voltage and the error voltage.

Solution

 

	Given that v1	=	100 mV, v2 = 90 mV.
	Ad	=	40 db ⇒ Ad = 100
	CMRR db	=	70 db ⇒ CMRR = 3162.27
	For an ideal, differential amplifier
	Vo	=	Ad (v1 − v2)
		=	100 (10 mV)
		=	1 V.

Error voltage = V_op − V_o = 3.004 mV

13.4    Find the closed loop gain v_o/v_s of the circuit shown in the figure below.

Solution    Writing KCL at node ‘a’, making v_s1 as active one.

Since v_a = 0, because of virtual ground concept,

Making V_s2 as active one, and killing rest of the sources, the circuit will be KCL at node ‘a’

Since v_a = 0, v_o2 =

Similarly, making v_s3 as active one, and killing rest of the sources

According to super position theorem

 

13.5    Find the output v_o of the circuit assuming op-amp as an ideal one.

Solution    Let V_a, V_b, V_c be the node voltages as shown in the figure. Writing KCL at node ‘a’

Since V_a = 0.

Writing KCL at node ‘c’

Since V_c = 0, because of virtual ground

∴ From (1) and (2),

13.6    Find the expression for load current i_L in the circuit shown below.

Solution    Writing KCL at node ‘a’

Similarly from KCL at node ‘b’

But load current

from (1),          V_o = 2V_a − V_s = 2 V_b − V_s.

13.7    A non-inverting amplifier is as shown in the figure. The open loop gain A_v = 40000, applied input voltage V_s is +1 V average d.c with an a.c sine wave component of 0.4 V peak-to-peak. Calculate a) closed loop gain A taking A_v into account (b) output voltage v_o under d.c and a.c conditions (c) A under the condition that A_v = ∞.

Solution    The circuit can be rearranged as

1. For a non-inverting op-amp, there exists voltage-series feed back connection. Applying voltage-division rule
   
   

   and v_o = A_v (V₁ − V₂)

   
   

   From (2),

   
2. Substituting A_v = ∞,
   
3. We have

   given v_s = + 1 V d.c

                  = 0.4 V a.c peak-to-peak.

   Gain A = = AV_s = 4.993 V d.c = 1.9997 V a.c

13.8    For a particular op-amp the following are the specifications. I_CQ = 10.5 μA, C_c = 40 pF. Amplitude of the input signal is V_m = 15 V. Find the slewrate, maximum bandwidth.

Solution

13.9    An op-amp has a slew rate of 0.6 V/μs. Determine the highest possible operating frequency for each of the following peak values of o/p voltage (a) 0.2 V (b) 0.6 V (c) 1 V (d) 2 V.

Solution

1. 
2. 
3. 
4. 

13.10    For an a.c integrator R₁ = 20 KΩ, R_f = 47 KΩ and C = 0.1 μF. Find the 3db cutoff frequency.

Solution    An a.c integrator circuit is shown below.

3db Frequency is

13.11    A step signal is given as an input to an integrator. Find the output voltage assuming op-amp as an ideal one if R₁C_f = 1

Solution    Given that V_s = 5    0 < t < 4

The output voltage is shown below.

13.12    For the Schmitt trigger circuit shown in the figure below, R₁ = 500 Ω. R₂ = 1500 Ω. Saturation voltages are at ± 14 V. Find upper and lower threshold voltages and hysterisis voltage.

13.13    Find the value of R in the circuit shown below. If v₁ and v₂ are amplified by the same amount. Assume op-amp as an ideal one.

Solution    When V₁ is acting, V₂ is made inactive. The circuit acts like an inverting amplifier.

when V₂ is acting, V₁ is made inactive, the circuit acts like a non-inverting amplifier.

From (1) and (2), gain values to be equal.

13.14    Realize the following mathematical equations using operational amplifier

1. V_o = 5V₁ + 4V₂ + 6V₃
2. V_o = ∫v₁dt + ∫v₂dt + ∫v₃dt

Solution

1. First equation represents an adder circuit with gains 5, 4, 6, taking v₁, v₂, v₃ as inputs.

   To realize the given equation, we realize the circuit for − 5V₁ − 4V₂ − 6V₃ and then

   

   use an inverter.

   To invert V_o1, we design an inverting amplifier with a gain unity.

   

   ∴ The final circuit will be,

   
2. V_o = ∫V₂dt + ∫V₂dt + ∫V₃dt

   The above expression represents assuming Integrator

Assume RC = 1. It can be shown that V_o1 = −∫V₁dt + ∫V₂dt + V₃dt. Giving V_o1 as an input to inverting amplifier.

13.15    Derive the expression for gain v_o/v_i of the circuit shown below.

Solution    From the circuit,

Since it is a non-inverting amplifier

13.16    Derive the transfer function of the circuit shown in the figure.

Solution    The circuit can be drawn as

We have,

13.17    Find the input impedance V_s/I_s of the circuit shown

From the circuit

Writing KCL at non-inverting terminal,

13.18    Find the output waveform if a sine wave of 2 V peak and 200 hZ frequency is applied to a differentiator circuit. Assume C = 10 μF and R = ΚΩ.

Solution    Given input signal v_s = 2 sin 2π(200) t.

The input and output waveforms are shown in figure.

13.19    Find the expression for output voltage V_o if the applied input is a sweep voltage v_i = At.

Solution    Writing KCL at node ‘a’

Because of virtual ground concept, v_a = 0.

In S-domain,

Taking Inverse Laplace transform for V_o(s),

 

13.1 A difference amplifier has inputs V_s1 = 10 mV and V_s2 = 0.9 mV. It has a difference mode gain of 60 dB. If the CMRR of the amplifier is 80 dB, find the percentage error in the output and error voltage. Derive the expression that is used in this problem.

 

13.2 The circuit shown is a differential amplifier with ideal Op-Amp. Find the output voltage and show that the output corresponding to common mode voltage is zero when R′/R = R₁/R₂.

13.3 A differential amplifier has inputs V_i1 = 10 mV and V_i2 = 12 mV. It has differential gain of 60 dB and CMRR of 80 dB. Find the error in the output and output error voltage. If the CMRR is made to be 100dB, what is the change in the error?

 

13.4 Design an Op-Amp with gain of −10 and input resistance of 10K.

 

13.5 Derive the expression of ideal Op-Amp for the closed loop gain as shown in the figure.

13.6 Find the output voltage of the following circuit.

13.7 A differential amplifier uses similar transistor with h_ie = 1k, h_fe = 100, V_cc = V_EE = 10V, R_s = lK, R_c = 4K, R_e = 5K. Determine A_d, A_c and CMRR.

 

13.8 Design an inverting amplifier of gain − 7 and a non-inverting amplifier of gain 11.

 

13.9 Find the value of V₀ if CMRR = 120dB for the circuit shown below.

13.10 Realize the following mathematical equations using operational amplifiers

1. V_o = V₁ + 4V₂ + 7V₃
2. V_o = dV₁/dt + dV₂/dt + 3dV₃/dt
3. V_o = V₁ + 3V₂ + 4dV₃/dt

13.11 For a 741 operational amplifier the following are the specifications. I_CQ = 7.5microamp C_c = 30pF. Amplitude of the applied signal is 10V. Determine the slew rate, maximum frequency of operation for the above slew rate.

 

13.12 Determine the component values for the Schmitt trigger circuit using 741 Operational amplifier if UTP = 5.6V and LTP = 0.6V.

 

13.13 Express output voltage in terms of input voltage for the following circuit

13.14 Find the expression for gain transfer function of the circuit shown below.

13.15 Find the input impedance of the circuit shown below.

1. Draw the circuit diagram of a practical logarithmic using Operational amplifier and derive the expression for its output voltage.
2. Explain the terms (i) Input offset current, (ii) CMRR, (iii) Output offset voltage, (iv) Slew rate and (v) PSRR.
3. Illustrate how Op-Amp can realize differentiator, current to voltage converter and logarithmic amplifier.
4. Derive the expression for the output of a differential amplifier as a function of CMRR.
5. Explain the importance of CMRR and slew rate for an Op-Amp.
6. What are various characteristics of an ideal Op-Amp? Discuss in detail.
7. Give the circuit diagram and explain the operation of (i) voltage to current converter and (ii) constant current source using Op-Amp.
8. Draw the circuit diagram of a voltage follower and explain its operation and its application.
9. Draw the circuit diagram of differential amplifier using transistors and determine its CMRR.
10. Explain the following applications of Op-Amp with the help of circuit diagram: (i) Integrator and (ii) Summing Amplifier.
11. Define several offset voltages and currents of a practical Op-Amp. Give the source of each parameter.
12. Realize the function V_o = 2V₁ + 3V₂ − 4V₃ using Op-Amp and resistors.
13. List the characteristics of Ideal Op-Amp and explain the significance of these characteristics. What are the limitations of these in practical Op-Amp devices?
14. Draw the basic internal block diagram of the Op-Amp and explain each block in detail.
15. Derive the equation for CMRR of a transistor differential amplifier.
16. Why is a constant current source used in a differential amplifier? Explain.
17. What are various error voltages and currents possible in a practical Op-Amp? Explain each in detail.
18. What is significance of PSRR? Give its details.
19. What is unity crossover frequency? What are the other bandwidth definitions with respect to Op-Amp?
20. What is slew rate? What is its significance?
21. How is multiplication of two signals possible with Op-Amp? Draw the block diagram and explain in detail each block.
22. Draw a circuit using Op-Amp, which can differentiate the input signal with respect to time and explain its operation.
23. Draw the basic circuit diagram of a low pass filter using Op-Amp. It can also perform one mathematical operation. What is that? Explain.
24. Draw a circuit of zero crossing detector and explain why Hysteresis is to be introduced in the circuit.
25. What is Transresistance amplifier? Draw its circuit and explain its operation.