In low-power embedded systems, the hardware design must include the possibility to power on/off peripherals using a GPIO pin. This is better done using a line that is normally low, so that it can be pulled down using passive components when the GPIO is not driven by the microcontroller. MOSFETs are often used to control the power supplied to external peripherals, using a GPIO signal to control the gate voltage.

Even when peripherals are turned off by interrupting their power source line, smaller currents may leak through other signals connected to them, such as a serial bus or other control signals. The hardware design must be able to detect and identify these leakages in early prototyping stages in order to minimize the energy lost this way.

Additionally, if the power-saving strategy includes the possibility to put the microprocessor in a deep-sleep operation mode, input signals' logic must be tailored to provide the correct wake-up events to resume the normal operation. Signals that might not be driven while in sleep mode must maintain a known logic value enforced through passive components.