Memory model and address space

The total amount of available addresses depends on the size of memory pointers. 32-bit machines can reference a contiguous memory space of 4 GB, which is segmented to host all the memory-mapped devices in the system. This may include:

  • Internal RAM
  • Flash memory
  • System control registers
  • Components internal to the microcontroller
  • External peripheral bus
  • Additional external RAM

Every region has a fixed physical address that may depend on the characteristics of the platform. All the locations are hardcoded, and some of them are platform-specific.

In the ARM Cortex-M, the total addressable space is divided into six macro regions. Depending on their purpose, the regions have different permissions, so that there are areas of memory that can only be accessible for read operations at runtime, or that are not allowed to execute in place. These constraints are implemented in hardware, but might be configurable at runtime on microcontrollers that include an MPU:

The ARM Cortex-M address space

In general, only small sections (of the same size as physical components) are mapped within these regions. Trying to access memory that is not mapped to any hardware triggers an exception in the CPU. When approaching a target platform, it is important to know the locations and the sizes of the memory sections corresponding to the hardware on board, in order to properly describe the geometry of the available address space in the linker script, and in the source code.

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