Digital storage oscilloscopes 125
acquisition was transferred to the display memory. (Glitch
capture is an important topic to which I shall return later.)
This arrangement provides stable, triggered viewing of a
recurrent waveform while retaining the latest acquisition of that
part of the waveform (between c and d in Figure 7.4) which was
not displayed. But in fact, while entirely feasible, few if any DSOs
appear to offer this facility, any information occurring on that
part of the waveform not appearing on the screen in refreshed
mode being lost. This is more important than might appear at first
sight, for the following reason. The non-displayed part of the
waveform may be likened to that occurring during the retrace or
flyback time in a real-time scope. Now, in the latter, the flyback
time may amount to only a few per cent of the sweep time
(though it can be deliberately extended with hold-off), while in a
DSO the dead time between sweeps may amount to as much as
several times the sweep time itself, especially if the instrument
uses a not very powerful microcontroller, or there is a lot of
processing to do while transferring data from the acquisition
memory to the display memory.
While
refreshed
or
recurrent
mode is useful for waveforms too
fast to be satisfactorily viewed in roll mode, there is a limit to how
short a time/div setting it can support while capturing the
waveform continuously in the way we have considered so far.
Consider, for example, a DSO with an ADC which takes 100 ns to
convert a sample of the input waveform to the corresponding
digital representation, limiting the sampling rate to 10Ms/s.
Assume the acquisition and display memory each have 1024
points as in the earlier example. Then with 1000 points for the 10
horizontal graticule divisions, there will be 100 display points per
division and with 100 ns minimum per point, the fastest available
display speed will be 10 b~s per division. Depending on how the
points are displayed on the screen (as separate dots, joined by
straight lines, or by a 'sine interpolator' of which more later), this
will enable us to display waveforms of up to, say, 3 MHz at most.
This is described as the 'single shot' or 'real-time' bandwidth. But
the bandwidth of the components preceding the ADC - the input
attenuator, the Y preamplifier and the sample and hold- will
normally greatly exceed this. Given the input signal is repetitive,
126
Oscilloscopes
it
is
possible
to
capitalize on this and produce a much greater
cffcctive bandwidth. In this ’sequential’
mode,
t.lie
DSC)
docs riot
capiiirc
complete chunks of wavcforni in rcal
time
as
.in
Figure
7.4;
the waveform
is
acquired
in
parts
at
successive acquisitions,
or
in
’equivalent time’, resulting in
a
considerably enhanccd
sequential or equivalent timc bandwidth.
Equivalent
time
(sequential)
mode
Continuing with our previous example
of
a
10Ms/s
ADC,
imagine that we select a timebase of 100ns/div. Then the
ADC
will only take one sample per division, whereas
we
wish to
display
100
samples/div
as
previously. Furthermore, there will
of
course usually be
no
exact relation between the frequency
of
the
input waveform and that
of
the sampling cIock. So the output
from the trigger circuit might be just in time
to
catch the next
sampling pulse, or might just miss
it,
or might occur midway
between
trvo
samples. Accordingly, the saniple
in
the leltniost
tenth
of
the screen oughl
to
be displayed at the left, right
or
middle
of
that horizontal graticulc division rcspcctivcly.
Now
at.
100
nsidiv,
100
pointsidiv corresponds to
a
timc
pcr
point uf just.
1
11s.
Conccptually, the sampling clock for
thr
acquisition inem-
ory
is
running
al
I
GHz
so
Ihal
the
write swilch sweeps round
all
1024
locations in (just over)
1
p,s,
but as the
ADC
is only laking
10
~Vsis.
it
deposits a digital sample in only every hundredth
memory location, as indicated in Figiirc 7.5(a).
However,
will it
be in the
first,
second, fiftieth or ninety-ninth location
of
every
hundred? The solution
to
this problem is also the answer
EO
the
rather impractical requirement for a
1
GHz
clock
-
I
said it
was
only conceptual. (Nevertheless,
DSOs
commonly describe them-
selves as having an equivalent sample rate
of
however many
Gsamplesis or
GHz
effective sample rate.) The
10MHz
sample
clock
is
no
longer fed to the
LSB
(least significant bit)
of
the
acquisition store address counter but
to
a more significant stage
so
that
(say,
for simplicity
of
explanation) just ten cycles take
the
writc switch right round the store. The trigger pulse
slam
a
timer
-
it
could
be a
last
ramp such as was discussed in Chapter 6
011
sanipling scopes
-
which measures thc dclay hcforr
the
next
10
MHz
clock
pulsc arrives. This delay is converted to
a
nurnhrr
Digital storage oscilloscopes 127
(a)
1St cycle r] [1 [7 ,,[1
2nd cycle., ~--[ [-'1 , [-1
3rd cycle __~ [7 ..... [-I J-'~~
o,. M I--I I-I_
Figure 7.5 Multiple point random sampling acquires several points in one
acquisition cycle, thus reducing the acquisition time considerably. In this mode a
typical DSO would acquire a minimum of 10 points per cycle, so it would reduce
the acquisition time by at least an order of magnitude over a scope that acquires
a single point on each cycle (courtesy Tektronix Inc.)
in the range 0 to 99 and added to each address count. Thus each
of the ten samples following a trigger pulse is distributed evenly
across the acquisition store and hence across the display store and
screen, but correctly positioned according to how soon after the
trigger the first of the group ten samples occurred.
With no exact relation between the sample clock frequency
and the frequency of the input signal, it is most unlikely that the
next trigger pulse will precede a sample clock pulse by exactly the
same amount as last time, so now another ten points will be
deposited in the appropriate screen positions, adding a bit more
definition to the waveform in store, and so on for each
succeeding trigger pulse, Figure 7.5. As more and more of the
complete picture is built up, it becomes more and more likely that
a group of ten points will duplicate an earlier set, so that after 100
acquisitions, the picture will still not be complete. But a group of
ten points is acquired for every trigger pulse so in just a few
milliseconds, thousands of groups of ten points will have been
acquired and the picture will be complete. This is so fast as to
appear instantaneous to the eye. The exception to this is the case
where we are using the 100 ns/div sweep speed in order to see a
128
Oscilloscopes
narrow pulse which has
in
fact
a
low repetition rate. Here,
although it only takes
1
ps
to acquire ten points on the
waveform, the scope has to wait a while for the next trigger
pulse, when it will collect the next
10
points. In this case,
you
may actually see thc wavcforrn picture building up slowly before
your
eyes,
or alt.ernat.ively, wait
a
long rime
before
thc instrument
is
ready
to
upc1at.e the scrctcn display.
Thc
cquivalcnl time t~iode
of
operation just described
is
called
iiiulliplr point. random
sarnpling.
It
is not
too
unlike the random sampling
mode
of
a
sampIing
scilpc
described
in Chapter
6
exccpt that several points
arc acquired for each trigger pulse rather than just
one.
The
advantage
of
multiple point sampling when cxarnining
a
low
repetition rate pulse train is obvious.
You
can see how,
by
using equivalent time sampling, a DSO
operating in sequential mode can offer
a
bandwidth much higher
than the frequency
of
the sample clock, limited ultimately by the
bandwidth
of
the
Y
preconditioning stages
-
the attenuator, input
preamplifier and the sample and hold. The bandwidth of these is
sometimes quoted as the ’analog bandwidth’ in
a
DSO
specifica-
tion, even where the instrument
uses
a
raster scan display and
consequently only displays stored waveforms
-
i.e. has no real-
time analogue scopc mode. Where a high reaI-time (single
shot)
bandwidth
is
required, equivalent time sampling
does
not
fill
the
hill.
The
ohvious way forward is
to
use
a faster
AT)(:.
Analogue-
to-digil.al convcrters opctrating at
500
Ms/s arc available in
a
nmihcr
of
DSOs,
whilc
2500
Ms/s
AnCs
reprrsrlit
about
the
currmt state
of
~lir
art.
Such high
spccd
operation
is
now
available even
in
hand-held oscilloscopes. Swnciirr~cs, in a two
rhannrl
instrument,
thcsc can both be
dedicated
tu
a single
channel whrn necessary, and
usctd
altcrnatcly intcrlcavcd at
maximum
speed
to
provide a 5CHz real-time sampling rat.e.
Similarly, in
a
four channel instrument, by borrowing the other
three
ADCs,
one could have a
10
GHz
sample rate, albeit
on
but
a
single channel.
There are two main types
of
ADC,
the
’flash’ type and the
successive approximation type. The former produces
at
its
output,
at
any instant, a digital code corresponding to the voltage at its
input: this type is popular in high sampling rate applications,
Digital storage oscilloscopes 129
though it is usually limited to eight, seven or even just six bit
resolution. The type of ADC using an SAR- successive approxima-
tion register- takes rather longer to make a conversion but may
have anything from 10 to 16 bit resolution, and in DSOs, ADCs
with such high resolution are occasionally used. Clearly there
would be problems if the input voltage were to change during the
conversion process, so an SAR ADC is used in conjunction with an
S & H (sample and hold) circuit, as indicated in Figure 7.1. Figure
7.6 shows how, on command, an S & H holds the signal at the
sampling instant constant while the ADC performs its conversion,
and then switches back to track mode in which it acquires and then
follows the current input voltage. (In Figure 7.6, the inaccuracies
have been deliberately exaggerated for clarity. An S & H is simply a
track and hold circuit which is switched back to hold mode as soon
as it has acquired the current analogue input voltage level.) Both
types of ADC face a trade-off between resolution and accuracy on
input
signal
output
signal
/~
t acquisition
I ~
settling
~~
time
acquisition
turn on
delay
--hold--=,
sample
or
~----track
TTL
gate signal---
output change caused
by input change times
feedthrough attenuation
I
droop in I droop in
t~'9-- hold l hold
"'"/t----.,
T
---'~- '~
.._aperture
~
|
-'-time delay ......
(T a )
= hold =- -=
.sample
cycle time
=.
I
logic 0 '1---logic 1
/! , J
Figure 7.6 The elements that make up the acquisition cycle of an ADC. The
turn-on time or the time that the device takes to get ready to acquire a sample is
the first event that must happen. The acquisition time is the next event that
occurs. This is the time that the device takes to get to the point at which the
output tracks the input sample, after the sample command or clock pulse. The
aperture time delay is the next occurrence. This is the time that elapses between
the hold command and the point at which the sampling switch is completely
open. The device then completes the hold cycle and the next acquisition is taken
(courtesy Tektronix Inc.)
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