130 Oscilloscopes
the one hand and speed on the other, which is why DSOs using
CCDs were at one time popular.
DSOs with CCDs
Charge coupled devices (CCDs) have been available for some
years. They are sampled analogue clocked delay lines in which a
packet of charge, representing the amplitude of the input voltage
at any instant, can be shunted along from one stage to the next
at each succeeding clock pulse. The samples eventually emerge
after a delay equal to the clock period times the number of stages
in the line, usually 512 stages. Continued development has raised
the maximum operating clock frequencies of such devices to
400MHz. The beauty of the scheme is that a single shot
bandwidth of well over 100 MHz (with sine interpolation) can be
obtained with a relatively slow ADC. This is achieved as follows.
When a trigger event stores a high-speed transient, it does so by
stopping the CCD clock. This freezes a string of 512 analogue
Figure 7.7 Tile DL7100 Signal Explorer provides a 500MHz bandwidth and
sensitivities to 2 mV/div. Two Y input channels arc supplcnlenled by two 8
channel logic inpuls. Ot use when viewing jittery wavcfornls, cc)lour accumulate
and persistence mode distinguishes frequency of event occurrence by colour
(reproduced by courtesy Yokogawa Martron Lid)
analo;ue
input
t-
O
.B
_ ~ ,~f~
sample
cr
clock u
address
and
R/W
control
demux
Illl"" ~
iLl I11 ~ I
L
,8
M
T
interleaved
data buses 8
,. 81
I 9 ~% 8'
J~L__
./% ....... J ,
,8 ,'8 ,8
i
r
i
!
i
l 1 l
mux
8 ~,ll
i '~ "" '"ill"
8
display
timing
control
data
to
display
section
Figure 7.8 Outline schematic showing how the acquisition memory RAM can handle up to four times the data rate of the individual RAM
[Cs. Further subdivision to eight banks and/or dual port RAM would provide even greater speed
132
Uscilloscopcs
samples in
thc
CCD delay
line.
A
lower frequency clock
is
now
applicd
so
that
insiead
ol
spilling
our
of
r.he end
of
the
CCD
delay
line
ar
up to
400Ms/s,
the
samplcs now tricklc nut at
a
rate
within the capabilities
or
a
fairly
rnodesl, inexpensive ADC.
In
ryfieshed
mode, the ADC converts only every umpteenth sample
from the delay line
(via
an
S
6.
H),
building
up
the picture
in
equivalcnt timc, whcncvcr
the
CCD clock frequency exceeds the
maximum ADC conversion rate.
At
lower clock rates, such
as
in
roll mode, the ADC can cope with all the samples
out
of the CCD
delay line
as
they arrive.
As
the performance
of
high speed ADCs has advanced and their
price fallen, the use
of
CCDs (which have been developed
to
the
limit
of
their capabilities) in DSOs
is
becoming
a
thing of the past.
Along with a modest speed ADC, clearly the slower and
cheaper sort
of
RAM
will
also
suffice in a DSO using a
CCD
input,
leading
to
a
very economically priced instrument wit.h
a
high
perforriiance. On the olher
hand,
in instruments with ADCs
operating at
100
oI
even
500Ms/s,
you may have been
wondering
how
C'VC'II
thc
vcry
lasicst,
most power-hungry arid
expensive
RAM
could cope.
Thc
answcr is that
it
cannot,
but
that
it
does no1 have
1.0,
siriw
the samples are stored in
a
wry spccific
order
-
and
so
wc
do
not
nccd
;I
irue randorn awess capabiliiy.
This enables
(he
use
oI
RAM whose access time
is
greater than the
period of the sampling clock, by using successive parallel
banks
ol
RAM for successive samples
as
indicated in Figure
7.8.
Only
the
demultiplexer distributing the samples
to
the latches has to work
at the full rate.
Display
formats
We have now covered most
of
the techniques used in
DSOs
to
acquire the waveform, what they are used for and how they
work. This section looks
at
the three main methods of presenting
the captured waveform on
thc
screen. These are the dot display,
dot joining (also callcd lincar or pulse interpolation) and sine
interpolation. These
are
iIIustrat.ed in Figure
7.9.
Note
that if
thc
dot display
is
used with
~oo
few points
per
cycle
of
displayed
waveform, 'perceptual
aliasing'
can occur, as illustrated in Figure
7.10.
Pulsc
in~er~~olation
(dot
,joining) provides
a
good general-
Digital storage oscilloscopes 133
purpose display and can be generally recommended. Where the
waveform under investigation is known to be smooth and
generally of a sinusoidal shape, sine interpolation provides a good
representation with as few as three or even only 2.5 samples per
cycle. However, it should not in general be used for pulse
waveforms, as here it can introduce ringing on the display which
is not present on the actual waveform if the pulse risetime is less
than about two or three sample periods, see Figure 7.11.
Having mentioned perceptual aliasing above, perhaps a word
should be said about true aliasing, although this is really more an
unfortunate result of inappropriate control settings on the
acquisition- rather than on the display - process. The topic has
already been mentioned in Chapter 6, see Figure 6.9 and
associated text. A theorem due to Nyquist states that to define a
sine wave, a sampling system must take more than two samples
per cycle. It is often stated that at least two samples per cycle are
necessary, but this is not quite correct. Exactly two samples per
cycle (usually known as the 'Nyquist rate') suffice if you happen
to know that they coincide with the peaks of the waveform, but
not otherwise, since then although you will know the frequency
of the sine wave, you have no knowledge of its amplitude. And
if the samples happen to occur at the zero crossings of the
waveform, you would not even know it was there. However,
with
more than
two samples per cycle - in principle 2.1 samples
would be fine - the position of the samples relative to the sine
wave will gradually drift through all possible phases, so that the
peak amplitude will be accurately defined.
As we have seen in Figure 7.9, a good sine interpolator can
manage very well with as few as 2.5 samples per cycle, always
assuming of course that the waveform being acquired is indeed a
sine wave. For non-sinusoidal waveforms, a sine interpolator is
inappropriate (except in the case of certain instruments which can
suitably preprocess the waveform before passing it to the sine
interpolator). For non-sinusoidal waves, accurate definition of the
waveform requires that the sampling rate should exceed twice the
frequency of the highest harmonic of significant amplitude. If
frequency components at more than half the sampling rate are
present, they will appear as 'aliased' frequencies lower than half
134 Oscilloscopes
DIGITIZING RATE IS 25 MHz
INPUT SIGNAL: 10
MHz
5 MHz
SINE INTERPOLATOR
..................Content has been hidden....................
You can't read the all page of ebook, please click here login for view all page.