Chapter Two

Realization of Proper Load Modulation Using a Real Transistor

Abstract

Various techniques for compensating the nonideal operation of the Doherty amplifier related to the transistor characteristics are discussed. For the proper load modulation of the Doherty amplifier, the transconductance of the peaking amplifier should be two times larger than that of the carrier amplifier. This problem can be solved by the uneven input power drive, 6 dB more input drive to the peaking amplifier. For the same purpose, the gate bias of the peaking amplifier can be adapted. The load modulation can be deviated from the ideal operation due to the knee voltage effect of a transistor and the large input capacitance variation of the class-C-biased peaking amplifier. The remedies for these nonideal operations are described.

Keywords

Uneven drive; Bias adaptation; Knee voltage effect; Phase compensation; Offset line; Doherty amplifier

In this chapter, we will introduce various techniques to compensate the nonideal operation of the Doherty amplifier related to the transistor characteristics. For the proper load modulation of the Doherty amplifier, transconductance of the peaking amplifier should be two times larger than that of the carrier amplifier. Therefore, the transistor of the peaking amplifier should be twice bigger than that of the carrier, but only a half of the full current capability is utilized, wasting the precious transistor resource. This problem can be solved by the uneven input power drive, 6 dB more input drive to the peaking amplifier. For the same purpose, the gate bias of the peaking amplifier can be adapted, increased the gate bias, as a square root function of input power, from the pinch-off point to the same bias with the carrier amplifier at the peak power operation. Ideally, these techniques provide the proper Doherty load modulation. However, the load modulation can be deviated from the ideal case due to the knee voltage effect of a transistor and the large input capacitance variation of the class-C-biased peaking amplifier. In this chapter, the remedies for the nonideal operations are described.

2.1 Correction for Lower Current of Peaking Amplifier

Due to the class C bias and the two times larger transconductance required for the peaking amplifier, the fundamental component of the current generated by the peaking amplifier, with the same size transistor as the carrier amplifier, is always lower than the required level. Therefore, the load impedances of the carrier and peaking amplifiers cannot be modulated fully to the optimum impedance levels, and the two amplifiers see larger loads than the ideal cases. The most significant deviation is occurred at the high-power region. The carrier amplifier operates in a saturated mode at the modulated region due the higher load impedance, producing a large distortion. The resulting Doherty amplifier produces a lower output power than the anticipated full power, but the efficiency can be high due to the saturated operation. This problem can be solved by using a peaking amplifier with twice bigger size than that of the carrier amplifier. In this design, only a half of the full power capability of the peaking device is utilized, increasing the production cost. But the low fundamental current generation in the class C operation cannot be fixed completely. To solve the problem, the uneven input power drive or gate-bias adaptation technique is suggested.

In the uneven power drive, the peaking amplifier gets more input power than the carrier amplifier to compensate its lower bias. In this drive, the currents of both amplifiers can be the same at the full power level. As a result, the impedances of both amplifiers are fully modulated, and the optimum power matching is achieved at the high power level, delivering the maximum power to the common load. Since the input power to the carrier amplifier is reduced, however, the gain of the uneven drive Doherty amplifier is lower.

The uneven drive can be realized by using an uneven power divider or direct power dividing using the large input capacitance variation of the class-C-biased peaking amplifier. The coupler provides an isolation between the carrier and peaking amplifiers, and it is more stable. Therefore, the coupler is popularly employed in base-station amplifier. The direct dividing is a simpler method without using the bulky coupler and is a favored choice for handset Doherty amplifiers. This direct dividing technique is described in handset Doherty power amplifier chapter (Section 5.3.1).

Gate-bias adaptation of the Doherty amplifier is another approach to solve the problem. As the magnitude of the instantaneous input signal increases, the gate-bias voltage of the peaking amplifier increases according to the envelope of the signal. Thus, the peaking amplifier generates the proper current for the required Doherty load modulation. However, it needs an external voltage control circuitry, which adds the circuit complexity. Since the bias voltage is modulated at the signal envelope frequency speed, the envelope frequency harmonics generated by the amplifiers cannot be suppressed using a large capacitor at the gate, creating the memory effect. This problem can be solved by using a voltage control circuit with a low output impedance. The circuit operates at a low power level for the gate-bias control, and the efficiency of the amplifier is not affected.

2.1.1 Uneven Drive Through Coupler

2.1.1.1 Current Ratio of Peaking Amplifier Versus Carrier Amplifier

Doherty amplifier consists of a class-AB-biased carrier amplifier and a class-C-biased peaking amplifier. Since both amplifiers have identical size transistors and input drives, the current of the peaking amplifier is always lower than the required current level, and the current at the maximum input drive reaches to far below the required maximum current level. Fig. 2.1 illustrates the fundamental and harmonic current levels of a general amplifier as a function of conduction angle. In Fig. 2.1, the current level is normalized to the maximum channel current, and the operation regions for classes AB and C are also indicated. As shown, the fundamental component of the current I1 is limited to

I1=0.5~0.536,α=π~2π0~0.5,α=0~π

si1_e  (2.1)

where α is the conduction angle. The fundamental components of the carrier and peaking currents at the maximum drive I1, C and I1, P are given by

I1,C=Imax2παcsinαC1cosαc2

si2_e  (2.2)

I1,P=Imax2παpsinαp1cosαp2

si3_e  (2.3)

where αc and αp are the conduction angles of the carrier amplifier and peaking amplifier, respectively. Due to the class C bias, the peaking amplifier is not fully driven even at the maximum input drive for the carrier amplifier, and the current level of the peaking amplifier is reduced further by a factor of (1 − N), where N denotes the portion of the voltage where the peaking amplifier starts to conduct. Here, αp also changes according to N.

Fig. 2.1
Fig. 2.1 Fundamental and harmonic components of the conduction current versus the conduction angle for a general amplifier.

We can define the current ratio of the two amplifiers at the maximum drive for the carrier amplifier as

σ=I1,CI1,P·1N

si4_e  (2.4)

The output power ratio from the two amplifiers in decibel, EI, is given by

EI=10logσ2=10logI1,CI1,P2+10log11N2

si5_e  (2.5)

Note that EI is the criterion to determine the underdrive ratio of the peaking amplifier. To generate the same current, the peaking amplifier should be driven harder than the carrier amplifier by that ratio. For example, if I1,C = 0.52 (αc = 200°) and I1,P = 0.44 (αp = 140°), the load could be modulated fully by increasing the drive power for the peaking amplifier (in this case, N is 0.5) by 7.6 dB more than the carrier amplifier, as determined from Eq. (2.5) with σ = 2.4.

2.1.1.2 Efficiency of the Asymmetric Amplifier With Uneven Power Drive

Fig. 2.2A shows an operational diagram to analyze the efficiency of the amplifier with an uneven drive, σ2 times larger drive to the peaking amplifier. It is assumed that each current source is linearly proportional to the input voltage signal and they contain ideal harmonic short circuits so that the efficiency analysis can be carried out using the fundamental and dc components only. Fig. 2.2B shows the fundamental currents from the two amplifiers for the even and uneven (σ = 2.4) drives. As shown, the carrier amplifier is biased at a class AB and the peaking amplifier at C, turning on at a half of the maximum voltage (Vin,max). As shown in Fig. 2.2C, we can achieve the proper load modulation suggested by Doherty with the uneven power drive since the two amplifiers generate the proper current with the same maximum value.

Fig. 2.2
Fig. 2.2 (A) Operational diagram with uneven power drive. (B) Fundamental currents versus input voltage. (C) Load impedances versus input drive for even and uneven (σ = 2.4) drives (carrier (αc = 200°), peaking (αp = 140°), N = 0.5, Zo = 50 Ω, and ZT = 50 Ω).

From Fig. 2.2B, the currents from the carrier and peaking amplifiers are given by

IC=I1,CVin,max·vin,0<vin<Vin,max

si6_e  (2.6)

IP,even=I1,P=0,0<vin<N·Vin,maxI1,PVin,max·vinN·I1,P,N·Vin,max<vin<Vin,max

si7_e  (2.7)

IP,uneven=σI1,P=0,0<vin<N·Vin,maxσI1,PVin,max·vinN·σI1,P,N·Vin,max<vin<Vin,max

si8_e  (2.8)

where IP,even is the current level of the peaking amplifier with the even power drive and IP,uneven is the current level of the peaking amplifier with the uneven power drive.

The load impedances of the two amplifiers are given by

ZC=ZT2ZL,0<vin<N·Vin,maxZT2ZL·1+IPIC,N·Vin,max<vin<Vin,max

si9_e  (2.9)

ZP=,0<vin<N·Vin,maxZL1+ICIP,N·Vin,max<vin<Vin,max.

si10_e  (2.10)

At the low-power region (0 < vin < N · Vin,max), where only the carrier amplifier is active, the RF and dc powers increase according to the input drive voltage. If we use ZT = Zo and ZL = Zo/2, the RF power and dc power are given by

PRF=12IC2ZC=12vin·I1,CVin,max2·2Z0=I1,CvinVin,max2·Vdc

si11_e  (2.11)

Pdc=Idc,C·Vdc=Idcmax,CvinVin,max·Vdc

si12_e  (2.12)

where Vdc is the drain bias voltage of the two amplifiers. From Eqs. (2.11), (2.12), the efficiency becomes

η=PRFPdc×100=I1,CIdc,CvinVin,max×100

si13_e  (2.13)

At the higher-power region (N · Vin,max < vin < Vin,max), both amplifiers are active. Thus, the total RF and dc powers are obtained by adding those of the two amplifiers and are given by Eqs. (2.14), (2.15).

PRF=12IC2ZC+IP2ZP=Vdc·I1,C2·V3I1,C+σI1,P·VN·σI1,P+σI1,PVNI1,C+σI1,PVN·σI1,P4I1,C

si14_e  (2.14)

Pdc=Idc,C+Idc,PVdc=Idcmax,CV+σIdcmax,PVNVdc

si15_e  (2.15)

where V=vinVin,max,Idcmax,Csi16_e is the dc current of the carrier amplifier and Idc max,P is the dc current of the peaking amplifier at the maximum drive.

Thus, the efficiency is given by

η=PRFPdc×100=I1,C2V3I1,C+σI1,PVNσI1,P+σI1,P·VN·I1,C+σI1,P·VNσI1,P4I1,C÷Idcmax,CV+σIdcmax,P·VN×100

si17_e  (2.16)

where

Idc,C=Imax2π·2sinαc2αCcosαC21cosαc2,Idc,P=Imax2π·2sinαP2αPcosαP21cosαP2

si18_e  (2.17)

Fig. 2.3A shows the calculated efficiencies based on the above analysis for αC = 180°–360° and αp = 140° with the uneven power drive (σ = 2.3–2.46). It is shown that uneven (σ = 2.3) drives with αc = 180° and αp = 140° is the optimum operation. For the αc larger than 180°, the efficiency drops due to the class AB operation although the Doherty amplifier is properly uneven driven. At the optimum condition, the load impedance of the carrier amplifier at the low-power region is two times larger than that of a conventional class AB amplifier.

Fig. 2.3
Fig. 2.3 (A) Efficiency versus input drive level for the amplifier with uneven power drive [αc = 180°–360° and αp = 140° with uneven power drive (σ = 2.3–2.46)]. Load lines of the two amplifiers for (B) even power drive and (C) uneven power drive.

The carrier amplifier reaches to the saturation state at the input voltage of Vin,max/2 since the maximum fundamental current swing is a half and the maximum voltage swing reaches to Vdc, as shown in Fig. 2.3B and C. As a result, the maximum power level is half of the carrier amplifier's allowable power level, and the efficiency of the amplifier is equal to the maximum efficiency of the carrier amplifier given by Eq. (2.13). Fig. 2.3B represents the load lines of the two amplifiers with the even power drive at a higher-power level. It is shown that the carrier amplifier is saturated and the voltage swing is larger than the allowable maximum voltage swing of Vdc due to the high load impedance. The peaking amplifier at the peak power operation produces a current far less than the full capability with the voltage swing larger than Vdc. Thus, it is clear that the two amplifiers of a conventional Doherty amplifier are heavily saturated, degrading the linearity at the high-power region, and produce far less power. However, for the uneven drive, the load line of the carrier amplifier follows the knee current region without producing saturation due to proper load modulation, as shown in Fig. 2.3C. The voltage swing of the peaking amplifier increases in proportion to the power level and reaches to the maximum voltage swing of Vdc only at the maximum power. At the maximum power level, both amplifiers have the optimum matching impedance, as shown in Fig. 2.3C. Therefore, the asymmetrical Doherty power amplifier with the uneven drive operates more linearly and produces more power than the even drive operation, delivering the expected Doherty performance.

2.1.2 Gate Bias Adaptation to Compensate the Low Current of Peaking Amplifier

2.1.2.1 Peaking Amplifier Adaptation

The proper Doherty load modulation can be achieved by adaptively adjusting the gate-bias voltage of the peaking amplifier, increasing the bias with its input signal envelope. Fig. 2.4 shows the peaking current profile before and after the gate-bias adaption. The peaking amplifier with the higher bias voltage enhances the current to the proper level for the ideal load modulation shown in Fig. 1.3A. The gate-bias voltage increases from the pinch-off voltage at Vin,max/2 and reaches the same gate voltage of the carrier amplifier at the peak power (can be a little higher considering the class C operation). Since the input power is proportional to the square of the input voltage, the gate voltage is increased square root of the input power as shown in Fig. 2.5. The resulting Doherty amplifier has an ideal load modulation characteristic with the maximized efficiency and linearity.

Fig. 2.4
Fig. 2.4 The current profile of peaking amplifier with the gate-bias adaptation.
Fig. 2.5
Fig. 2.5 Gate control voltage for adaptation of the peaking amplifier.

Fig. 2.6 shows a block diagram of the Doherty amplifier with the gate-bias adaptation. The Doherty amplifier consists of two separate circuits, a fully matched Doherty amplifier and an adaptive gate-bias control circuit for the peaking amplifier. In real implementation, the conduction angle difference, knee voltage effect, nonlinear transconductance and capacitances distort the ideal operation. The gate-bias voltage of the carrier amplifier can be adapted for further enhanced performance in this situation.

Fig. 2.6
Fig. 2.6 Schematic of the Doherty amplifier with gate-bias adaptation.

2.1.2.2 Adaptation of the Both Amplifiers

In the real Doherty amplifier operation, the carrier amplifier at the low-power operation with the 2ROPT load generates more than a half of the peak power because the effective knee voltage is reduced by the larger load resistance and the voltage swing becomes larger. This knee effect will be discussed in the following section. Fig. 2.7 shows the simulation results of the carrier amplifier using a GaN device. As depicted in Fig. 2.7A, the power level is 2.5 dB lower than that with ROPT. Therefore, the conventional Doherty amplifier considering the knee effect has the first peak efficiency at the power level higher than the 6 dB back-off point. The gain at the 2ROPT is lower than the expected one since the input is matched at the peak power, generating mismatch at the low-power operation.

Fig. 2.7
Fig. 2.7 Simulated results for power performance of the carrier amplifier. (A) Conventional fixed class AB bias case. (B) Adapted bias case with a deep AB bias for 2ROPT load and a class A bias for ROPT load.

To solve the problem, the gate bias of the carrier amplifier is increased from a deep AB bias at a low-power operation to a bias close to class A as the power level increases. The input of the carrier amplifier is conjugate-matched at the deep AB bias level for a higher gain at the back-off power level since the gain at the high power with the class A operation is higher than that at the low-power operation. The peak power of the carrier amplifier with ROPT is 3 dB higher than that with 2ROPT. The carrier amplifier is operated at the saturated mode in this power region, but the gain of the carrier amplifier can be maintained at a high level as indicated by the arrow line. Fig. 2.7B shows the efficiency and gain behaviors of the carrier amplifier with the gate-bias adaptation, which follows the ideal operation.

Fig. 2.8 represents the drain efficiency and gain of the peaking amplifier with the gate-bias adaptation. Before the load modulation begins, the peaking amplifier needs to be turned off, and the gate bias of the peaking amplifier should be at a C bias. As the load is modulated to ROPT, the gate bias of the peaking is increased to an AB bias level to generate the proper current, the same level with the carrier's. The input of the peaking amplifier is conjugate-matched at the AB operation for a higher gain at the high power level. As shown in the figure, the gate bias control of the peaking amplifier is similar to the peaking control only case in the previous section.

Fig. 2.8
Fig. 2.8 The performance of the gate-bias-controlled peaking amplifier.

Fig. 2.9 shows a continuous wave (CW) simulation result of the bias-controlled Doherty amplifier. The gain of the gate-bias-controlled Doherty does not decrease at the modulation region, while that of the uncontrolled Doherty amplifier decreases. As a result, the drain efficiency of the controlled Doherty amplifier is high at the 6 dB back-off power. The peak power of the Doherty amplifier is maximized by generating the full powers from the carrier and peaking amplifiers. Each gate-bias control profile is depicted in Fig. 2.10. To get the proper Doherty operation, the gate bias of the carrier amplifier is increased from deep AB bias to A bias, delivering 3 dB higher output peak power. The gate bias of the peaking amplifier is set to a C bias to prevent the turn-on. As the input power increases, the gate bias of the peaking is increased rapidly from the 6 dB back-off power point. Because drain efficiency of the Doherty amplifier is degraded at the peaking bias higher than AB bias, the gate bias of the peaking PA is increased to an AB bias level. The drain efficiency of the adapted Doherty amplifier between the two peak efficiency points is maintained at a high level.

Fig. 2.9
Fig. 2.9 Gain and efficiency characteristics of the gate-bias controlled and uncontrolled Doherty amplifiers.
Fig. 2.10
Fig. 2.10 The controlled bias voltage shapes of the carrier and peaking amplifiers.

2.2 Knee Voltage Effect on Doherty Amplifier Operation

The knee voltage of a transistor plays an important role for the load modulation behavior of Doherty amplifier. Since the knee voltage of a transistor is smaller at a low current level, the transistor generates more power and the optimum load impedance at the 3 dB back-off power for the carrier amplifier is larger than 2ROPT. Therefore, the modulated load impedance of the carrier amplifier at the back-off power, when the peaking amplifier is turned on, should be larger than 2ROPT. Otherwise, the first peak power region is located at less than 6 dB back-off power point. Because of the larger load modulation range required due to the knee voltage effect, the load modulation circuit should be modified accordingly.

2.2.1 Doherty Amplifier Operation With Knee Voltage

Theoretically, the Doherty amplifier has the highest efficiency at the 6 dB back-off and the peak power levels. The maximum efficiencies at the two power points can be achieved through the perfect load modulation of the carrier and peaking amplifiers. The perfect load modulation of the carrier amplifier with a zero knee voltage, depicted in Fig. 2.11A, indicates that the output powers for both ROPTIdeal and 2ROPTIdeal are P1Ideal and P1Ideal/2, respectively. The efficiencies (ηIdeal's) are also the same at the two power levels; the carrier amplifier is in equally saturated states for the both cases. In this operation, P1Ideal, ηIdeal, and ROPTIdeal are given by

P1Ideal=12I1,CθCV1

si19_e  (2.18)

ηIdeal=P1IdealPdcIdeal×100=1/2I1,CθcIdc,Cθc×100

si20_e  (2.19)

ROPTIdeal=V1I1,cθc

si21_e  (2.20)

where

I1,Cθc=Imax2πθcsinθc1cosθc/2

si22_e  (2.21)

Idc,Cθc=Imax2π2sinθc/2θccosθc/21cosθc/2

si23_e  (2.22)

Fig. 2.11
Fig. 2.11 Load line of the carrier amplifier: (A) ideal case with zero knee voltage and (B) practical case with nonzero knee voltage.

I1,C(θC) and Idc,C(θC) are the fundamental and dc current components, respectively, of the carrier amplifier biased at the conduction angle θc. In the ideal case, V1 is equal to Vdc because of the zero on-resistance with zero knee voltage.

In a real device, the effect of the knee voltage should be considered. Fig. 2.11B shows a load line with the knee voltage Vk. For ROPT and 2ROPT, the load impedances are given by

ROPT=VdcVkI1,cθc

si24_e  (2.23)

RCase_I=2ROPT=VdcVki1,cθc

si25_e  (2.24)

where

i1,cθc=imax2πθcsinθc1cosθc/2

si26_e  (2.25)

Vk=RonImax

si27_e

Vk=Ronimax

si28_e

In Case I with 2ROPT, imax can be derived from the loadlines in Fig. 2.11

imax=ImaxVdc2VdcImaxRon

si29_e  (2.26)

imax represents the maximum current when the carrier amplifier has the load impedance of 2ROPT. Thus, the output powers for the ROPT and RCase_I cases can be calculated as follows:

PROPT=12I1,cθcVdcVk

si30_e  (2.27)

PCase_I=12i1,cθcVdcVk

si31_e  (2.28)

The powers are plotted in Fig. 2.12A. For the calculation, it is assumed that Vdc is 30 V and Imax is 8 A with uniform transconductance. θc is fixed at 210°. As shown, the carrier amplifier with 2ROPT delivers the power more than a half of PROPT because of the enlarged voltage and current swings from (Vdc − Vk) to (Vdc − Vk′) and from Imax/2 to imax, respectively. The efficiency at the 6 dB back-off region does not reach to the peak value because the carrier amplifier, which is optimally designed for ROPT load, is not in the saturation state when the peaking amplifier is turned on.

Fig. 2.12
Fig. 2.12 (A) Maximum output powers employing ROPT, RCase-I, and RCase-II versus Ron. (B) Load impedances for ROPT, RCase-I, and RCase-II versus Ron.

To maximize the efficiency at the 6 dB back-off power region, the carrier amplifier with nonzero knee voltage should have a load impedance larger than 2ROPT, like Case II in Fig. 2.11B. As shown, the current is reduced, but the voltage swing is increased, maintaining the 3 dB lower power. In this case, the output power can be written as

PCase_II=12i1,cθcVdcVk

si32_e  (2.29)

where

i1,cθc=imax2πθcsinθc1cosθc2

si33_e  (2.30)

Vk=Ronimax

si34_e

Since PCase-II should be half of PROPT, imax, the maximum current when the carrier amplifier has a load impedance larger than 2ROPT, can be calculated:

imax=1RonVdcVdc22VkVdcVk2

si35_e  (2.31)

As shown in Fig. 2.12A, the maximum output power is decreased with Ron. But PCase_I does not change much since imax is increased and the knee voltage is reduced. Therefore, the difference from PROPT is smaller than 3 dB. Fig. 2.12B shows the required load impedance for various Ron. As Ron increases, the load impedance of the carrier amplifier in the low-power region also increases, larger than 2ROPT.

To verify the knee voltage effects on the Doherty operation, the carrier amplifier is designed and tested using a Cree GaN HEMTCGH40045 device with a 45 W power at 2.655 GHz. First, the output of the amplifier is matched to 50 Ω. Its load impedance is then modulated by adjusting the offset line and output termination impedance. Fig. 2.13 shows the load modulation results for the carrier amplifier employing the output termination impedances of 50, 100, and 130 Ω. As expected, the PA with 100 Ω delivers maximum efficiency at 45.3 dBm, which is 1.9 dB back-off power from the maximum output power of 47.2 dBm with ROPT of 50 Ω. On the other hand, the PA with 130 Ω has its maximum efficiency at the 2.9 dB back-off power.

Fig. 2.13
Fig. 2.13 Load modulation results for carrier amplifier employing the load impedances of 50, 100, and 130 Ω.

2.2.2 Load Modulation Behavior of Doherty Amplifier With Optimized Carrier Amplifier

To properly design a Doherty amplifier using a real device, the knee voltage effect should be considered as described in Section 2.2.1. Fig. 2.14 shows the operational diagram of the Doherty amplifier used to analyze the load modulation behavior. Compared with the conventional one, it has a scaled load impedance of ZL/δ. δ represents the increased resistance ratio to achieve the fully saturated operation of the carrier amplifier at the 6 dB back-off region. For the analysis, it is assumed that each current source is linearly proportional to the input voltage with the maximum current of Imax. The ideal harmonic short circuits are provided so that the output power and efficiency can be determined by only the fundamental and dc components.

Fig. 2.14
Fig. 2.14 Operational diagram of the Doherty amplifier with knee effect.

The load impedances of the carrier and peaking amplifiers are determined by their current ratio through the load modulation. The peaking amplifiers for the both cases of the with/without knee effect can generate the proper output current. However, since the load impedance at the 6 dB back-off power region of the carrier amplifier with the knee effect is larger than that of the amplifier without the knee effect, the current of the carrier amplifier cannot reach to the maximum value by the load modulation, leading to the degradation of output power. For the proper current generation, the peaking amplifier should generate more current at the peak power, by γ times, than the carrier amplifier.

The fundamental currents, as a function of the input voltage, of the conventional Doherty amplifier and the Doherty amplifier with the knee effect, are represented in Fig. 2.15, The currents, IC, IP, IDC,C and IDC,P which represent the fundamental and dc currents of the carrier and peaking amplifiers with the knee effect, respectively, are derived as

IC=I1,CθcVin,maxvin,0vinγβ+12γVin,max

si36_e  (2.32)

IDC,C=Idc,CθcVin,maxvin,0vinγβ+12γVin,max

si37_e  (2.33)

IP=0,0vinβ/2Vin,maxγσI1,pθpvinVin,maxβ2,β2Vin,maxvinγβ+1Vin,max/2γ

si38_e  (2.34)

IDC,P=0,0vinβVin,max/2γσIdc,pθpvinVin,maxβ2,β2Vin,maxvinγβ+1Vin,max/2γ

si39_e  (2.35)

Here, I1,C and Idc,C are the fundamental and dc currents of the carrier amplifier with the conduction angle of θc, which are defined in (2.21) and (2.22).

I1,pθp=Imax2πθpsinθp1cosθp/2

si40_e  (2.36)

Idc,pθp=Imax2π2sinθp/2θpcosθp/21cosθp/2

si41_e  (2.37)

β=2imaxImax=VdcVdc22VkVdcVkVk

si42_e  (2.38)

σ=2I1,cθcI1,pθp

si43_e  (2.39)

Fig. 2.15
Fig. 2.15 Fundamental currents of the conventional and knee effect Doherty amplifiers according to the input voltage (θc = 210° and θp = 150°).

As explained in Section 2.2.1, the carrier amplifier with the knee effect has a load impedance at the 6 dB back-off power point which is larger than 2ROPT, and the voltage swing of the amplifier is increased, as shown in Fig. 2.11B. To generate the first peak efficiency at the 6 dB back-off level, the current of the knee effect Doherty amplifier should be lower than that of the conventional Doherty amplifier by β as described previously. Due to the lower current, the input power at the 6 dB back-off is lower, and the input power for the peak power generation is also reduced as shown in Fig. 2.15. To get the proper modulation, the peaking amplifier should be overdriven by a factor of γ, which will be derived later. σ indicates the uneven power input drive ratio between the carrier and peaking amplifiers.

Using the currents of the carrier and peaking amplifiers, the load impedances of the two amplifiers can be calculated:

ZC=δZT2ZL,0vinβ2Vin,maxδZT2ZL1+IPIC,β2Vin,maxvinγβ+12γVin,max

si44_e  (2.40)

ZP=,0vinβ2Vin,maxZLδ1+ICIP,β2Vin,maxvinγβ+12γVin,max

si45_e  (2.41)

where

δ=RCase_IIRCase_I=Vdc+Vdc22VkVdcVk2βVdcVk

si46_e  (2.42)

Using the lossless quarter-wave transmission line in Fig. 2.14, IC is calculated:

IC=δICZTZLIP

si47_e  (2.43)

Since the carrier amplifier of the knee effect Doherty amplifier has a larger load impedance than the conventional Doherty, the carrier amplifier operates in the heavily saturated region after the peaking amplifier is turned on. To prevent the saturated operation of the carrier amplifier, the load impedance of the carrier amplifier should be lowered by generating more current from the peaking amplifier. Thus, the peaking amplifier should be overdriven by a factor of γ. For linear operation of the carrier amplifier without voltage clipping, the voltage across the current source of the carrier amplifier should satisfy the following condition at the maximum input voltage:

ZCICVdcγβ+12γVk

si48_e  (2.44)

From Eq. (2.44), γ can be inferred:

γ2δROPTI1,Cθc+Vk2Vdc2ROPTI1,Cθcβδ1βVk

si49_e  (2.45)

In this analysis, it is assumed that ZT = ROPT and ZL = ROPT/2. δ represents the RCase_I to RCase_II ratio to achieve the fully saturated operation of the carrier amplifier at the back-off region. For the conventional case, δ, γ, and β are equal to 1. Thus, the fundamental load impedance of the carrier amplifier is modulated from 2ROPT to ROPT, while that of the peaking amplifier varies from ∞ to ROPT. On the other hand, for the knee effect Doherty amplifier, δ and γ are > 1, but β is < 1. Thus, the fundamental load impedances of the carrier and peaking amplifiers are modulated from 2δROPT to 2ROPT {δ(γβ + 1)− γ}/(γβ + 1) and from ∞ to ROPT (γβ + 1)/2γ, respectively, as described in Fig. 2.16A. To explore the load modulation behavior, Vk of 4 V is assumed, and ROPT is calculated using Eq. (2.20). At the low-power region (0 ≤ vin ≤ βVin,max/2), the load impedance of the carrier amplifier is larger than 2ROPT, that is, 2δROPT. At the high-power region (βVin,max/2 ≤ vin ≤ (γβ + 1)Vin,max/2γ), the load impedance maintains a value larger than conventional amplifier. In contrast, the load impedance of the peaking amplifier sustains a smaller value than that of the conventional amplifier; this results in a slight power degradation.

Fig. 2.16
Fig. 2.16 (A) Load impedances of the conventional and proposed Doherty amplifier according to the input voltage. (B) Fundamental voltages of the carrier (Vc) and peaking (Vp) amplifiers for the conventional and knee effect Doherty amplifiers.

Fig. 2.16B shows the resulting fundamental voltages of the carrier and peaking amplifiers for the conventional and knee effect Doherty amplifiers. As expected, the carrier amplifier with the knee effect has a larger fundamental voltage at the 6 dB back-off because of the larger load impedance. Therefore, the carrier amplifier can be fully saturated, delivering the high efficiency.

Using the currents and load impedances of the carrier and peaking amplifiers, the efficiency is estimated through MATLAB. Fig. 2.17 represents the calculated efficiencies based on the above analysis for the θc = 210° and θp = 150° operation. To calculate the efficiencies, δ, β, σ, and γ are determined based on Vdc, Vk, I1,c(θc), and I1,p(θp), which are 30 V, 4 V, 4.2129 A, and 3.6384 A, respectively. The resulting δ, β, σ, and γ are 1.1725, 0.9235, 2.3158, and 1.2494, respectively. In the low-power region, the knee effect Doherty amplifier has higher efficiency than that of the conventional amplifier because of the larger load impedance. In particular, the knee effect Doherty amplifier delivers its maximum efficiency of 67.9% at the 6 dB back-off output power, which is an increase of about 5% compared with the conventional one. Although the maximum output power and efficiency at the maximum output power are slightly degraded because of the imperfect load modulation, the knee effect Doherty scheme improves efficiency for amplification of a modulated signal without any additional circuitry. Since the currents and voltages of the carrier and peaking amplifiers are different, the impedances are mismatched at the peak power. This mismatch problem can be solved by the offset line control, which will be described in Section 2.3.

Fig. 2.17
Fig. 2.17 Efficiencies of the conventional and knee effect Doherty amplifier according to the output power.

2.3 Offset Line Design for Compensation of Peaking Amplifier Phase Variation

In the Doherty operation, the peaking amplifier is biased at class C mode. With the bias, the input and output capacitances of the device vary a lot during the turn-on transition, and the amplifier has a poor AM-PM characteristic. This phase variation of the peaking amplifier produces the phase mismatch between the carrier and peaking amplifier paths, disturbing the load modulation of the Doherty amplifier. In a conventional Doherty amplifier design, the phases of the peaking and carrier amplifiers are matched at the maximum power level, and the mismatch is significant when the peaking amplifier operates at a low output power. However, the two peak efficiencies of the Doherty operation are maintained. The offset line cannot compensate this variable capacitance effect, but the phase variation effect can be minimized by proper design of the offset lines.

2.3.1 Phase Variation of the Peaking Amplifier

To analyze the load modulation behavior of the Doherty amplifier, the amplifier model is simplified as shown in Fig. 2.18. The carrier and peaking currents are normalized to the peak current and have variable phases. Because the offset line compensates the output capacitance effects of the device, the amplifier with the offset line can be substituted by an ideal current source with an impedance level of Ro.

Fig. 2.18
Fig. 2.18 Simplified Doherty amplifier model for simulation of the load modulation by the offset lines.

Fig. 2.19A shows the simulated results of the load modulations for the carrier and peaking amplifiers, without the additional offset line, as the output power of the amplifier is increased. Without the phase variation of the peaking amplifier, the output loads of the carrier and peaking amplifiers are ideally modulated from 100 to 50 Ω and infinite to 50 Ω, respectively, following the resistive load. However, the peaking amplifier has a negative phase variation as shown in Fig. 2.19B, which is extracted from Cree CGH40045 GaN device model. With the phase variation, the output loads of the carrier and peaking amplifiers are properly matched at the two maximum efficiency points, and the load cannot be properly modulated between the two points as shown in Fig. 2.19A. The improper load modulation degrades the efficiency of the Doherty amplifier.

Fig. 2.19
Fig. 2.19 (A) Load modulations of the carrier and peaking amplifiers with/without the phase variation of the peaking amplifier. (B) Phase variation of the peaking amplifier (the reference point is at the class B bias).

This load mismatch problem can be solved somewhat by inserting additional offset lines at the carrier and peaking amplifiers. In addition, the new offset lines increase the load impedances of the carrier and peaking amplifiers, mitigating the knee effect of the carrier amplifier as described in Section 2.2 and enhancing the efficiency of the Doherty amplifier.

2.3.2 Load Modulation of Peaking Amplifier With the Additional Offset Lines

To solve the phase variation problem of the peaking amplifier, additional offset lines having delays of θac and θap are added at the outputs of the current sources as shown in Fig. 2.18. In this Doherty amplifier, the relationship between the normalized carrier current Ic and normalized peaking current Ip are given by

Ic=1+Ip2ej14π+θac+θap

si50_e  (2.46)

With only the additional peaking offset line (θac = 0), the impedances Zp and Zc, defined in Fig. 2.18, are expressed in terms of Ip as

Zp=Z022RL1+1Ip+jtanθap11Ip

si51_e

Zc=Z0Z0RL2Ip1+Ip+jtanθap12Ip1+Ip

si52_e  (2.47)

Fig. 2.20 shows the load modulation curves calculated by Eq. (2.47) for the case with the additional offset line but without the peaking amplifier phase variation. The phase variation of the modulated loads with a negative length of the additional offset line is opposite to the phase variation due to the peaking amplifier phase variation shown in Fig. 2.19, indicating that the phase variation of the peaking amplifier can be compensated by shorting the conventional offset line, but at the expense of the carrier matching. We will also address the carrier amplifier problem in the next section.

Fig. 2.20
Fig. 2.20 Load modulation of Doherty amplifier according to the additional peaking offset line (θac = 0°) without the phase variation of the peaking amplifier.

If there is a phase difference between the carrier and peaking amplifiers (θd), Zp in Eq. (2.47) is expressed by

Zp=1+Ip2Ipcosθdtanθapsinθd+jZ0tanθap1+Ip2Ipsinθd+cosθdtanθap

si53_e  (2.48)

To minimize the imaginary term of the Zp, θap should be

θap=tan11+Ip2Ipsinθd11+Ip2Ipcosθd

si54_e  (2.49)

Because the phase of the peaking amplifier linearly decreases from 0 to θd,max with the Ip as shown in Fig. 2.19B, Eq. (2.49) can be rearranged to

θap=tan11+Ip2IpsinIp1θd,max11+Ip2IpcosIp1θd,max

si55_e  (2.50)

The calculated additional offset line lengths with the linear phase variation of the peaking amplifier with θd,max of − 60 to − 45° are shown in Fig. 2.21. Although the required additional offset line length is different according to the Ip, the difference is not much. Therefore, it is possible to compensate the phase variation of the peaking amplifier by adjusting the length of the offset line.

Fig. 2.21
Fig. 2.21 Calculated additional peaking offset line lengths according to the magnitudes of IP and θap.

With the calculated additional offset line length required at the Ip of 0.5, the load modulation prolifes of the carrier and peaking amplifier are shown in Fig. 2.22. As analyzed by Eq. (2.50), the load modulation of the peaking amplifier with the additional peaking offset line is near to the ideal Doherty load modulation.

Fig. 2.22
Fig. 2.22 The calculated load modulations of the carrier and peaking amplifiers with the additional peaking offset lines.

However, due to the additional peaking offset line with the negative length, the impedance toward the peaking amplifier (at Zp′ in Fig. 2.18) is not an open but an inductive impedance. This impedance affects the load modulation of the carrier amplifier as shown in Fig. 2.22.

2.3.3 The Load Modulation of the Carrier Amplifier With the Additional Offset Lines

For the proper load modulation of the carrier amplifier with the additional peaking offset line, the phase angle of Zc when the peaking amplifier is in the off- state should be minimized. To convert the carrier load to a resistive load, an additional offset line is needed at the output of the carrier amplifier also. Fig. 2.23 shows the load modulation of the Doherty amplifier according to the additional carrier offset line but without the phase variation of the peaking amplifier. With the negative length of additional offset line (shorten the conventional offset line), Zc at the low-power region becomes an inductive impedance, which can absorb the impedance variation generated by the compensation of the peaking amplifier phase variation. With the negative additional carrier offset line, the load modulation of the peaking amplifier becomes slightly inductive. Therefore, if the negative additional offset line is added at the carrier amplifier, the additional peaking offset line should be a little lengthened.

Fig. 2.23
Fig. 2.23 Load modulation of Doherty amplifier according to the additional carrier offset line (θap = 0°) without considering the phase variation of the peaking amplifier.

Fig. 2.24A shows the load modulation of the Doherty amplifier with the additional offset lines. To compensate the phase variation of the peaking amplifier (Fig. 2.19B), the additional offset lines for the carrier and peaking amplifiers are set to − 43° and − 13°, respectively. The load of the peaking amplifier is modulated similarly to the ideal case. The load of the carrier amplifier does not closely follow the ideal modulation, but the phase variation is small, and the impedance deviation is also small. The magnitude of Zc at the low-power region is larger than that with the conventional offset line.

Fig. 2.24
Fig. 2.24 Load modulation of Doherty amplifier with the additional offset lines (A) on the Smith chart and (B) on the magnitude graph according to the output power back-off level.

With the larger load for the carrier amplifier, the efficiency at the low-power region is increased. Moreover, the load modulation is ideal for the Doherty amplifier with the knee voltage effect as discussed in Section 2.2. As discussed before, the load of the carrier amplifier could not be properly matched at 50 Ω due to the larger load modulation range required for the carrier amplifier. However, with these offset lines, both the larger load of the carrier amplifier at the low power region and the proper power match at the peak output power can be realized simultaneously as shown in Fig. 2.24B.

In addition, the Zp is resistive with the larger value than the ideal Doherty modulation. Due to the larger load of the peaking amplifier during the load modulation, the peaking amplifier can get a high efficiency, even higher than that of the ideal Doherty amplifier. In Fig. 2.24B, Zc of the Doherty amplifier with the additional offset lines starts to modulate from the − 5 dB output power back-off level, not − 6 dB, because the output power delivered from the ideal current source is proportional to the magnitude of the load. However, the output power delivered from a real transistor is decreased for the larger load, and the Zc is modulated at the output power back-off level larger than  5dB as shown in the following section.

2.3.4 Simulation Results With Real Device

To validate the investigations in the previous sections, we have designed a symmetrical Doherty amplifier (Fig. 2.25). The Doherty amplifier is designed at the 1.94 GHz using GaN pHEMT devices (Cree CGH40045) with the drain bias of 50 V. The gate of the peaking amplifier is biased at − 6 V, and the phase of the amplifier is varied from 0° to − 50°. For the conventional offset line design, the offset line lengths of the carrier and peaking amplifiers are 50°. For the new offset line design, the offset line lengths of the carrier and peaking amplifiers should be 37° (− 13° of θac) and 10° (− 40° of θap), respectively. For comparison, the Doherty amplifier without the phase variation of the peaking amplifier is also designed. This amplifier is identical to the adaptive phase control to compensate the phase variation of the peaking amplifier using the dual input Doherty structure.

Fig. 2.25
Fig. 2.25 Schematic Doherty amplifier for the simulation.

Figs. 2.26 and 2.27 show the load modulation behaviors of the carrier and peaking amplifiers under the three different operation conditions. When the conventional offset lines are added, the phase variation of the peaking amplifier disturbs the load modulation. The improper modulation can be compensated either by the additional offset lines or by the adaptive phase control at the dual input structure (equivalent to the without peaking phase variation and conventional offset lines). The load modulation is examined for the reference planes defined by Zc1 and Zp1 shown in Fig. 2.25 for the three cases with/without the peaking amplifier phase variation and the new offset line with the phase variation. Following the expectation explained at Section 2.3.3, Zp1 with the new offset is modulated following the resistive load with a larger magnitude. Zc1 with the new offset line still has an imaginary component during the load modulation, but the magnitude of the Zc1 at the low-power region is larger than that with the conventional offset line. The load modulation is started at −6 dB back-off power level.

Fig. 2.26
Fig. 2.26 Load modulations of the simulated Doherty amplifier: (A) carrier amplifier and (B) peaking amplifier.
Fig. 2.27
Fig. 2.27 Magnitudes of simulated Zc1 and Zp1 during the load modulation.

Fig. 2.28 shows the efficiencies of the carrier and peaking amplifiers. Due to the larger Zc1 with the new offset line, the efficiency of the carrier amplifier is higher at the low-power region than those of the other operation conditions. However, the imaginary component of the load still exists, and the efficiency of the carrier amplifier at the high-power region is a little lower than that without the phase variation and similar to that with the conventional offset line. The efficiency of the peaking amplifier with the new offset line is higher than those with the other cases at the all output power region since the magnitude of the Zp1 is larger than those of the other cases.

Fig. 2.28
Fig. 2.28 Simulated drain efficiencies of the (A) carrier amplifier and (B) peaking amplifier.

Fig. 2.29 shows the simulated CW performance of the Doherty amplifier. With the new offset line, the efficiency of the Doherty amplifier is higher at the low-power region. At the high-power region, the efficiency of the carrier amplifier is lower than that without the phase variation. However, the efficiency of the peaking amplifier is higher, and the efficiency of the Doherty amplifier at the high-power region is similar to that without the phase variation. Therefore, the Doherty amplifier with the new offset line not only provides a higher efficiency than that with the conventional offset line but also has a higher efficiency than that without the phase variation of the peaking amplifier. Gain characteristic does not show much difference for the three cases. However, due to the larger load operation of the carrier amplifier, the gain of the Doherty amplifier with the new offset line shows early compression characteristic.

Fig. 2.29
Fig. 2.29 Simulated drain efficiencies and gains of the Doherty amplifier.

Further Reading

[1] Yang Y., et al. Optimum design for linearity and efficiency of microwave Doherty amplifier using a new load matching technique. Microw. J. 2001;44(12):20–36.

[2] Kim B., et al. The Doherty power amplifier. IEEE Microw. Mag. 2006;7(5):42–50.

[3] Kim J., et al. Optimum operation of asymmetrical-cells-based linear Doherty power amplifiers-uneven power drive and power matching. IEEE Trans. Microwave Theory Tech. 2005;53(5):1802–1809.

[4] Yang Y., et al. A microwave Doherty amplifier employing envelope tracking technique for high efficiency and linearity. IEEE Microwave Wireless Compon. Lett. 2003;13(9):370–372.

[5] Park Y., et al. Gate bias adaptation of Doherty power amplifier for high efficiency and high power. IEEE Microwave Wireless Compon. Lett. 2015;25(2):136–138.

[6] Moon J., et al. Efficiency enhancement of Doherty amplifier by mitigating the knee voltage effect. IEEE Trans. Microwave Theory Tech. 2011;59(1):143–152.

[7] Quaglia R., et al. Offset lines in Doherty power amplifiers: analytical demonstration and design. IEEE Microwave Wireless Compon. Lett. 2013;23(2):93–95.

[8] Kim S., et al. Accurate offset line design of Doherty amplifier with compensation of peaking amplifier phase variation. IEEE Trans. Microwave Theory Tech. 2016;64(10):3224–3231.

[9] Darralji R., et al. A dual-input digitally driven Doherty amplifier architecture for performance enhancement of Doherty transmitters. IEEE Trans. Microwave Theory Tech. 2011;59(5):1284–1293.

[10] Colantonio P., et al. Increasing Doherty amplifier average efficiency exploiting device knee voltage behavior, IEEE Trans. Microwave Theory Tech. 2011;59(9):2295–2305.

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