4.1.1 Load Modulation of N-way Doherty Amplifier

Fig. 4.1 shows an equivalent circuit model of the N-way Doherty amplifier with N identical ideal current sources. I_c, I_c′, and I_p represent the drain current of the carrier amplifier, the current after the inverter, and the drain current of the unit peaking cell, respectively. Since the inverter is lossless, a constant power flows through the inverter. Therefore, I_c′ can be calculated from the constant power flow concept:

$I_c^{\prime }=I_c\cdot \sqrt{\frac{Z_c}{Z_c^{\prime }}}=I_c\cdot \frac{R_0}{Z_c^{\prime }}=I_c\cdot \frac{Z_c}{R_0}$

The load modulation is carried out by the current ratio between the carrier amplifier and peaking amplifier, and the load impedances of the unit cells can be derived by the load-modulation principle described in Chapter One:

$V_0=\frac{R_0}{N}\cdot \left(I_c^{\prime }+I_{p,\text{Total}}\right)=\frac{R_0}{N}\cdot \left(I_c^{\prime }+\sum _1^{N-1}{I}_p\right)$

$Z_c^{\prime }=\frac{V_0}{I_c^{\prime }}=\frac{R_0}{N}\left(1+\frac{{\sum }_1^{N-1}{I}_p}{I_c^{\prime }}\right)=\frac{R_0}{\left(N-\frac{{\sum }_1^{N-1}{I}_p}{I_c}\right)}$

$Z_c=\frac{{R_0}^2}{Z_c^{\prime }}=R_0\left(N-\frac{{\sum }_1^{N-1}{I}_p}{I_c}\right)$

$Z_P=\frac{V_0}{I_p}=\frac{R_0}{{\mathit{NI}}_p}\cdot \left(I_c^{\prime }+\sum _1^{N-1}{I}_p\right)=R_0\cdot \frac{I_c}{\sqrt{I_p\left({\mathit{NI}}_{c-}{\sum }_1^{N-1}{I}_p\right)}}$

In Eqs. (4.4), (4.5), Z_c and Z_p are the load impedances of the carrier cell and peaking unit cell, respectively.

If the current ratio of the peaking cell to the carrier cell is α, the load impedances of the unit cells, for a given input drive V_in, can be written as follows:

$\alpha \left(V_{\text{in}}\right)=\frac{I_p\left(V_{\text{in}}\right)}{I_c\left(V_{\text{in}}\right)}$

$Z_c=R_0\cdot \left[N-\alpha \left(V_{\text{in}}\right)\left(N-1\right)\right]$

$Z_P=\frac{R_0}{\sqrt{\alpha \left(V_{\text{in}}\right)\cdot \left[N-\left(N-1\right)\alpha \left(V_{\text{in}}\right)\right]}}$

Since the unit cells are identical, α should be changed from 0 to 1 according to the input power level. The peaking amplifier should be turned on at the input voltage of V_max/N, where V_max is the maximum input voltage swing and the transconductance of the peaking cell should be larger than that of the carrier amplifier by 1 + 1/N. Because of the early turn-on of the N-way peaking amplifier, the uneven drive problem is reduced compared with the standard Doherty amplifier.

Accordingly, the load impedances are modulated with α(V_in) as follows:

$Z_c=\left\{\begin{array}{cc}N\cdot R_0,& \mathrm{at}{V}_{\text{in}}=\frac{V_{\max }}{N}\text{with}\alpha \left(V_{\text{in}}\right)=0\\ R_0,& \mathrm{at}{V}_{\text{in}}=V_{\max }\text{with}\alpha \left(V_{\text{in}}\right)=1\end{array}\right.$

$Z_P=\left\{\begin{array}{cc}\infty ,& \mathrm{at}{V}_{\text{in}}=\frac{V_{\max }}{N}\text{with}\alpha \left(V_{\text{in}}\right)=0\\ R_0,& \mathrm{at}{V}_{\text{in}}=V_{\max }\text{with}\alpha \left(V_{\text{in}}\right)=1\end{array}\right.$

Since all the peaking cells are modulated in the same way, the total impedance of the peaking amplifier is reduced by 1/(N − 1) due to the parallel connection of the cells. The impedance of the carrier amplifier is increased in proportion to N when the peaking amplifier is turned off. At the peak power, all the cells see the same load impedance of R₀.

Fig. 4.2 shows the load-modulation behaviors of the two-way Doherty amplifier and three-way Doherty amplifier. As shown in the above analysis, the peaking cells of the three-way Doherty amplifier are turned on at one-third of the maximum input voltage swing, and the load impedance of the cells is modulated from open to R₀. The load impedance of the carrier amplifier is modulated from 3R₀ to R₀ as the peaking amplifier generates the current from zero to the maximum value. It should be remembered that the peaking amplifier has (N − 1) unit cells and the total current of the peaking amplifier is (N − 1) times larger than I_max.

The load lines of the carrier and peaking amplifiers are illustrated in Fig. 4.3. Before the peaking amplifier turns on, the carrier amplifier operates as a single class B amplifier. When the carrier amplifier reaches to the maximum efficiency point, the peaking amplifier is turned on. After turned on, the load impedance of the carrier amplifier is modulated, and the load line always follows the saturated region, generating the maximum efficiency as explained in Chapter One. The load impedance of the peaking amplifier is also modulated, but the amplifier delivers the peak efficiency only at the maximum output power point. For the load lines, it is assumed that transconductance of the peaking cell is N/(N − 1) times larger than that of the carrier amplifier. Therefore, the amplifiers reach the maximum current level simultaneously although the peaking amplifier is biased lower. It can be achieved using a bigger-size device for the peaking cells, but in real design, the same-size devices are employed to fully utilize the precious device resource, resulting in deviation from the ideal behaviors. This problem can be solved by the uneven drive or gate-bias adaptation, which is discussed in Chapter Two.

4.1.2 Efficiency of N-Way Doherty Amplifier

Using Eqs. (4.7), (4.8), the efficiency variation of the Doherty amplifier with the input power level can be derived. For the analysis, the transconductances of the devices are assumed to be uniform, generating the fundamental current components linearly with the input voltage as shown in Fig. 4.4. The carrier amplifier and peaking amplifier are operated at class B mode with the different turn-on voltages. The currents of the two amplifiers are given by

$I_c\left(V_{\text{in}}\right)=\frac{V_{\text{in}}}{V_{\max }}\cdot I_{\max }$

$I_p\left(V_{\text{in}}\right)=\left\{\begin{array}{cc}0,& \text{for}0<V_{\text{in}}<\frac{V_{\max }}{N}\\ I_{\max }\cdot \left(\frac{N\cdot V_{\text{in}}}{V_{\max }}-1\right),& \text{for}\frac{V_{\max }}{N}<V_{\text{in}}<V_{\max }\end{array}\right.$

Here, I_max is the maximum current of the single cell.

For the input voltage level of $0\le v_{\text{in}}<\frac{V_{\max }}{N}$, the RF and DC powers can be calculated as follows:

$\begin{array}{c}{P}_{\mathit{RF}}\left(v_{\text{in}}\right)=\frac{1}{8}\cdot I_C{\left(v_{\text{in}}\right)}^2\cdot Z_C\left(v_{\text{in}}\right)=\frac{{I_{\max }}^2}{8}\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\cdot R_0\cdot \left[N-\alpha \left(V_{\text{in}}\right)\left(N-1\right)\right]\\ =\frac{N\cdot I_{\max }\cdot V_{\mathit{dc}}}{4}\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\left(\text{where},\alpha \left(v_{\text{in}}\right)=0\text{for}0\le v_{\text{in}}<\frac{V_{\max }}{N}\right)\end{array}$

$P_{\mathit{DC}}\left(v_{\text{in}}\right)=V_{\mathit{dc}}\cdot I_{\mathit{dc}}\left(v_{\text{in}}\right)=V_{\mathit{dc}}\cdot \frac{1}{\pi }\cdot I_{\max }\cdot \left(\frac{v_{\text{in}}}{V_{\max }}\right)$

At the input level of V_max/N ≤ v_in < V_max, the RF and DC powers are given by

$\begin{array}{c}{P}_{\mathit{RF}}\left(v_{\text{in}}\right)=\frac{1}{8}\cdot I_C{\left(v_{\text{in}}\right)}^2\cdot Z_C\left(v_{\text{in}}\right)+\frac{1}{8}\cdot I_P{\left(v_{\text{in}}\right)}^2\cdot Z_P\left(v_{\text{in}}\right)\\ =\frac{{I_{\max }}^2}{8}\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\cdot R_0\cdot \left[N-\alpha \left(V_{\text{in}}\right)\left(N-1\right)\right]+\frac{{I_{\max }}^2}{8}\cdot {\left(\frac{V_{\text{in}}}{V_{\max }}\cdot N-1\right)}^2\cdot \frac{R_0}{\sqrt{\alpha \left(V_{\text{in}}\right)\cdot \left[N-\left(N-1\right)\alpha \left(V_{\text{in}}\right)\right]}}\\ =\frac{1}{4}\cdot I_{\max }\cdot V_{\mathit{dc}}\cdot \left[{\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\cdot \left[N-\alpha \left(V_{\text{in}}\right)\left(N-1\right)\right]+{\left(\frac{V_{\text{in}}}{V_{\max }}\cdot N-1\right)}^2\cdot \frac{1}{\sqrt{\alpha \left(V_{\text{in}}\right)\cdot \left[N-\left(N-1\right)\alpha \left(V_{\text{in}}\right)\right]}}\right]\end{array}$

$\begin{array}{c}{P}_{\mathit{DC}}\left(v_{\text{in}}\right)=V_{\mathit{dc}}\cdot \left[I_{\mathit{dc}}\left(v_{\text{in}}\right)+\left(N-1\right)\cdot I_{\mathit{dp}}\left(v_{\text{in}}\right)\right]\\ =\frac{1}{\pi }\cdot I_{\max }\cdot V_{\mathit{dc}}\cdot \left[\frac{v_{\text{in}}}{V_{\max }}+\left(\frac{V_{\text{in}}}{V_{\max }}\cdot N-1\right)\right]\end{array}$

The efficiency can be calculated from Eqs. (4.13) to (4.16).

$\eta =\left\{\begin{array}{cc}\frac{\pi }{4}\cdot \frac{N\cdot v_{\text{in}}}{V_{\max }},& 0\le v_{\text{in}}<\frac{V_{\max }}{N}\\ \frac{\pi }{4}\cdot \frac{\left[{\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\cdot \left[N-\alpha \left(V_{\text{in}}\right)\left(N-1\right)\right]+{\left(\frac{V_{\text{in}}}{V_{\max }}\cdot N-1\right)}^2\cdot \frac{1}{\sqrt{\alpha \left(V_{\text{in}}\right)\cdot \left[N-\left(N-1\right)\alpha \left(V_{\text{in}}\right)\right]}}\right]}{\frac{v_{\text{in}}}{V_{\max }}+\left(\frac{V_{\text{in}}}{V_{\max }}\cdot N-1\right)}& \frac{V_{\max }}{N}\le v_{\text{in}}<V_{\max }\\ \frac{\pi }{4}& v_{\text{in}}=V_{\max }\end{array}\right.$

Fig. 4.5 shows the calculated efficiency of the N-way Doherty amplifier versus the output power level calculated by Eq. (4.17). The maximum efficiency of 78.5% (π/4) is obtained at the input power levels of “V_max/N” and “V_max.” The output power level for the first peak-efficiency point is 1/N² or 20·log (1/N) dB down from the peak output power. The back-off power level for the maximum efficiency is increased as the size of the peaking amplifier (number of peaking cells) is increased. The three-way and four-way Doherty amplifiers deliver the maximum efficiencies at the back-off powers of 9.54 dB (1/9 of normalized output power) and 12 dB (1/16 of normalized output power), respectively. The efficiency between the two power points is decreased as the separation is increased.

To evaluate the efficiency of the Doherty amplifier for amplification of a modulated signal, the 802.16e Mobile WiMAX signal with 8.5 dB PAPR is used. The drain efficiency (DE) of N-way Doherty amplifier for the modulated signal is determined by following equation:

$\mathit{DE}=\frac{\int \text{prob}.\left(v_{\text{in}}\right)\cdot P_{\text{out}}\left(v_{\text{in}}\right){\mathit{dv}}_{\text{in}}}{\int \text{prob}.\left(v_{\text{in}}\right)\cdot P_{\mathit{dc}}\left(v_{\text{in}}\right){\mathit{dv}}_{\text{in}}}$

The prob.(v_in) is the occurrence probability of the v_in in the modulated input signal. The overall DE is determined by ratio of the multiplications of the probability distribution and power generation terms (P_out) over the multiplications of the distribution and DC power (P_dc). The numerator in Eq. (4.18) is named as the power generation distribution (PGD) of the signal, which represents the real power generation at the input level of the modulated signal. The normalized power generation amount is also shown in Fig. 4.5. The average power generation point is 7.5 dB lower than the peak power for 802.16e mobile WiMAX signal with 8.5 dB PAPR. The distribution indicates that the dominant power generation region for amplification of the modulated signal is 0.03 ~ 0.37, indicating that three-way Doherty amplifier is the best suited one. According to the PAPR of the modulated signal, the important power generation region indicated by the PGD is changed, and the N-way Doherty amplifier should be chosen properly according to the distribution. The calculated DEs for the N-way Doherty amplifiers are summarized in Table 4.1.

The calculated DEs for the signal with various PAPRs are illustrated in Fig. 4.6. Because the back-off level of PGD is lower than that of PAPR, the two-way Doherty amplifier delivers the highest efficiency for the signal with PAPR of up to 7.5 dB, and the three-way is better for the higher PAPR signals.

The N-way Doherty amplifier is not the optimum architecture for an efficient transmitter because it does not maintain the peak efficiency at the important PGD region. These low-efficiency regions are originated from the unsaturated operations of the carrier amplifier at the low-power region and the peaking amplifier at the high-power region. To reduce the efficiency degradation, the high-efficiency characteristic should be maintained over the important PGD region. It can be achieved by increasing the number of the maximum efficiency points by increasing the load-modulation networks (N), and the N-stage Doherty amplifier has been suggested. At the next section, we will explore the N-stage Doherty amplifier for the highly efficient amplification of a signal with a high PAPR.

4.1.3 Linearity of N-way Doherty Amplifier

As discussed in Chapter One, the Doherty amplifier is inherently a linear power amplifier if the internal distortions generated by the carrier and peaking amplifiers are not considered. To realize a linear Doherty amplifier, the distortions should be minimized. For a linear Doherty amplifier, the carrier amplifier is biased at class AB and the peaking amplifier at class C. The class AB carrier amplifier should operate linearly by itself at the low power before the peaking amplifier turns on. At near or above the first peak-efficiency point, the carrier amplifier operates at the near-saturation mode, and a large distortion is generated from the carrier amplifier. The distortion at the saturated operation should be canceled by the distortion generated by the class C biased peaking amplifier. It is possible since the class AB mode carrier amplifier has a gain compression characteristic while the class C mode peaking amplifier has a large gain-expansion characteristic. By adjusting the two gain characteristics through the proper gate biases of the two amplifiers, a constant gain from the Doherty amplifier can be obtained. It is equivalent to cancellation of the harmonic distortions generated by the two amplifiers. The asymmetrical output powers from the carrier and peaking amplifiers with the adjusted biases are combined by the Doherty network, which is a very nice unique characteristic of Doherty amplifier.

The nonlinear output current of an active device can be expressed using Taylor series expansion by

$I_{\text{out}}={\mathit{gm}}_1\cdot v_{\text{in}}+{\mathit{gm}}_2\cdot {v_{\text{in}}}^2+{\mathit{gm}}_3\cdot {v_{\text{in}}}^3+{\mathit{gm}}_4\cdot {v_{\text{in}}}^4+{\mathit{gm}}_5\cdot {v_{\text{in}}}^5+\cdots$

where v_in is the input gate voltage and gm_X's are the Xth-order expansion coefficients of the nonlinear gm. The third-order intermodulation IM3 current is mainly generated by ${\mathit{gm}}_3\cdot {v_{\text{in}}}^3$ term and the fifth-order intermodulation IM5 current by ${\mathit{gm}}_5\cdot {v_{\text{in}}}^5$ term in Eq. (4.19). For a sinewave input to Eq. (4.19), the fundamental component I_outfund is given by

$I_{{\mathrm{out}}_{\mathrm{fund}}}=\left[{gm}_1\cdot v_{\mathrm{in}}+\frac{9}{4}{gm}_3\cdot {v_{\mathrm{in}}}^3+\frac{25}{4}{gm}_5\cdot {v_{\mathrm{in}}}^5+\cdots \right]$

Fig. 4.7 presents gm₃ curve according to the gate-bias voltage of a transistor. It is important to notice that gm₃ is positive for the gate bias close to the pinch off and is negative for the higher bias voltage. Because of the positive g_m3, the class C amplifier has a gain-expansion characteristic since this IM3 can generate the fundamental term as shown in Eq. (4.20), while the class AB amplifier with the negative gm₃ has a gain compression characteristic.

As mentioned earlier, for a linear Doherty amplifier, the carrier amplifier is biased at a class AB mode and should operate linearly by itself. The bias voltage of the peaking amplifier should be in class C mode in order to have proper positive gm₃ necessary for canceling the IMD3 current generated by the class AB carrier amplifier at a high power operation with near saturation. This class C peaking amplifier generates a considerable amount of the higher-order intermodulation terms, especially the fifth-order terms. However, a linear two-way Doherty amplifier can be realized by using this harmonic cancellation mechanism, and we will discuss this amplifier in Chapter Five “Linear Doherty Amplifier for Handset Application”

For the three-way case, which has two peaking cells, an extremely linear Doherty amplifier can be realized. For the amplifier, the required bias voltage for the proper IMD3 cancellation is higher than the two-way Doherty amplifier. Therefore, the peaking amplifiers operate more linearly without generating the excessive higher-order distortion terms, helping for linear operation. The gate bias of the higher-way Doherty amplifier should be even higher, but the higher-bias operation more than the three-way Doherty amplifier increases the sensitivity for the harmonic cancellation. Consequently, the best efficiency versus linearity characteristics should be considered.

The two-, three-, and four-way Doherty amplifiers are compared for their performances on linearity and efficiency. The basic amplifier cells have been designed using Motorola's 4 W PEP silicon LDMOSFET. The linearity is optimized by adjusting the gate biases of the peaking cells. The uneven powers from the two amplifiers are automatically combined by the load-modulation circuit. The class AB amplifiers for the reference points are realized by equally AB biasing all the unit cells of the Doherty amplifier. Fig. 4.8A shows the measured ACLRs of the two-way Doherty amplifier and class AB amplifier at 2.5 MHz offset and 5 MHz offset for one- and two-carrier downlink WCDMA signals (5 MHz bandwidth), respectively. For the one-carrier WCDMA signal, ACLR is improved by 4.69 dB at an output power of 27 dBm. Fig. 4.8B shows the measured PAEs of the two-way Doherty and class AB amplifiers for the one- and two-carrier downlink WCDMA signals. The PAE is improved by 6.45%, from 21.45% to 27.9% at the output power of 32 dBm. The optimized quiescent current of the peaking amplifier is 0.1 mA, while those of the carrier amplifier and the class AB amplifiers are 60 mA.

Fig. 4.9A shows the measured ACLRs of the three-way Doherty and class AB amplifiers. For the one-carrier WCDMA signal, ACLR is improved by 9.97 dB at the output power of 30 dBm. Fig. 4.9B shows the measured PAEs of the three-way Doherty and class AB amplifiers. The PAE is improved slightly by 1.98% at an output power of 34 dBm.

Fig. 4.10A shows the measured ACLRs of the four-way Doherty and class AB amplifiers. For the one-carrier WCDMA signal, ACLR is improved by 8.83 dB at an output power of 32 dBm. Fig. 4.10B shows the measured PAEs of the four-way Doherty and class AB amplifiers. The PAE is improved by 2.5% at output power of 35 dBm. The optimized quiescent currents of the peaking amplifiers are 12.8 and 15.73 mA for the three- and four-way cases, respectively.

As shown, the three- or four-way Doherty amplifiers deliver greatly improved linearity over the two-way Doherty amplifier. However, for the four-way case, the linearity improvement is observed over a relatively narrow output power range compared with the three-way case, which means that the excessive numbers of the peaking cells make the IM3 cancellation very sensitive. Also, as the number of peaking cells is increased, the bias current is also raised for the intermodulation cancellation. Therefore, the load-modulation effect is reduced, and the efficiency is reduced, comparable with the class AB operation. Fig. 4.11 compares the data for the efficiency and linearity characteristics of the amplifiers. Compared with the normal class AB operated amplifiers, the N-way Doherty amplifiers deliver much more improved efficiency versus linearity. The two-way shows the best efficiency above − 35 dBc of ACLR, while the three-way shows best efficiency below − 41 dBc. For the intermediate region, the four-way shows slightly better efficiency than that of the three-way.

As shown, the three-way Doherty amplifier can be very linear, and the linearity can be further enhanced. To maximize the linearity of the amplifier, the carrier amplifier is designed to be very linear by biasing at near class A mode, and the biases of the peaking cells are adjusted for the IMD3 and IMD5 cancellations. The three-way Doherty amplifier has been implemented using three Motorola's MRF21060 (60 W PEP) LDMOSFETs at 2.14 GHz. In the experiments, the quiescent drain currents of the carrier and peaking amplifiers are set to 700 mA at V_DD = 28 V for the class AB amplifier operation. For the three-way Doherty amplifier, the quiescent drain current of the carrier amplifier is set to 820 mA at V_DD = 28 V, but the peaking cells are biased at class AB mode, around 260, 280 mA, respectively with V_DD = 28 V. Fig. 4.12 shows the measured ACLRs and PAEs of the class AB amplifier and three-way Doherty amplifier. Fig. 4.12A is for one-carrier WCDMA signal with 10 MHz bandwidth, and Fig. 4.12B is for two-carrier WCDMA signal with 10 MHz spacing. The three-way Doherty is very linear with ACLR of under 50 dBc. For the one-carrier WCDMA signal, ACLR is improved by about 10 dB compared with the class AB amplifier. The PAE is improved slightly by about 2% at the same output power. For the two-carrier WCDMA signal, ACLR of the three-way Doherty is improved by 6.8 dB at an output power 40 dBm, and the improvement of the PAEs is similar to the one-carrier case. Fig. 4.13 explains the linearity boosting mechanism of the three-way Doherty. For the three-way Doherty amplifier, the IMD₃ and IMD₅ are reduced simultaneously compared with the class AB case.

In summary, the gate-bias voltages of the two cells of the peaking amplifier can be adjusted to cancel the IMD3 more accurately, and the peaking amplifier itself operates more linearly due to the higher gate bias. In this operation, the efficiency can be relatively high due to the near-normal Doherty operation. For the very linear operation, the three and fifth harmonics should be canceled using the two peaking cells. Since the fifth harmonic level is around 40–45 dBc, without the fifth harmonic cancel, the linearity cannot reach below − 50 dBc. In this operation, the amplifier is very linear, but the efficiency is not high.

4.2.1 Three-Stage I Doherty Amplifier

The conventional three-stage Doherty amplifier architecture, that is widely known for a long time and we call “three-stage I”, is shown in Fig. 4.14. The topology is one Doherty amplifier as a carrier amplifier with one additional peaking amplifier; initially, the carrier Doherty amplifier operates like a conventional Doherty amplifier, and at a higher power, the additional peaking amplifier turns on and modulates the load. It has two inverters for the sequential load modulation. The N-stage Doherty amplifier has N − 1 peaking cells with N − 1 inverters.

4.2.1.1 Fundamental Design Approach

To evaluate the back-off levels where the three-stage I Doherty amplifier delivers the maximum efficiencies, the fundamental current profiles of the cells can be defined as shown in Fig. 4.15. It should be noticed that the current of the carrier amplifier is saturated since a proper solution could not find without the saturated operation. The maximum output power of the three-stage I Doherty amplifier is given by the total output current and DC drain bias voltage, V_dc:

$P_{\text{Out},max}=\frac{1}{2}\cdot V_{\mathit{dc}}\cdot I_{\text{Out}}$

  (4.21)

The maximum fundamental currents of the unit cells (carrier cell, peaking cell 1, and peaking cell 2), I_C,F, I_P1,F, and I_P2,F, follow their sizes:

$I_{C,F}:I_{P1,F}:I_{P2,F}=1:m_1:m_2$

  (4.22)

$\begin{array}{c}{I}_{\text{Out}}=I_{C,F}+I_{P1,F}+I_{P2,F}=I_{C,F}\cdot \left(1+m_1+m_2\right)\\ =I_{P1,F}\cdot \left(1+m_1+m_2\right)/m_1\\ =I_{P2,F}\cdot \left(1+m_1+m_2\right)/m_2\end{array}$

  (4.23)

From Eqs. (4.23), (4.21), the current levels are determined as

$I_{C,F}=\frac{2\cdot P_{\text{Out},max}}{V_{\mathit{dc}}\cdot \left(1+m_1+m_2\right)}$

  (4.24)

$I_{P1,F}=\frac{2\cdot m_1\cdot P_{\text{Out},\max }}{V_{\mathit{dc}}\cdot \left(1+m_1+m_2\right)}$

  (4.25)

$I_{P2,F}=\frac{2\cdot m_2\cdot P_{\text{Out},\max }}{V_{\mathit{dc}}\cdot \left(1+m_1+m_2\right)}$

  (4.26)

The fundamental output current amplitudes at each back-off output power level with the maximum efficiency, as shown in Fig. 4.15, are calculated. The current levels at the first back-off point are given by

$I_{C,B1}=I_{C,F}=\frac{2\cdot P_{\text{Out},\max }}{V_{\mathit{dc}}\cdot \left(1+m_1+m_2\right)}$

  (4.27)

$I_{P1,B1}=\frac{k_1-k_2}{1-k_2}\cdot I_{P1,F}=\frac{k_1-k_2}{1-k_2}\cdot \frac{2\cdot m_1\cdot P_{\text{Out},\max }}{V_{\mathit{dc}}\cdot \left(1+m_1+m_2\right)}$

  (4.28)

$I_{P2,B1}=0$

where k₁ and k₂ are the turn-on voltages at the peak-efficiency points as indicated in Fig. 4.15. The current levels at the second back-off point are given by

$I_{C,B2}=\frac{k_2}{k_1}\cdot I_{C,F}=\frac{k_2}{k_1}\cdot \frac{2\cdot P_{\text{Out},\max }}{V_{\mathit{dc}}\cdot \left(1+m_1+m_2\right)}$

  (4.29)

$I_{P1,B2}=I_{P2,B2}=0$

Thus, the back-off output power levels are given by

$P_{\text{Out},B1}=\frac{1}{2}\cdot V_{\mathit{dc}}\cdot I_{C,B1}+\frac{1}{2}\cdot V_{\mathit{dc}}\cdot I_{P1,B1}$

  (4.30)

$P_{\text{Out},B2}=\frac{1}{2}\cdot V_{\mathit{dc}}\cdot I_{C,B2}$

  (4.31)

Eqs. (4.30), (4.31) can be represented in different expressions using the maximum output power in Eq. (4.21), assuming that the power is linearly increased with the input power:

$P_{\text{Out},B1}={k_1}^2\cdot P_{\text{Out},\max }$

  (4.32)

$P_{\text{Out},B2}={k_2}^2\cdot P_{\text{Out},\max }$

  (4.33)

Using Eqs. (4.30)–(4.33), the back-off voltage levels of the three-stage I Doherty amplifier, k₁ and k₂, are derived as

$k_2=\frac{1+m_1}{1+m_1+m_2},k_1=\frac{1}{1+m_1}$

  (4.34)

As shown in Eq. (4.34), the back-off level of the three-stage I Doherty amplifier can be selected by changing the size ratios between the carrier cell and the peaking cells. Under the same assumption used previously that all of the cells are at class B mode after turned on and have proper transconductances, the fundamental currents of the unit cells can be calculated as functions of the input voltage using Eq. (4.34):

$\begin{array}{c}{I}_{1,C}\left(v_{\mathrm{in}}\right)=I_{C,F}\cdot \frac{v_{\mathrm{in}}}{k_1\cdot V_{\text{max}}},\\ =I_{C,F},\end{array}\begin{array}{c}0<\frac{v_{\mathrm{in}}}{V_{\text{max}}}<k_1\\ k_1<\frac{v_{\mathrm{in}}}{V_{\text{max}}}<1\end{array}$

  (4.35)

$\begin{array}{l}{I}_{1,P1}\left(v_{\mathrm{in}}\right)=0,0<\frac{v_{\mathrm{in}}}{V_{\text{max}}}<k_2\\ =\frac{I_{P1,F}}{1-k_2}\cdot \left[\frac{v_{\mathrm{in}}}{V_{\text{max}}}-k_2\right],k_2<\frac{v_{\mathrm{in}}}{V_{\text{max}}}<1\end{array}$

  (4.36)

$\begin{array}{l}{I}_{1,P2}\left(v_{\mathrm{in}}\right)=0,0<\frac{v_{\mathrm{in}}}{V_{\text{max}}}<k_1\\ =\frac{I_{P2,F}}{1-k_1}\cdot \left[\frac{v_{\mathrm{in}}}{V_{\text{max}}}-k_1\right],k_1<\frac{v_{\mathrm{in}}}{V_{\text{max}}}<1\end{array}$

  (4.37)

All of the unit cells are matched to the load impedance of R₀ when the cells deliver their full powers. At the junction, the voltage is the same for all the cells, and the impedances should be the root square of the inverse of their currents. From the property, the characteristic impedances of the quarter-wavelength transmission lines, which form the three-stage Doherty I amplifier's output combiner shown in Fig. 4.14, are determined as follows:

$Z_{01}=R_0\cdot \sqrt{\frac{m_2}{1+m_1+m_2}}$

  (4.38)

$Z_{02}=\frac{R_0}{1+m_1}\cdot \sqrt{m_1\cdot m_2}$

  (4.39)

$Z_{03}=R_0\cdot \sqrt{m_1}$

  (4.40)

4.2.1.2 Load Modulation, Efficiency and Output Power

For the analysis of the load-modulation and efficiency characteristics, the ideal current source models of the Doherty amplifier shown in Fig. 4.16 can be used. At the region of “0 ~ k₂,” only the carrier amplifier operates, and at the region of “k₂ ~ k₁,” the carrier cell and peaking cell 1 operate. All of the cells are turned on at the region of “k₁ ~ 1.”

In Fig. 4.16A, the current source model of the three-stage I Doherty amplifier at the region of “0 ~ k₂” is shown. The load impedance at the current source of the carrier amplifier can be derived as

$\therefore R_{C,~k2}\left(v_{\text{in}}\right)=\frac{{Z_{01}}^2\cdot {Z_{03}}^2}{{Z_{02}}^2\cdot R_0}$

  (4.41)

The drain efficiency below the second back-off region can be calculated using the RF power and DC power that are given by

$\begin{array}{c}{P}_{\mathit{RF},~k2}\left(v_{\text{in}}\right)=\frac{1}{2}\cdot I_{1,C}{\left(v_{\text{in}}\right)}^2\cdot R_{C,~k2}\left(v_{\text{in}}\right)\\ =\frac{1}{2}\cdot {I_{C,F}}^2\cdot {\left(\frac{v_{\text{in}}}{k_1\cdot V_{\max }}\right)}^2\cdot \frac{{Z_{01}}^2\cdot {Z_{03}}^2}{{Z_{02}}^2\cdot R_0}=\frac{1}{2}\cdot I_{C,F}\cdot V_{\mathit{dc}}\cdot {\left(\frac{v_{\text{in}}}{k_1\cdot V_{\max }}\right)}^2\cdot {\left(\frac{Z_{01}\cdot Z_{03}}{Z_{02}\cdot R_0}\right)}^2\end{array}$

  (4.42)

$\begin{array}{c}{P}_{\mathit{DC},~k2}\left(v_{\text{in}}\right)=I_{\mathit{DC},C}\left(v_{\text{in}}\right)\cdot V_{\mathit{dc}}=\frac{2}{\pi }\cdot I_{1,C}\left(v_{\text{in}}\right)\cdot V_{\mathit{dc}}\\ =\frac{2}{\pi }\cdot I_{C,F}\cdot \frac{v_{\text{in}}}{k_1\cdot V_{\max }}\cdot V_{\mathit{dc}}\end{array}$

  (4.43)

${\mathit{DE}}_{,~k2}\left(v_{\text{in}}\right)=\frac{P_{\mathit{RF}}\left(v_{\text{in}}\right)}{P_{\mathit{DC}}\left(v_{\text{in}}\right)}=\frac{\pi }{4}\cdot \left(\frac{v_{\text{in}}}{k_1\cdot V_{\max }}\right)\cdot {\left(\frac{Z_{01}\cdot Z_{03}}{Z_{02}\cdot R_0}\right)}^2$

  (4.44)

Fig. 4.16B represents the region of “k₂ ~ k₁,” where carrier cell and peaking cell 1 deliver their fundamental currents to the load. The fundamental drain current ratio provided by the carrier cell and peaking cell 1 is defined as

$\therefore {\delta }_1\left(v_{\text{in}}\right)=\frac{I_{1,P1}\left(v_{\text{in}}\right)}{I_{1,C}\left(v_{\text{in}}\right)}$

  (4.45)

The load impedances at the voltage nodes shown in Fig. 4.16B can be calculated using the active load-pull principle:

$R_{T1,~k1}=\frac{{Z_{02}}^2}{{Z_{01}}^2}\cdot R_0$

  (4.46)

$R_{C,~k1}\left(v_{\text{in}}\right)=\frac{{Z_{03}}^2}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]\cdot R_{T1,~k1}}=\frac{{Z_{01}}^2\cdot {Z_{03}}^2}{{Z_{02}}^2\cdot R_0\cdot \left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}$

  (4.47)

$R_{P1,~k1}\left(v_{\text{in}}\right)=\left[1+\frac{1}{{\delta }_1\left(v_{\text{in}}\right)}\right]\cdot \frac{{Z_{02}}^2}{{Z_{01}}^2}\cdot R_0$

  (4.48)

The drain efficiency below the first back-off region can be calculated the same way with the previous case:

$\begin{array}{c}{P}_{\mathit{RF},~k1}\left(v_{\text{in}}\right)=\frac{1}{2}\cdot I_{1,C}{\left(v_{\text{in}}\right)}^2\cdot R_{C,~k1}\left(v_{\text{in}}\right)+\frac{1}{2}\cdot I_{1,P1}{\left(v_{\text{in}}\right)}^2\cdot R_{P1,~k1}\left(v_{\text{in}}\right)\\ =\frac{1}{2}\cdot I_{C,F}\cdot V_{\mathit{dc}}\left\{{\left(\frac{v_{\text{in}}}{k_1\cdot V_{\max }}\right)}^2\cdot \frac{{Z_{01}}^2\cdot {Z_{03}}^2}{{Z_{02}}^2\cdot {R_0}^2\cdot \left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}+{\left(\frac{1}{1-k_2}\right)}^2\cdot m_1\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)}^2\cdot \left[1+\frac{1}{{\delta }_1\left(v_{\text{in}}\right)}\right]\cdot \frac{{Z_{02}}^2}{{Z_{01}}^2}\right\}\end{array}$

  (4.49)

$P_{\mathit{DC},~k1}\left(v_{\text{in}}\right)=\frac{2}{\pi }\cdot \left[I_{1,C}\left(v_{\text{in}}\right)+I_{1,P1}\left(v_{\text{in}}\right)\right]\cdot V_{\mathit{dc}}=\frac{2}{\pi }\cdot I_{C,F}\cdot V_{\mathit{dc}}\cdot \left[\left(\frac{1}{k_1}+\frac{m_1}{1-k_2}\right)\cdot \frac{v_{\text{in}}}{V_{\max }}-\frac{k_2\cdot m_1}{1-k_2}\right]$

  (4.50)

${\mathit{DE}}_{,~k1}\left(v_{\text{in}}\right)=\frac{\pi }{4}\cdot \frac{{\left(\frac{v_{\text{in}}}{k_1\cdot V_{\max }}\right)}^2\cdot \frac{{Z_{01}}^2\cdot {Z_{03}}^2}{{Z_{02}}^2\cdot {R_0}^2\cdot \left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}+{\left(\frac{1}{1-k_2}\right)}^2\cdot m_1\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)}^2\cdot \left[1+\frac{1}{{\delta }_1\left(v_{\text{in}}\right)}\right]\cdot \frac{{Z_{02}}^2}{{Z_{01}}^2}}{\left[\left(\frac{1}{k_1}+\frac{m_1}{1-k_2}\right)\cdot \frac{v_{\text{in}}}{V_{\max }}-\frac{k_2\cdot m_1}{1-k_2}\right]}$

  (4.51)

Fig. 4.16C represents the region of “k₁ ~ 1,” where the current sources of all the cells supply their fundamental currents to the load. The load impedances at the each voltage node can be also calculated in the same way as before:

$R_{T2,~1}=\frac{{Z_{01}}^2}{R_o}$

  (4.52)

$R_{P2,~1}\left(v_{\text{in}}\right)=\left[1+\frac{1}{{\delta }_2\left(v_{\text{in}}\right)}\right]\cdot R_{T2,~1}=\left[1+\frac{1}{{\delta }_2\left(v_{\text{in}}\right)}\right]\cdot \frac{{Z_{01}}^2}{R_0}$

  (4.53)

$R_{T3,~1}\left(v_{\text{in}}\right)=\frac{{Z_{02}}^2}{\left[1+{\delta }_2\left(v_{\text{in}}\right)\right]\cdot R_{T2,~1}}=\frac{{Z_{02}}^2\cdot R_0}{{Z_{01}}^2\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]}$

  (4.54)

$R_{C,~1}\left(v_{\text{in}}\right)=\frac{{Z_{03}}^2}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]\cdot R_{T3,~1}}=\frac{{Z_{01}}^2\cdot {Z_{03}}^2}{{Z_{02}}^2\cdot R_0}\cdot \frac{1+{\delta }_2\left(v_{\text{in}}\right)}{1+{\delta }_1\left(v_{\text{in}}\right)}$

  (4.55)

$R_{P1,~1}\left(v_{\text{in}}\right)=\left(1+\frac{1}{{\delta }_1\left(v_{\text{in}}\right)}\right)\cdot R_{T3,~1}=\frac{{Z_{02}}^2\cdot R_0}{{Z_{01}}^2}\cdot \frac{1+{\delta }_1\left(v_{\text{in}}\right)}{{\delta }_1\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]}$

  (4.56)

where δ₂(v_in) is the fundamental drain current ratio between the currents provided by the carrier cell and peaking cell 1 and by the peaking cell 2, which is given by

${\delta }_2\left(v_{\text{in}}\right)=\frac{I_{1,P2}\left(v_{\text{in}}\right)}{I_{1,C}\left(v_{\text{in}}\right)+I_{1,P1}\left(v_{\text{in}}\right)}$

  (4.57)

The drain efficiency up to the full-power state can be calculated using the RF power and DC power:

$\begin{array}{l}\therefore P_{\mathit{RF},~1}\left(v_{\text{in}}\right)\\ =\frac{1}{2}\cdot I_{C,F}\cdot V_{\mathit{dc}}\cdot \left\{\begin{array}{l}{\left(\frac{Z_{01}\cdot Z_{03}}{Z_{02}\cdot R_0}\right)}^2\cdot \frac{1+{\delta }_2\left(v_{\text{in}}\right)}{1+{\delta }_1\left(v_{\text{in}}\right)}+{\left(\frac{1}{1-k_2}\right)}^2\cdot m_1\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)}^2\cdot \frac{{Z_{02}}^2}{{Z_{01}}^2}\cdot \frac{1+{\delta }_1\left(v_{\text{in}}\right)}{{\delta }_1\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]}\\ +{\left(\frac{1}{1-k_1}\right)}^2\cdot m_2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_1\right)}^2\cdot \left[1+\frac{1}{{\delta }_2\left(v_{\text{in}}\right)}\right]\cdot \frac{{Z_{01}}^2}{{R_0}^2}\end{array}\right\}\end{array}$

  (4.58)

$P_{\mathit{DC},~1}\left(v_{\text{in}}\right)=\frac{2}{\pi }\cdot I_{C,F}\cdot V_{\mathit{dc}}\cdot \left[1+\frac{m_1}{1-k_2}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)+\frac{m_2}{1-k_1}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}-k_1\right)\right]$

  (4.59)

${\mathit{DE}}_{,~1}\left(v_{\text{in}}\right)=\frac{\pi }{4}\cdot \frac{\left\{\begin{array}{l}{\left(\frac{Z_{01}\cdot Z_{03}}{Z_{02}\cdot R_0}\right)}^2\cdot \frac{1+{\delta }_2\left(v_{\text{in}}\right)}{1+{\delta }_1\left(v_{\text{in}}\right)}+{\left(\frac{1}{1-k_2}\right)}^2\cdot m_1\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)}^2\cdot \frac{{Z_{02}}^2}{{Z_{01}}^2}\cdot \frac{1+{\delta }_1\left(v_{\text{in}}\right)}{{\delta }_1\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]}\\ +{\left(\frac{1}{1-k_1}\right)}^2\cdot m_2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_1\right)}^2\cdot \left[1+\frac{1}{{\delta }_2\left(v_{\text{in}}\right)}\right]\cdot \frac{{Z_{01}}^2}{{R_0}^2}\end{array}\right\}}{\left[1+\frac{m_1}{1-k_2}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)+\frac{m_2}{1-k_1}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}-k_1\right)\right]}$

  (4.60)

From Eqs. (4.44), (4.51), (4.60), the peak efficiency of 78.5% can be obtained (the maximum efficiency of class B mode amplifier) at the v_in/V_max of k₂, k₁, and 1.

4.2.1.3 Ideal Operational Behavior

Fig. 4.17 shows the ideal operational behavior of the three-stage I Doherty amplifier with “1:2:2” size ratio, where k₂ and k₁ are 0.33 and 0.6, respectively. It should be noticed that the size of the carrier amplifier is half of the peaking cells since the required current from the carrier amplifier is lower than those from the peaking cells. As shown in Fig. 4.17A and B, the carrier amplifier delivers the maximum efficiency for k (= V_in/V_max) value larger than 0.33 and generates the constant output current for k larger than 0.6 with a constant load impedance. It means that the carrier amplifier operates in a heavily saturated mode for k larger than 0.6. Peaking cell 1 delivers the maximum efficiency for the k larger than 0.6, and peaking cell 2 reaches the maximum efficiency at the peak output power. Fig. 4.17C shows the load-modulation profile; the carrier amplifier's load-modulation ratio is “1.8R₀:R₀:R₀,” and peaking cell 1 and 2 load-modulation ratios are “open:2.5R₀:R₀” and “open:open:R₀,” respectively. Fig. 4.18 illustrates the dynamic load lines of the unit cells. It should be noticed that the carrier amplifier is saturated at the high-power region with the constant current and voltage. Without this saturated-mode operation, there is not any known solution for this Doherty amplifier circuit topology.

The efficiencies of the several three-stage I Doherty amplifiers are evaluated. In the design, the carrier cell is smaller than the peaking cells due to the lower current required as shown in Fig. 4.17A. Fig. 4.19 shows the efficiency profiles versus the output power. The efficiency profiles of the three-stage I Doherty amplifiers are better suited for amplification of a highly modulated signal than that of the three-way Doherty amplifier that has a large efficiency drop between the two peak-efficiency points. Table 4.2 summarizes DE of the Doherty amplifiers for amplification of the modulated WiMAX signal with 8.5 dB PAPR. The three-stage I Doherty amplifiers deliver about 10% higher efficiency compared with the three-way Doherty amplifier for amplification of the 8.5 dB PAPR signal since the amplifiers have large dynamic ranges for high efficiency operation.

Table 4.2

Calculated Efficiencies of Doherty Amplifiers for WiMAX Signal With 8.5 dB PAPR

N-Way Doherty	Back-Off (dB)	Efficiencyavg (%)
Two-way	− 6	59.02
Three-way	− 9.5	61.19

Three-Stage Cell Size Ratio	Back-Off at Max. Efficiency (dB)	Efficiencyavg (%)
1:2:2	− 4.44/−9.5	69.81
1:2:3	− 6/−9.5	69.41
1:3:3	− 4.87/−12	70.46
1:3:4	− 6/−12	71

4.2.2 Three-Stage II Doherty Amplifier

The three-stage II Doherty amplifier is a parallel combination of one carrier amplifier and a peaking amplifier formed by one Doherty amplifier as shown in Fig. 4.20. It should be noticed that one more inverted, Z02, is added for the peaking Doherty amplifier. The fundamental current profiles of the unit cells of the three-stage II Doherty amplifier are shown in Fig. 4.21. Compared with the three-stage I Doherty amplifier, the fundamental current of the carrier amplifier does not fall into a hard saturated state, which is an indication of a linear operation.

4.2.2.2 Load Modulation Circuit

The output-combining circuit of the three-stage II Doherty amplifier is shown in Fig. 4.22. Using the active load-pull principle, the characteristic impedances of the quarter-wave transformers in the circuit can be derived. The fundamental drain current ratios between the carrier and peaking cells are defined as

${\delta }_1\left(v_{\text{in}}\right)=\frac{I_{P1}\left(v_{\text{in}}\right)+I_{P2}\left(v_{\text{in}}\right)}{I_C\left(v_{\text{in}}\right)}=m_1+m_2=m1\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]$

  (4.70)

${\delta }_2\left(v_{\text{in}}\right)=\frac{I_{P2}\left(v_{\text{in}}\right)}{I_{P1}\left(v_{\text{in}}\right)}=\frac{m_2}{m_1}$

  (4.71)

δ₁ and δ₂ are calculated based on the fundamental current profiles shown in Fig. 4.21 with k₁ and k₂ of “0.5” and “0.33,” respectively, and are listed in Table 4.3.

Table 4.3

Calculated δ₁ and δ₂ Versus the Input Power Level

Vin/Vmax	k2	k1	1
Ip1/Ic	0	0.5	1
δ2	0	0	1
δ1	0	0.5	2

The characteristic impedances of the quarter-wave transformers, Z₀₁, Z₀₂, and Z₀₃, defined in Fig. 4.22, are normalized as “MR₀,” “QR₀,” and “PR₀,” respectively. They are related to the load impedances of the unit cells as

$R_C\left(v_{\text{in}}\right)=\frac{M^2\cdot N\cdot R_0}{1+{\delta }_1\left(v_{\text{in}}\right)}$

  (4.72)

$R_{\mathit{Pt}}\left(v_{\text{in}}\right)=\frac{{\delta }_1\left(v_{\text{in}}\right)}{1+{\delta }_1\left(v_{\text{in}}\right)}\cdot Q^2\cdot N\cdot R_0$

  (4.73)

$R_{P1}\left(v_{\text{in}}\right)=\frac{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]\cdot P^2\cdot R_0}{{\delta }_1\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]\cdot Q^2\cdot N}$

  (4.74)

$R_{P2}\left(v_{\text{in}}\right)=\frac{{\delta }_1\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]}{{\delta }_2\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}\cdot Q^2\cdot N\cdot R_0$

  (4.75)

Here, it is assumed that the output load of the three-stage II Doherty amplifier R₀ is transferred to R₀/N at the combining node as shown in the figure.

Using Eqs. (4.72)–(4.75), the load impedances of the unit cells at the back-off output powers can be determined:

$\begin{array}{cc}{R}_C\left(v_{\text{in}}\right)=M^2\cdot N\cdot R_0,& \frac{v_{\text{in}}}{V_{\max }}=0.33\\ =\frac{2}{3}\cdot M^2\cdot N\cdot R_0,& \frac{v_{\text{in}}}{V_{\max }}=0.5\\ =\frac{1}{3}\cdot M^2\cdot N\cdot R_0,& \frac{v_{\mathit{in}}}{V_{\max }}=1\end{array}$

  (4.76)

$\begin{array}{cc}{R}_{P1}\left(v_{\text{in}}\right)=\infty ,& \frac{v_{\mathit{in}}}{V_{\max }}=0.33\\ =\frac{3\cdot P^2\cdot R_0}{Q^2\cdot N},& \frac{v_{\text{in}}}{V_{\max }}=0.5\\ =\frac{3\cdot P^2\cdot R_0}{4\cdot Q^2\cdot N},& \frac{v_{\text{in}}}{V_{\max }}=1\end{array}$

  (4.77)

$\begin{array}{cc}{R}_{P2}\left(v_{\text{in}}\right)=\infty ,& \frac{v_{\text{in}}}{V_{\max }}=0.33\\ =\infty ,& \frac{v_{\text{in}}}{V_{\max }}=0.5\\ =\frac{4}{3}\cdot Q^2\cdot N\cdot R_0,& \frac{v_{\text{in}}}{V_{\max }}=1\end{array}$

  (4.78)

Since all of the unit cells are matched to R₀ at k = 1, the “M,” “Q,” and “P” are calculated as a function of the “N” parameter. The characteristic impedances are given by

$Z_{01}=M\cdot R_0=\sqrt{3/N}\cdot R_0$

  (4.79)

$Z_{02}=Q\cdot R_o=\sqrt{3/\left(4\cdot N\right)}\cdot R_0$

  (4.80)

$Z_{03}=P\cdot R_0=R_0$

  (4.81)

The load-modulation ratios of the carrier cell formulated in Eq. (4.76) are “3R₀”:“2R₀”:“R₀” and the load-modulation ratios of the peaking cell 1 and 2 are “∞”:“4R₀”:“R₀” and “∞”:“∞”:“R₀,” respectively.

4.2.2.3 Load Modulation Behavior and Efficiency

The fundamental currents of the unit cells shown in Fig. 4.21 can be derived using Eqs. (4.62)–(4.64), (4.69):

$I_C\left(v_{\text{in}}\right)=I_{\max }\cdot \frac{v_{\text{in}}}{V_{\max }},0<\frac{v_{\text{in}}}{V_{\max }}<1$

  (4.82)

$\begin{array}{cc}{I}_{P1}\left(v_{\text{in}}\right)=0,& 0<\frac{v_{\text{in}}}{V_{\max }}<k_2\\ \frac{I_{\max }}{1-k_2}\cdot \left[\frac{v_{\text{in}}}{V_{\max }}-k_2\right],& k_2<\frac{v_{\text{in}}}{V_{\max }}<1\end{array}$

  (4.83)

$\begin{array}{cc}{I}_{P2}\left(v_{\text{in}}\right)=0,& 0<\frac{v_{\text{in}}}{V_{\max }}<k_1\\ \frac{I_{\max }}{1-k_1}\cdot \left[\frac{v_{\text{in}}}{V_{\max }}-k_1\right],& k_1<\frac{v_{\text{in}}}{V_{\max }}<1\end{array}$

  (4.84)

Using Eqs. (4.79)–(4.84), the load-modulation behavior and related efficiency characteristic of the three-stage II Doherty amplifier can be calculated. For the analysis, we have assumed that all of the unit cells are operated in class B mode. The ideal current source expressions of the Doherty amplifier for the given output power levels are illustrated in Fig. 4.23.

In the k region of “0 ~ 0.33,” only the carrier amplifier is operated, and at the region of “0.33 ~ 0.5,” the carrier cell and peaking cell 1 are operated. All of the cells are turned on at the region of “0.5 ~ 1.” The ideal current source expression of the three-stage II Doherty amplifier at the region of “0 ~ 0.33” is shown in Fig. 4.23A. The load impedance at the current source of the carrier cell can be written as

$R_{C,~0.33}\left(v_{\text{in}}\right)=\frac{N\cdot {Z_{01}}^2}{R_0}$

  (4.85)

The drain efficiency below the second back-off region can be calculated using the RF power and DC power that are given by

$\begin{array}{c}{P}_{\mathit{RF},~0.33}\left(v_{\text{in}}\right)=\frac{1}{2}\cdot I_C{\left(v_{\text{in}}\right)}^2\cdot R_{C,~k2}\left(v_{\text{in}}\right)\\ =\frac{1}{2}\cdot {I_{\max }}^2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\cdot \frac{N\cdot {Z_{01}}^2}{R_0}=\frac{1}{2}\cdot I_{\max }\cdot V_{\mathit{DC}}\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\cdot N\cdot {\left(\frac{Z_{01}}{R_L}\right)}^2\end{array}$

  (4.86)

$\begin{array}{c}{P}_{\mathit{DC},~0.33}\left(v_{\text{in}}\right)=I_{\mathit{DC},C}\left(v_{\text{in}}\right)\cdot V_{\mathit{dc}}=\frac{2}{\pi }\cdot I_C\left(v_{\text{in}}\right)\cdot V_{\mathit{dc}}\\ =\frac{2}{\pi }\cdot I_{\max }\cdot V_{\mathit{DC}}\cdot \frac{v_{\text{in}}}{V_{\max }}\end{array}$

  (4.87)

${\mathit{DE}}_{,~0.33}\left(v_{\text{in}}\right)=\frac{P_{\mathit{RF}}\left(v_{\text{in}}\right)}{P_{\mathit{DC}}\left(v_{\text{in}}\right)}=\frac{\pi }{4}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}\right)\cdot N\cdot {\left(\frac{Z_{01}}{R_L}\right)}^2$

  (4.88)

In Fig. 4.23B representing the region of “0.33 ~ 0.5,” the carrier cell and peaking cell 1 supply the fundamental current to the load. The load impedances at the current sources can be calculated using the active load-pull principle:

$R_{C,~0.5}\left(v_{\text{in}}\right)=\frac{N\cdot {Z_{01}}^2}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]\cdot R_0}$

  (4.89)

$R_{P1,~0.5}\left(v_{\text{in}}\right)=\left[1+\frac{1}{{\delta }_1\left(v_{\text{in}}\right)}\right]\cdot \frac{R_0}{N}\cdot \frac{{Z_{03}}^2}{{Z_{02}}^2}$

  (4.90)

In the same way with the previous region, the drain efficiency below the first back-off region can be calculated:

$\begin{array}{c}{P}_{\mathit{RF},~0.5}\left(v_{\text{in}}\right)=\frac{1}{2}\cdot I_C{\left(v_{\text{in}}\right)}^2\cdot R_{C,~0.5}\left(v_{\text{in}}\right)+\frac{1}{2}\cdot I_{P1}{\left(v_{\text{in}}\right)}^2\cdot R_{P1,~0.5}\left(v_{\text{in}}\right)\\ =\frac{1}{2}\cdot I_{\max }\cdot V_{\mathit{DC}}\left.{\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\cdot \frac{N}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}\cdot {\left(\frac{Z_{01}}{R_0}\right)}^2+{\left(\frac{1}{1-k_2}\right)}^2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)}^2\cdot \left[1+\frac{1}{{\delta }_1\left(v_{\text{in}}\right)}\right]\cdot \frac{{Z_{03}}^2}{N\cdot {Z_{02}}^2}\right\}\end{array}$

  (4.91)

$P_{\mathit{DC},~0.5}\left(v_{\text{in}}\right)=\frac{2}{\pi }\cdot \left[I_C\left(v_{\text{in}}\right)+I_{P1}\left(v_{\text{in}}\right)\right]\cdot V_{\mathit{dc}}=\frac{2}{\pi }\cdot I_{\max }\cdot V_{\mathit{DC}}\cdot \left[\left(1+\frac{1}{1-k_2}\right)\cdot \frac{v_{\text{in}}}{V_{\max }}-\frac{k_2}{1-k_2}\right]$

  (4.92)

${\mathit{DE}}_{,~0.5}\left(v_{\text{in}}\right)=\frac{\pi }{4}\cdot \frac{{\left(\frac{v_{\text{in}}}{V_{\max }}\right)}^2\cdot \frac{N}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}\cdot {\left(\frac{Z_{01}}{R_0}\right)}^2+{\left(\frac{1}{1-k_2}\right)}^2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)}^2\cdot \left[1+\frac{1}{{\delta }_1\left(v_{\text{in}}\right)}\right]\cdot \frac{{Z_{03}}^2}{N\cdot {Z_{02}}^2}}{\left(1+\frac{1}{1-k_2}\right)\cdot \frac{v_{\text{in}}}{V_{\max }}-\frac{k_2}{1-k_2}}$

  (4.93)

In Fig. 4.23C representing the region of “0.5 ~ 1,” all the current sources of the unit cells supply the fundamental current to the load. The load impedances at the nodes defined in Fig. 4.23C can be calculated in the same way:

$R_{T,~1}\left(v_{\text{in}}\right)=\frac{{Z_{02}}^2}{\left[1+\frac{1}{{\delta }_1\left(v_{\text{in}}\right)}\right]\cdot \frac{R_0}{N}}=\frac{{\delta }_1\left(v_{\text{in}}\right)\cdot N\cdot {Z_{02}}^2}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]\cdot R_0}$

  (4.94)

$R_{P2,~1}\left(v_{\text{in}}\right)=\left[1+\frac{1}{{\delta }_2\left(v_{\text{in}}\right)}\right]\cdot R_{T,~1}=\frac{\left[1+{\delta }_2\left(v_{\text{in}}\right)\right]\cdot {\delta }_1\left(v_{\text{in}}\right)}{{\delta }_2\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}\cdot \frac{N\cdot {Z_{02}}^2}{R_0}$

  (4.95)

$R_{P1,~1}\left(v_{\text{in}}\right)=\frac{{Z_{03}}^2}{\left[1+{\delta }_2\left(v_{\text{in}}\right)\right]\cdot R_{T,~1}}=\frac{1+{\delta }_1\left(v_{\text{in}}\right)}{{\delta }_1\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]}\cdot \frac{R_o\cdot {Z_{03}}^2}{N\cdot {Z_{02}}^2}$

  (4.96)

$R_{C,~1}\left(v_{\text{in}}\right)=\frac{{Z_{01}}^2}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]\cdot \frac{R_0}{N}}=\frac{N\cdot {Z_{01}}^2}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]\cdot R_0}$

  (4.97)

The drain efficiency up to the full-power state can be calculated using the RF power and DC power:

$\begin{array}{c}{P}_{\mathit{RF},~1}\left(v_{\text{in}}\right)=\frac{1}{2}\cdot I_{\max }\cdot V_{\mathit{DC}}\cdot \left\{\begin{array}{l}\frac{N}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}\cdot {\left(\frac{Z_{01}}{R_0}\right)}^2+{\left(\frac{1}{1-k_2}\right)}^2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)}^2\cdot \frac{1+{\delta }_1\left(v_{\text{in}}\right)}{{\delta }_1\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]}\cdot \frac{{Z_{03}}^2}{N\cdot {Z_{02}}^2}\\ +{\left(\frac{1}{1-k_1}\right)}^2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_1\right)}^2\cdot \frac{\left[1+{\delta }_2\left(v_{\text{in}}\right)\right]\cdot {\delta }_1\left(v_{\text{in}}\right)}{{\delta }_2\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}\cdot N\cdot {\left(\frac{Z_{02}}{R_0}\right)}^2\end{array}\right\}\end{array}$

  (4.98)

$P_{\mathit{DC},~1}\left(v_{\text{in}}\right)=\frac{2}{\pi }\cdot I_{\max }\cdot V_{\mathit{DC}}\cdot \left[\frac{v_{\text{in}}}{V_{\max }}+\frac{1}{1-k_2}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)+\frac{1}{1-k_1}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}-k_1\right)\right]$

  (4.99)

${\mathit{DE}}_{,~1}\left(v_{\text{in}}\right)=\frac{\pi }{4}\cdot \frac{\left\{\begin{array}{l}\frac{N}{\left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}\cdot {\left(\frac{Z_{01}}{R_0}\right)}^2+{\left(\frac{1}{1-k_2}\right)}^2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)}^2\cdot \frac{1+{\delta }_1\left(v_{\text{in}}\right)}{{\delta }_1\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_2\left(v_{\text{in}}\right)\right]}\cdot \frac{{Z_{03}}^2}{N\cdot {Z_{02}}^2}\\ +{\left(\frac{1}{1-k_1}\right)}^2\cdot {\left(\frac{v_{\text{in}}}{V_{\max }}-k_1\right)}^2\cdot \frac{\left[1+{\delta }_2\left(v_{\text{in}}\right)\right]\cdot {\delta }_1\left(v_{\text{in}}\right)}{{\delta }_2\left(v_{\text{in}}\right)\cdot \left[1+{\delta }_1\left(v_{\text{in}}\right)\right]}\cdot N\cdot {\left(\frac{Z_{02}}{R_0}\right)}^2\end{array}\right\}}{\left[\frac{v_{\text{in}}}{V_{\max }}+\frac{1}{1-k_2}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}-k_2\right)+\frac{1}{1-k_1}\cdot \left(\frac{v_{\text{in}}}{V_{\max }}-k_1\right)\right]}$

  (4.100)

From Eqs. (4.88), (4.93), and (4.100), the maximum efficiencies of a class B mode amplifier, 78.5%, are obtained at k₂, k₁, and 1, respectively.

Fig. 4.24 shows the ideal load-modulation behavior of the three-stage II Doherty amplifier. As shown in Fig. 4.24A and B, the carrier amplifier operates similarly to the carrier amplifier in a standard Doherty amplifier, that is, operates as a class B amplifier at k smaller than k₂ and delivers the maximum efficiency at k₂ of 0.33. The efficiency is maintained, and its output power is increased linearly in the region with k larger than k₂ since the current is increased linearly while the voltage is maintained due to the modulated load impedance shown in Fig. 4.24C. This behavior is quite different from that of the three-stage I Doherty amplifier. The peaking cell 1 turns on at k = 0.33, operating as a class B amplifier. It delivers the maximum efficiency at k₁ of 0.5, with the same voltage but lower current than those of the carrier amplifier due to the larger load impedance. In the region of k larger than k₁, the power is linearly increased with the maximum efficiency. The peaking cell 2 reaches the maximum efficiency at the peak output power, similarly to the peaking amplifier in a standard Doherty amplifier. Fig. 4.25 illustrates the load lines of the cells. It should be noticed that there is no saturated operation region.