INDEX

Acceptors, 18

ADC. see Analog-to-digital converter

A/D converter, see Analog-to-digital converter

Analog-to-digital converter (ADC):

basic principles, 255–263

differential nonlinearity (DNL), 261

gain error, 261

integral nonlinearity (1NL), 261

linear conversion range, 258

missing code error, 261

offset error, 260

quantization error, 258

signal to noise ratio (SNR), 260

white noise, 260

charge redistribution, 284

counting and tracking, 294–295

flash, 9, 263–270

integrating, 295–300

intermeshed ladder subranging, 278

interpolating flash, 257, 270–273

low-speed converters, 257

Nyquist rate converters, 257

over-sampling, 14

resistor-capacitor hybrid, 284

resistor-string circuit, 284

servo, 295

single-slope, 257

subranging, 274

successive approximation, 9, 257, 282–294

two-step flash, 273–282

Amplitude modulator, see Modulators

Analog systems, 1–2

Auto-zeroing comparator, 177–182

Band-gap reference voltage, 45

Bias circuits, 48–55

delta-VBE based, 53

supply independent, 50–53

temperature dependence, 53

threshold-based, 50

VBE-based, 51

Bode plot, 114

Body effect 29–30

Bubble errors in flash ADCs, 265

Built-in-voltage, 20

Bulk, 23

Cascode:

current source, 59

high-swing, 61

improved high-swing, 62

gain stage, 68

frequency response, 91

Channel, 23

Channel-length modulation, 25

Charge-mode DACs, 231–234

single-stage, 231

two-stage, 233

Charge redistribution ADCs, 290–291

Clock-feed through, 140, 183, 268

Clock period, 3

CMFB, see Common mode feedback

CMOS:

differential stage with cascode load, 102

process, 44–45

CMR. see Common mode range

CMRR, see Common-mode-rejection-ratio

Common centroid, 327

Common-mode range (CMR), 126

differential stage, 127–128

single stage cascode op-amp, 129–131

Common-mode feedback (CMFB), 142–143

continuous-time, 143–147

switched-capacitor, 147–148

Common-mode rejection ratio (CMRR), 96, 307

Comparators:

auto-zeroing, 177–182

cascaded inverters, 180

differential, 182–192

fully differential, 198–205

offset, 175

canceled, 185–186, 198

overdrive, 177–182

regenerative, 192–197

resistive load, 190

switched-capacitor, 181–187

Counting ADCs, 295

Current mirrors, 55–63

cascode current source, 59

high-swing cascode current source, 61

improved high-swing cascode current source, 62

Wilson current-source, 57

Current-mode DACs, 238–244

segmented, 244–252

DAC, see Digital-to-analog converter

D/A converters, see Digital-to-analog converters

Delta-sigma:

converter, 14, 214

modulator, 15

Depletion:

mode FET, 28

region, 20

Dielectric constant, 21

Differential amplifier, 77–84

Differential comparators, 182–191

gain enhanced, 188

offset-canceled, 185–186

regenerative, 192–197

resistive-load, 190

switched-capacitor, 187–189

Differential nonlinearity in DACs, 218

Differential nonlinearity error (DNL), 261

Differential stage constant g_m, 169–170

Diffusion, 19

Digital systems, 1

Digital-to-analog converter (DAC):

basic principles, 214–218

differential nonlinearity (DNL), 218

gain error, 218

integral nonlinearity (INL), 216

least significant bit (LSB), 215

LSB. see Least significant bit

monotonicity, 218

most significant bit (MSB), 215

MSB. see Most significant bit

offset binary code, 215–216

offset error, 215

one's complement code, 215–216

sign magnitude code, 215–216

two's complement code, 215–216

charge mode, 231–234

current mode, 238–244

delta-sigma, 214

hybrid, 234–238

intermeshed ladder, 221–222

Nyquist rate, 214

over-sampling, 214

resistive ladder, 219–221

segmented current mode, 244–252

voltage mode, 218–231

DNL. see Differential nonlinearity

Dopants, 18

Drain, 23

Drift, 23

Dual-slope converters, 257

Dynamic hysteresis, 193

Dynamic latches, 205

Dynamic range, 312

of CMOS op-amps, 126–132

Flash A/D converters, 263–270

bubble errors, 265

interpolating, 270–273

thermometer code, 263

Folded cascode single stage op-amp, 104–106

Frequency compensation, 112, 116, 156, 162, 167

Frequency response, 97, 307

of MOS amplifiers, 84–92

cascode stage, 87

differential stage, 91

source follower, 89

with active load, 85

Full-wave rectifier, 9

Fully differential amplifier, 12, 140–148

Fully differential comparators, 198–205

Fully differential op-amps, 140–148

common-mode feedback, 142–143

Gain error:

in ADCs, 261

in DACs, 218

Gain margin, 114

Gain stages, 63–74

active load, 65

cascode, 68

double cascode, 71

frequency response, 84

MOS transistor load, 64

resistive load, 63

Gate, 23

Hole, 18

Hybrid:

DACs, 234–238

resister-capacitor ADCs, 292–293

Hysteresis, 193

IGFET, 28

Impact ionization, 40

INL. see Integral nonlinearity error

Input offset storage (IOS), 198

Integral nonlinearity:

in ADCs, 261

in DACs, 218

Integral nonlinearity error (INL), 261

Integrating ADCs, 295–300

dual-slope, 296, 298

single-slope, 296

Interpolating converter, 257

Interpolating flash ADCs, 270–273

Inversion layer, 23

IOS. see Input offset storage

JFET, 29

Latches, 205–208

dynamic, 105

Latch-up, 41

Least significant bit (LSB), 215

Linear conversion range, 258

Loop gain, 113

LSB. see Least significant bit

Metal-oxide-semiconductors (MOS), 21

Miller capacitance, 200

Miller effect, 68

Missing code error in ADCs, 261

Mobility, 24

Modulators, 6

Monotonicity in DACs, 218

MOS. see Metal oxide semiconductor structure, 21

capacitor, 21

transistors, 21–27

units and constants for, 30

MOSFET. see MOS transistor

MOS transistor (MOSFET):

body effect, 29–30

bulk, 23

depletion mode, 28

drain, 23

current relations for, 31

inversion layer, 23

linear region, 24

n-channel, 25

parasitic capacitances, 33–36

source, 22

substrate, 23

threshold voltage, 23

units and constants for, 30

Most significant bit (MSB), 215

MSB. see Most significant bit

n-channel transistor (NMOS), 25

Nested-Miller compensation, 112–124

NMOS. see n-channel transistor

Noise in CMOS op-amps, 137–140

Noise in MOSFETs, 41–44

flicker 1/f noise, 44

shot-noise, 41

thermal noise, 42

Noise in op-amps, 97, 312

n-well, 45

Offset binary code, 215–216

Offset error in ADCs, 260

Offset errors in DACs, 215

Offset voltage, 96

Offset-canceled comparators, 185–186, 198

One's complement code, 215–216

OOS, see Output offset storage

Op-amps, see Operational amplifiers

Operational amplifiers (Op-Amps), 95–100

compensation, 112–126

dynamic range, 126–132

finite gain, 304

finite linear range, 304

fully differential, 12, 140–148

noise, 137–140

offset voltage, 304

output stages, 149–164

practical considerations, 303

rail-to-rail input stages, 164–170

random offset, 304

slew rate, 133–137

systematic offset 304

transient response, 133

Output offset storage (OOS), 200

Output stages, 149–164

class AB, 149

combined class AB and class B, 159–160

complementary push-pull, 156

push-pull, 156, 162

Output voltage swing, 127

two-stage op-amp, 129

Over-sampling converter, 14, 214

Parasitic capacitances, 33–39

PCA. see Programmable capacitor array

p-channel transistor, see PMOS

Peak detector, 9

Permitivity, 21

Phase margin, 114

Pinch-off, 25

Pinch-off voltage, 29

PMOS, 26

pn junction, 18

Pole splitting capacitor, 112, 156, 162, 167

compensation, 117–121

Power-supply rejection (PSR), 312

Power-supply rejection ratio (PSRR), 99, 313

Programmable capacitor array (PCA), 9, 231–232

PSR. see Power supply rejection

PSRR. see Power supply rejection ratio

Quantization error, 258

Rail-to-rail input stages, 164–170

Rectifiers, see Full-wave rectifier

Regenerative comparators, 192–197

Relative permitivity, see Dielectric constant

Replica biasing, 190

Resistive-load differential stages, 190–191

Sample-and-hold circuit, 228–229

SAR. see Successive approximation register

Saturation, 25

Saturation current, 20

SC. see Switched-capacitor branch; Switched-capacitor circuits; Switched-capacitor filters

Schmin triggers, 192–197

Segmented current mode DAC, 244–252

self-calibrating, 248–252

Self-calibrating current DACs, 248–252

Semiconductors, 17–21

n-type, 18

p-type, 18

Servo ADCs, 295

Sign magnitude code, 215–216

Signal-to-Noise Ratio (SNR), 260

Single-slope converters, 257

Single-stage operational amplifiers, 100–106

Slew-rate, 307

of op-amps, 97, 133–137

SNR. see Signal-to-noise ratio

Source, 22

followers, 74–76

Stability and compensation of CMOS amplifiers, 112–126

Subranging ADCs, 274

Substrate, 23

Sub-threshold region, see Weak inversion

Successive approximation ADC, 257, 282–284

Successive Approximation Register (SAR), 282

Switched-capacitor:

branch, 3

circuits, 3

comparators, 182–187

filters, 4, 6

sample-and-hold circuit, 228

inverting amplifier, 228

non-inverting amplifier, 228

Thermometer code, 263

Thermometer-type decoder, 239

Threshold voltage, 23

Transient response of op-amps, 133

Two's complement code, 215–216

Two stage operational amplifiers, 106–112

Unity gain frequency, 114, 132

Voltage-mode DACs, 218–231

intermeshed ladder, 221–222

resistive ladder, 219–221

two-stage, 222–227

Voltage reference, 45

Weak inversion, 39

White noise, 42

Wilson's current source, 57

Zero null ing resistor, 156. 162. 167