Author Biographies

Kia Amiri
[email protected]

Kia Amiri received his M.S. and Ph.D. degrees in Electrical and Computer Engineering at Rice University, Houston, TX, in 2007 and 2010, where he has been a member of the Center for Multimedia Communication (CMC) lab. His research focus is in the area of physical layer design and hardware architecture for wireless communication. He is the co-inventor of 7 (pending) patents in this area. During the summer and fall of 2007, Kia worked on developing and implementing MIMO algorithms as part of the Advanced Systems Technology Group in Xilinx, San Jose, CA.

I. Arokiasamy
[email protected]

Arokiasamy I is presently working as Engineering Manager for LTE Layer-1 with Freescale, with over 25 years of Software Architecture and Development experience covering, Industrial Automation Systems for Hydro/Power Stations, Realtime Operating systems(RTOS), compiler backend for MIPS platform as part of CodeWarrior tool, WiMAX PHY for Freescale MSC8144 platform etc. Arokiasamy I received his Bachelors of Engineering in Electronics and Communication Engineering from Indian Institute Of Science, Bangalore, India.

Dr Michael C. Brogioli

Dr Michael C. Brogioli is currently a computer engineering and software consultant in Austin, TX, USA, as well as an adjunct professor of computer engineering at Rice University. In addition, he also serves on the advisory boards of a number of early stage technology companies in the Austin and New York areas. Prior to this, he was a Senior Member Technical Staff and Lead Architect of compilers and build tools in their Technology Solutions Organization. During his time at Freescale, he also worked in conjunction with the hardware development teams on next generation DSP platforms. Prior to his time at Freescale, Dr Brogioli worked with Texas Instruments Advanced Architecture and Chip Technologies group in Stafford, TX, USA and Intel’s Microprocessor Research Labs in Santa Clara, CA, USA. He has authored over a dozen peer reviewed publications as well as co-authored three books in the embedded computing and signal processing space. He holds a Ph.D. and M.S. in Computer Engineering from Rice University in Houston, TX, USA, as well as a B.S. in Electrical Engineering from Rensselaer Polytechnic Institute in Troy, NY, USA.

Cristian Caciuloiu

Cristian Cciuloiu is a Software Engineer in Freescale Semiconductor Romania. He received BSc/MSc in Computer Science in 1999 from the University POLITEHNICA of Bucharest, Romania. Cristian joined Freescale (Motorola’s Semiconductor Products Sector at that time) in 2000 and worked in various embedded software projects for several DSP and PowerPC platforms. From 2005 onwards, he held senior technical leadership and managerial positions, the most recent being the Software Architect for the VoIP Media Gateway Software Products from the Signal Processing Software and Systems team in Freescale Romania.

Joseph R. Cavallaro
[email protected]

Joseph R. Cavallaro is a Professor in the Electrical and Computer Engineering Department and Director of the Center for Multimedia Communication at Rice University, Houston, Texas. He is also a Docent in the Centre for Wireless Communications at the University of Oulu in Finland. He received a B.S. from the University of Pennsylvania (1981), an M.S. from Princeton University (1982) and a Ph.D. from Cornell University (1988), all in Electrical Engineering. He has been engaged in research since 1981 after joining AT&T Bell Laboratories as a Member of Technical Staff and his research interests include VLSI signal processing with applications to wireless communication systems.

Stephen Dew
[email protected]

Stephen Dew is currently a Compiler Engineer at Freescale Semiconductor. Previously, he held positions in Applications Engineering at Freescale and StarCore, LLC. He received a Masters of Science in Electrical and Computer Engineering from the Georgia Institute of Technology in 2001.

Dr Chris Dick
[email protected]

Dr Chris Dick is the DSP Chief Scientist at Xilinx and the engineering manager for the Xilinx Wireless Systems Engineering team. Chris has worked with signal processing technology for two decades and his work has spanned the commercial, military and academic sectors. Prior to joining Xilinx in 1997 he was a professor at La Trobe University, Melbourne Australia for 13 years and managed a DSP Consultancy called Signal Processing Solutions. Chris’ work and research interests are in the areas of fast algorithms for signal processing, digital communication, MIMO, OFDM, software defined radios, VLSI architectures for DSP, adaptive signal processing, synchronization, hardware architectures for real-time signal processing, and the use of Field Programmable Arrays (FPGAs) for custom computing machines and real-time signal processing. He holds a bachelor’s and Ph.D. degrees in the areas of computer science and electronic engineering.

Melissa Duarte
[email protected]

Melissa Duarte was born in Cucuta, Colombia. She received the B.S. degree in Electrical Engineering from the Pontificia Universidad Javeriana, Bogota, Colombia, in 2005, and the M.S and Ph.D. degrees in Electrical and Computer Engineering from Rice University, Houston, TX, in 2007 and 2012 respectively. Her research is focused on the design and implementation of architectures for next-generation wireless communications, full-duplex systems, feedback based Multiple Input Multiple Output (MIMO) antenna systems, and the development of a Wireless Open Access Research Platform (WARP) for implementation and evaluation of algorithms for wireless communications. Melissa was a recipient of a Xilinx Fellowship at Rice University 2006–2007, a TI Fellowship at Rice University 2007–2008, and a Roberto Rocca Fellowship 2009–2012.

Michelle Fleischer
[email protected]

Michelle Fleischer grew up in Southeastern Michigan and majored in electrical engineering at Michigan Technological University in Houghton Michigan where she earned her BSEE (1992) and MSEE (1995) degrees. In 1992 she started working on a research grant for the Keweenaw research center performing acoustic modeling experiments for NASA and active noise control experiments for the US Army Tank Command (TACOM). In 1995 she started work at Texas Instruments in Dallas Texas. In 2006 she joined Freescale in Chicago Illinois as a Field Applications Engineer, supporting key accounts such as Motorola and RIM for the wireless group and key networking accounts for the Networking and Multimedia group. Ms. Fleischer has authored numerous application notes, design documents, software specifications, and software designs throughout her career.

Umang Garg
[email protected]

Umang Garg is currently an Engineering Manager for LTE Layer 2 software development in Networking and Multimedia Solutions Group at Freescale He has 10 years of experience in software development for DSP and Communication Processors. His current work interest is in the area of leveraging multi-core architectures for LTE software development while previous work interests have included Audio, Speech, Image Processing and VoIP technologies. Umang has a B.E.(Honors) in Computer Systems Engineering from University of Sussex, U.K. and a Master of Science in Advanced Computing from Imperial College, U.K.

Vatsal Gaur
[email protected]

Vatsal Gaur is a DSP Software Engineer with over 7 years of experience in wireless baseband domain. He has worked on Layer-1 software development for various technologies such as GSM, GPRS, EDGE, WiMAX and LTE. His current work includes algorithm development and system design to enable various features of LTE eNodeB. Before joining Freescale, Vatsal had worked as a technical lead at Hughes software systems (now Aricent Technologies). Vatsal received his Bachelors of Engineering in Electrical and Electronics from Birla Institute of Technology, India.

Mircea Ionita
[email protected]

Mircea Ioni is the manager of the Networking and Signal Processing Software and Systems Team within Freescale Semiconductor Romania since 2007. Mircea joined Freescale/Motorola in 2001 where he held senior technical and managerial positions until 2007 when he was appointed to lead the Networking and Signal Processing Software and Systems Team. Mircea received his Bachelors of Science, Masters of Science and Doctorate degrees in Electronic Engineering from the University POLITEHNICA of Bucharest, Romania.

Nitin Jain
[email protected]

Nitin Jain received his B.E. degree specializing in Electronics and Communications from Visvesvaraya Technological University, Belgaum, India, in 2003. From 2004 to 2007, he worked with MindTree’s Research group and was responsible for developing Speech and Audio algorithms, and integrating them within different Bluetooth and mobile products. Nitin joined Freescale in 2008 as a Senior Engineer in the Networking group and has been involved in WiMAX and LTE physical layer development for Macro and Femto product segments on Freescale’s baseband devices. As a Lead Engineer, his recent assignment is to perform LTE Femto eNB integration and verification with commercial-grade higher layers and user equipments. His work has appeared in renowned magazines and conference in Embedded and DSP domain.

Michael Kardonik
[email protected]

Michael Kardonik’s career begun at Motorola Semiconductor Israel at 1999 where he worked on board support packages for PowerQUICC II processors. Later, Michael led engineering team that designed and implemented SmartDSP OS for Motorola’s StarCore DSP. After his relocation to Austin, US, Michael served as DSP Applications Engineer, Tools engineer responsible for advanced debugging technologies. Today, Michael is part of Architecture team at Freescale Semiconductor working on current and next generation of QorIQ. Michael received his Bachelors of Arts in Economics and Computer Science degree from Ben Gurion University of Negev Israel and Masters of Science in Software Engineering degree from the University of Texas at Austin.

Robert Krutsch

Robert Krutsch is a DSP Software Engineer at Freescale Semiconductor with a primary focus in medical and baseband applications. He received a BSc/MSc degree specializing in automatics and computer science from the Polytechnic University of Timisoara; a BSc/Msc degree from the Automation Institute at the University of Bremen.

Tai Ly
[email protected]

Tai Ly obtained his PhD in High Level Synthesis in 1993 from the University of Alberta, Canada, and has since worked in Research and Development in a number of companies including Synopsys, 0-In Design Automation, Mentor Graphics and Synfora Inc, He holds 14 Patents in the fields of High Level Synthesis, Assertion Verification, Formal Verification, and Clock Domain Crossing Verification. He is currently a Principal Engineer in National Instrument.

Akshitij Malik
[email protected]

Akshitij Malik is a Software Engineer with over 11 years of experience in the Telecom/Wireless industry. Akshitij worked as a Senior Principal Engineer at Hughes Systique and Hughes Software Systems LLC before moving on to his current role as a Lead Software Engineer at Freescale Semiconductor. Past works include development of L3 software for WCDMA RNCs, L2 software for WiMAX Base-Stations amongst other topics. Akshitij received his Bachelors of Engineering in Computer Engineering from the University of Pune, India.

Robert Oshana
[email protected]

Robert Oshana 30 years of experience in the software industry, primarily focused on embedded and real-time systems for the defense and semiconductor industries. He has BSEE, MSEE, MSCS, and MBA degrees and is a Senior Member of IEEE. Rob is a member of several Advisory Boards including the Embedded Systems group, where he is also an international speaker. He has over 100 presentations and publications in various technology fields and has written several books on Embedded software technology. Rob is an adjunct professor at Southern Methodist University where he teaches graduate software engineering courses. He is a Distinguished Member of Technical Staff and Director of Global Software R&D for Networking and Multimedia at Freescale Semiconductor.

Raghu Rao
[email protected]

Raghu Mysore Rao is a Principal Engineer and System Architect with the Communications Signal Processing Group, Communications Business Unit, Xilinx Inc. He and his team are currently working on signal processing and digital communication algorithms for FPGAs. He is an IEEE senior member. He has a Ph.D. in wireless communications from University of California, Los Angeles. In the past, he has worked at Texas instruments India, Exemplar Logic Inc. and Mentor Graphics Inc. His interests are in digital communication and signal processing algorithms and architectures for their efficient implementation on FPGAs.

Ashutosh Sabharwal
[email protected]

Ashutosh Sabharwal is a Professor of Electrical and Computer Engineering at Rice University. His research interests are in information theory, network protocols and high-performance wireless platforms. He is the founder of Rice Wireless Open-Access Research Platform (http://warp.rice.edu), which is in use at 100+ organizations worldwide.

Yang Sun
[email protected]

Yang Sun received the B.S. degree in Testing Technology and Instrumentation in 2000, and the M.S. degree in Instrument Science and Technology in 2003, both from Zhejiang University, Hangzhou, China. He received the Ph.D. degree in electrical and computer engineering from Rice University, Houston, Texas, in 2010. He is currently a senior engineer in Qualcomm Inc. His research interests include parallel algorithms and VLSI architectures for wireless communication systems, digital signal processing systems, multimedia systems, and general purpose computing systems.

Adrian Susan
[email protected]

Adrian Susan is the technical manager of L1 DSP Software Components Team in Freescale Romania located in Bucharest. Adrian is a Software Engineer, having graduated from the “Politehnica” University of Timișoara with a B.Sc. in Computer Science. Adrian worked for Freescale Romania since 2004 where he was a member of the team in charge with the development of Freescale VoIP multimedia gateway.

Andrew Temple
[email protected]

Andrew Temple is an application engineer with over 10 years of experience in the semiconductor industry. Andrew worked as an applications engineer at Texas Instrument and StarCore LLC before moving on to his current role as a DSP Applications Engineer at Freescale Semiconductor. Past works include application notes on power consumption, bus interfacing, deadlock arbitration, Serial Rapid IO usage, Ethernet performance and connectivity, amongst other topics. Andrew received his Bachelors of Science in Computer Engineering and Masters of Science in Software Engineering degrees from the University of Texas at Austin.

Guohui Wang
[email protected]

Guohui Wang received his B.S. degree in EE from Peking University, Beijing, China, and M.S. degree in CS from Institute of Computing Technology, Chinese Academy of Sciences, Beijing, China. Since 2008, he has been pursuing a Ph.D. degree in Department of Electrical and Computer Engineering, Rice University, Houston, Texas. His research interests include mobile computing, VLSI signal processing for wireless communication systems and parallel signal processing on GPGPU.

Bei Yin
[email protected]

Bei Yin received his B.S. degree in Electrical Engineering from Beijing University of Technology, Beijing, China, in 2002, and his M.S. degree in Electrical Engineering from Royal Institute of Technology, Stockholm, Sweden, in 2005. From 2005 to 2008, he worked at ARCA Technology Co. as an ASIC/SoC design engineer. He is currently a Ph.D. student in the Department of Electrical and Computer Engineering at Rice University, Houston, Texas. His research interests include VLSI signal processing and wireless communications.