Chapter 8. Low-Noise Amplifiers

The amplifier shown in Figure 8.1 can be generally represented as shown in Figure 8.2. Thus, the design of a typical low-noise amplifier must address the problem of determining the impedance looking into the source and load from the active device. In this chapter, we will first explain the gain that is an important measure of a low-noise amplifier as a function of the source and load reflection coefficients, Γ_S and Γ_L, shown in Figure 8.2, and we will also look at the Γ_S and Γ_L that give maximum gain from a design perspective. However, in designing a low-noise amplifier, not only the gain but also the noise figure must be taken into consideration. We will discuss how to select Γ_S and Γ_L by considering the noise figure and gain.

In addition, because the active device has some inherent degree of feedback, it shows a negative resistance for specific Γ_S and Γ_L, and because of this, the amplifier can turn into an oscillator. Therefore, the method for examining whether or not the active device yields a negative resistance at a given frequency will be presented, and then the method of stabilizing the active device in that situation will be explored.

The reflection coefficient seen from the active device input when a load Γ_L is connected to the active device output is denoted as Γ_in; similarly, the reflection coefficient seen from the active device output when a source Γ_S is connected to the active device input is denoted as Γ_out. Therefore, using the S-parameters of the active device, the input and output reflection coefficients are expressed in Equations (8.1) and (8.2).

The port is connected to the Thevenin equivalent circuit to measure its reflection coefficient. Here, E_o and Z_o represent the port voltage and impedance, respectively. Using superposition, voltage V in Figure 8.4 can be determined as

Voltage V is the sum of the incident and reflected voltages as shown in Equation (8.3). The incident voltage is given by

Therefore, substituting Equation (8.4) into Equation (8.3), reflected voltage V^– from Equation (8.3) is given by

Expressing reflected voltage V^– in Equation (8.5) in terms of a normalized incident and reflected voltages a and b, we obtain Equations (8.6) and (8.7).

Reflected voltage b in Equation (8.6) consists of two terms. The first term is the reflection coefficient looking into the Thevenin circuit when E_T = 0. The second term is the reflection coefficient that depends on the voltage source E_T that can be interpreted as the voltage appearing across the port impedance Z_o when E_o = 0. In circuit theory, E_T is determined by measuring the open-circuit voltage of a one-port network. Similarly, impedance Z_T is obtained by measuring the impedance of the one-port network with all the internal sources in that network turned off. The reflection coefficient given by Equation (8.6) corresponds to this circuit theory. The reflection coefficient Γ_T is obtained by measuring the reflection coefficient with source E_T turned off. Similarly, the reflection coefficient due to source E_T is found by measuring the voltage delivered to the port impedance Z_o instead of measuring the open-circuit voltage. The sum of the two reflections constitutes the total reflection in Equation (8.6). The difference is in measuring the internal source contribution by using a termination Z_o instead of an open circuit.

Now, the amplifier in Figure 8.3 can be represented by the simple schematic that uses the Thevenin equivalent circuit shown in Figure 8.5. The input can be represented by the Thevenin equivalent circuit, while the output can be represented by a simple load. The active device is represented by the S-parameters, and the incident and reflected voltages (a₁, a₂) and (b₁, b₂) are defined using the reference impedances that measured the S-parameters of the active device.

Next, we examine the power delivered to the load when a source represented by a Thevenin equivalent circuit is connected to an arbitrary load Γ_L, as shown in Figure 8.6. Note that both the reflection coefficients of the load and source represented by the Thevenin equivalent circuit are measured based on the same reference impedance Z_o.

From Equation (8.6), the reflected voltage b_g toward the load in Figure 8.6 is expressed in Equation (8.8)

while the reflected voltage from the load is shown in Equation (8.9).

Since b_g = a_L, and a_g = b_L, the incident voltage toward the load a_L can be obtained from Equations (8.8) and (8.9), as shown in Equation (8.10).

Thus, the power delivered to the load is

Substituting Equation (8.10) into Equation (8.11), P_L can be expressed with Equation (8.12).

In addition, the available power from the source is delivered to the load when the source and the load impedances are conjugate matched, that is, when Γ_S = (Γ_L)*. Substituting Γ_S = (Γ_L)* into Equation (8.12),

To verify that the result given by Equation (8.13) is the available power, Equation (8.7) is substituted into Equation (8.13), and the manipulation of P_A results in

We can see that P_A in Equation (8.14) is equal to the available power that can be obtained from the source having internal resistance Z_S. This is expressed in Equation (6.5) of Chapter 6. In addition, using Equations (8.12) and (8.13), the ratio of power delivered to the load to available power can be computed as

In measuring the transducer gain, the available power from a source with a 50-Ω internal resistance is measured by connecting a power meter (with a 50-Ω internal resistance) to the source. Then, inserting the amplifier between the meter and the source, and measuring the delivered power to the power meter, the ratio of power delivered to the load to available power can be obtained and the ratio can be interpreted as the transducer gain given by Equation (8.16).

On the other hand, from a design perspective, when the output impedance of the amplifier is conjugate matched by varying the load impedance, the available power at the output can be obtained. The ratio of the available output power to the available power from the source is called available power gain and is defined in Equation (8.17).

Using the simplified schematic shown in Figure 8.7, the available power gain G_A is found to be equal to the ratio of P_L/P_A. Since the input matching network is assumed to be lossless, the available power from the active device input is equal to that from the source. In addition, the tuning of the load impedance for the maximum power delivery is equivalent to the tuning of Γ_L. Thus, the available power gain is equal to P_L/P_A.

The available power gain is the maximum gain derived from the output for a given source impedance, which is a function of the source impedance only. Therefore, the available power gain represents the degradation of the gain due to the fixed source impedance.

Based on the symmetrical concept for a fixed load, when the source impedance is adjusted to deliver maximum power to the load as shown in Figure 8.8, then the ratio of the input power to the delivered load power is called power gain. Using the simplified schematic, power gain can be defined as

The power gain, as an indicator of the degradation of the gain due to a chosen fixed load, is commonly used in design. The previous three power gains can be expressed in terms of the two-port S-parameters and the source and load reflection coefficients or impedances at the device plane. This will be discussed further in the next section.

In Figure 8.9, the one-port circuit seen from the load Γ_L can be represented by the Thevenin equivalent circuit that includes the active device and the input circuit, and the previously developed power relationship in Equations (8.13) and (8.15) can be applied. At the device output plane, the Thevenin reflection coefficient Γ_T is shown in Equation (8.18).

The Thevenin reflected voltage b_T is the reflected voltage that appears across the reference impedance Z_o when the load Γ_L is replaced by Z_o. From Figure 8.10, b_T is given by Equation (8.19).

Note that Γ_in = S₁₁ because a₂ = 0. Applying Equation (8.10), a₁ is given by

Thus, from Equation (8.20), the Thevenin reflected voltage b_T is shown in Equation (8.21).

Therefore, the equivalent circuit seen from the load Γ_L can be represented as shown in Figure 8.6.

Applying Equation (8.12), the power delivered to the load Γ_L is given by Equation (8.22).

Since the available power from the source is the same as in Equation (8.13), the transducer power gain G_T is expressed as

The transducer gain in Equation (8.23) is derived at the device output plane, but it can also be derived at the device input plane. The derived transducer gain is expressed as

Although G_T in Equation (8.24) is different from that in Equation (8.23), G_T in Equation (8.24) is the same as that in Equation (8.23).

Note that the transducer power gain is defined in terms of the available power at the input and the delivered power to the load. The available power at the output is the power when the load impedance is conjugate matched to Γ_out, as shown in Figure 8.11. This condition is Γ_L = (Γ_out)*. Then, the available power gain can be obtained by substituting Γ_L = (Γ_out)* into the transducer gain in Equation (8.23). Therefore, the available power gain is given by Equation (8.25).

The available power gain can also be interpreted as the maximum gain for a fixed Γ_S.

Using Equation (8.10), P_in results in Equation (8.27).

In addition, a₁ and a₂ in Figure 8.12 are given by

Substituting a₁ and a₂ of Equations (8.28) and (8.29) into b₂ gives Equation (8.30).

Then, b₂ can be computed as Equation (8.31).

Thus, the power delivered to the load is given by Equation (8.32).

Therefore, based on the definition of power gain, the ratio of the input power P_in to the power delivered to the load P_L is given by Equation (8.33).

The power gain is the ratio of input power to the power delivered to the load. However, the power gain can be interpreted in another way. The maximum power is delivered to the device’s input when the source impedance is conjugate matched to the device’s input impedance. The ratio of the input power at the conjugate matching condition to the power delivered to the load leads to the same result given by Equation (8.33). This is found in problem 8.4 at the end of this chapter. Thus, another way of interpreting the power gain is that it represents the maximum gain of the active device for a specific fixed load Γ_L.

Since Mason’s gain is the gain measured after the active device has been completely stabilized by removing feedback, it can be considered as the true gain of the active device. Therefore, it is used as the criterion for determining whether a measured device at an arbitrary frequency is active or passive.

Since S₁₂, which represents the feedback from output to input, is generally less than 1, a unilateral approximate expression for the transducer gain is often used in amplifier design and active device assessment. To obtain the unilateral transducer power gain, S₁₂ = 0 is substituted into Equation (8.25). In this case, since Γ_in = S₁₁ and Γ_out = S₂₂, the transducer power gain is expressed in Equation (8.35).

When the input and output reflection coefficients in Figure 8.13 are each conjugate matched (Γ_S = (Γ_in)*, Γ_L = (Γ_out)*), maximum gain is then obtained and the maximum unilateral gain G_TU,_max is shown in Equation (8.36).

The calculation of the unilateral gain in Equation (8.35) is simple compared to the computations for other gains and it was commonly used in the past to evaluate the maximum gain of active devices when computers were not readily available.

1. A region of Γ_L that gives |Γ_in| ≤ 1; and

2. A region of Γ_S that gives |Γ_out| ≤ 1.

Condition 1 limits the range of load selection and is called the load stability region, and condition 2 limits the range of source selection and is thus called a source stability region. After determining the locus of the boundary (|Γ_in| = 1 and |Γ_out| = 1), the locus divides a region of Γ_L or Γ_S into two regions. Once a stable region is found between those two regions, the remaining region becomes automatically unstable, which gives rise to a negative resistance. From Figure 8.14, the input reflection coefficient is expressed by Equation (8.37)

where D = S₁₁S₂₂ – S₂₁S₁₂.

The reflection coefficient Γ_in for the impedance of a passive device satisfies |Γ_in| ≤ 1. However, for the impedance that has a negative resistance, |Γ_in| > 1. From Equation (8.37), Γ_L that satisfies |Γ_in| = 1 is

Multiplying both sides of Equation (8.38) by |S₂₂/D| and rewriting, the following expression is obtained:

Equation (8.39) can also be represented as Equation (8.40).

Constants A and B represent two points on the Γ_L plane and are expressed as follows:

From Equation (8.40), m represents the ratio of the distances from a point Γ_L to two points, A and B. The locus satisfying Equation (8.40) is well-known and is represented by the circle shown in Figure 8.15. The internal (I) and external (E) division points with the division ratio m:1 can be obtained from points A and B. The center of the circle becomes their midpoint between I and E. Half of the distance between points I and E becomes the radius of the circle.

Points I and E are determined as

The center of the circle C_L and the radius r_L are then determined from points I and E as

Substituting A, B, and m into Equations (8.41a) and (8.41b), the center C_L and the radius r_L in the Γ_L plane are given by

Load stability circles drawn using Equations (8.42a) and (8.42b) are shown in Figure 8.16. In order to determine the region of stability between the two regions divided by the load stability circle, one test point is necessary. The load of Γ_L = 0 provides a good test point. Setting Γ_L = 0 results in the input reflection coefficient Γ_in = S₁₁. If |S₁₁| < 1, it implies that |Γ_in| < 1 for Γ_L = 0. Since |Γ_in| < 1 for Γ_L = 0, the stable region is located inside the unit Smith-chart circle that includes the origin, as shown in Figure 8.16(a). Otherwise, the region that includes the origin is unstable.

Similarly, the region of Γ_S giving |Γ_out| < 1 can be determined. The output reflection coefficient Γ_out in Figure 8.17 is expressed as

If Γ_out is set to |Γ_out| = 1, the source stability circles can be determined. Equation (8.43) can be obtained when the subscripts 1 and 2 in Equation (8.37) are interchanged. Therefore, by interchanging those subscripts in Equation (8.42), the center C_S and radius r_S of the source stability circle giving |Γ_out| = 1 in the Γ_S–plane are given by Equations (8.44a) and (8.44b).

The stability circles drawn with the center C_S and radius r_S are shown in Figure 8.18 and, similar to our reasoning in the case of the load stability circle, when |S₂₂| < 1, the region inside the unit Smith chart that includes the origin is the stable region shown in Figure 8.18(a). Otherwise, the region that includes the origin is the unstable region. In Figures 8.18(a) and (b), the resulting stable regions inside the unit Smith chart are represented by the shaded area.

Substituting the center and radius of the load stability circle obtained from Equation (8.42) into Equation (8.45), we obtain

Equation (8.47) can be rewritten as Equation (8.48).

Expanding Equation (8.48), we obtain Equation (8.49).

Note that the following identity holds:

Squaring each term of Equation (8.49) and substituting Equation (8.50) into Equation (8.49), and then rewriting, Equation (8.51) is obtained.

Thus, the necessary condition for Equation (8.51) is

Dividing both sides of Equation (8.52) by 2|S₁₂S₂₁| yields the stability factor k, which is used to examine the unconditional stability of the two-port network, as shown in Equation (8.53).

The other required condition can be obtained from Figures 8.16(b) and 8.18(b). The radius is large enough to include the Smith chart. The condition is r_L – |C_L| > 1. Substituting the center and radius results from Equation (8.42) into this condition gives Equation (8.54).

This requires that the right-hand side of the equation be positive, which is expressed in Equation (8.55).

From the stability factor,

is obtained. However, since the second term of Equation (8.56) is less than 1, from Equation (8.55), the first term must be greater than 1. Therefore,

Equation (8.57) is an additional condition that must be satisfied. In addition, from the source stability circles, the following condition is obtained with Equation (8.58):

In conclusion, the necessary and sufficient conditions for the unconditional stability of a two-port circuit are expressed in Equations (8.59a)–(8.59c).

These are the three conditions that must be simultaneously satisfied.

Equations (8.61a) and (8.61b) are obtained by rewriting Equations (8.60a) and (8.60b).

To solve the simultaneous equations, Γ_L is expressed in terms of Γ_S using Equation (8.60a) and vice versa, which yields

Substituting Equation (8.62a) into Equation (8.61a) and manipulating the results in the quadratic equation of Γ_S as shown in Equation (8.63),

where

The solution to this quadratic equation is obtained in Equation (8.66).

Here, B₁/(2|C₁|) is a real number and can be expressed as shown in Equation (8.67).

The term B₁/(2|C₁|) is greater than 1 when k > 1. To prove this, the denominator is expressed as shown in Equation (8.68).

Squaring the right-hand side of Equation (8.67) and using Equation (8.68) gives Equation (8.69).

This can be simplified into Equation (8.70).

Making use of the identity (a + b)² – 4ab = (a – b)² and rewriting Equation (8.70) yields Equation (8.71).

Thus, B₁/(2|C₁|) is greater than 1 when k > 1.

This implies that when the transistor is stable, that is, when k > 1, the term inside the square root is positive. In the selection of the sign of the square root in Equation (8.66), the sign must be selected such that |Γ_SM| ≤ 1 because Γ_SM cannot be implemented using a passive circuit for |Γ_SM| ≥ 1. Since the magnitude of (C₁)*/C₁ outside the bracket [•] in Equation (8.66) is 1, the terms in the bracket [•] must therefore be less than 1. The terms in the bracket [•] can be considered in the form x – (x² – 1)^½ and x + (x² – 1)^½. The term x + (x² – 1)^½ becomes greater than 1 for x ≥ 1. Therefore, the realizable solution of Γ_SM with a passive circuit is expressed in Equation (8.72).

Similarly, Γ_LM can be obtained as shown in Equation (8.73)

where

When k < 1, |Γ_SM| = 1 and |Γ_LM| = 1. The source and load impedances have purely imaginary values, and real power is not delivered. That is, when k < 1, conjugate matching with Equations (8.72) and (8.73) is not possible.

The maximum gain is obtained by substituting Γ_SM and Γ_LM, given in Equations (8.72) and (8.73), into the transducer power gain, but the calculation is a fairly complicated process and reference 1 at the end of this chapter can be consulted for details. The gain thus obtained is known as the maximum available gain (MAG), G_max and is expressed in Equation (8.74).

In the case of instability, k < 1, meaningful gain can be derived up to the boundary of the stability condition. Thus, substituting k = 1 into Equation (8.74), the maximum meaningful gain is derived while maintaining stability. This is also known as the maximum stable gain (MSG) and is expressed as

where C₂ is defined in Equation (8.76).

In addition, for ease of mathematical computation, a normalized gain parameter g_p is defined as in Equation (8.77).

The locus of Γ_L giving the same power gain implies that g_p is a constant. For a constant g_p, Equation (8.75) can be rewritten as Equation (8.78).

With the following definitions expressed in Equations (8.79) and (8.80),

Equation (8.78) can be rewritten as

Then, rewriting Equation (8.81), we obtain

Using Equation (8.82), we can then obtain Equation (8.83) for a circle.

Therefore, the center C_p and radius r_p of the circle giving the same power gain are expressed in Equations (8.84) and (8.85).

The circle thus obtained is called a power gain circle.

In addition, when Γ_L is changed to Γ_S and the subscripts 1 and 2 are interchanged in Equation (8.75), it becomes the equation for the available power gain expressed in Equations (8.86) and (8.87).

Similarly, to obtain the locus of Γ_S with the same available power gain, the following normalized gain is defined in Equation (8.88).

Interchanging the subscripts 1 and 2 in Equations (8.84) and (8.85) will yield the radius r_a and center C_a for the available gain circle expressed in Equation (8.89).

The circles thus obtained are called available gain circles and they have the same available power gain.

To obtain the locus of Γ_S having the same noise figure, a new noise figure is defined for computational simplicity, as shown in Equation (8.92).

The noise-figure equation can then be written as Equation (8.93).

Expanding that equation, it can be written as Equation (8.94).

Equation (8.94) can then be rewritten as

Multiplying both sides of Equation (8.95) by 1 + N_i results in Equation (8.96).

Thus, the locus of Γ_S having the same N_i is given in Equation (8.97).

Therefore, the radius r_F and center C_F of the noise circle are expressed in Equations (8.98a) and (8.98b).

First, the available power gain is the gain for a given source reflection coefficient with a conjugate matched load. The available power gain represents the gain degradation due to the specific source reflection coefficient and it is used to evaluate the gain decrease by the source mismatch. Similarly, the power gain is the gain for the selected load with the conjugate matched source, and it represents the gain degradation for selected load reflection coefficient.

Next, the maximum gain appears when the simultaneous conjugate matching at both the input and output of an active device is achieved. The maximum available power gain, MAG, can be obtained if the active device is stable. When it is unstable, the maximum stable gain, MSG, can be obtained at the stability boundary k = 1. The unilateral approximation is applied to estimate the gain. The maximum unilateral gain is an approximate maximum power gain. This clearly shows the extent of the improvement in the transducer power gain |S₂₁|² by conjugate matching. The passivity or activity of an active device can also be found using the Mason’s gain, which determines whether an active device can amplify or not. The Mason’s gain is the gain that is obtained after the removal of feedback from the output to the input of an active device. The previously described gains are summarized in Table 8.1.

The stability circles help us to determine whether negative resistance appears at the input or output for the selected load or source reflection coefficients, and to know whether or not there is the possibility of oscillation. Accordingly, we are able to identify the region of stability where the load or source reflection coefficients do not induce negative resistance at the input or output. Source stability circles determine whether or not the selected source reflection coefficient is in the region of stability, while the load stability circles determine whether or not the selected load reflection coefficient is in the region of stability.

Figure 8.21 shows the S-parameter data model of the ATF-36077 provided in ADS. The model has S-parameter values for 0.5 GHz to 18 GHz at V_ds = 1.5 V and I_d = 20 mA. No separate DC bias circuit is required to operate the data model and it can be simulated just for the RF signal. In the case of the design that uses a large-signal model, the S-parameters at a given DC bias should be computed by first using the large-signal model, and a similar design can then be carried out using the computed S-parameters following the design shown below.

The simulated stability factor, MAG, and the minimum noise figure are shown in Figure 8.23. From Figure 8.23, k is greater than 1 above 16 GHz but k is less than 1 in the design frequency band. The MaxGain1 corresponding to MAG or MSG shows a gain above 15 dB at the design frequency of 10 GHz, as shown in Figure 8.23. Note that MaxGain1 in the design frequency band becomes the MSG because k is less than 1. The minimum noise figure, NFmin is constant as 0.3 dB below 6 GHz. This is not a simulation error. The device data itself is 0.3 dB. In the author’s opinion, because a noise figure below 0.3 dB could not be accurately measured, the data are entered as constant 0.3 dB. However, the minimum noise figure is found to be about 0.5 dB at the design frequency of 10 GHz. Thus, the low-noise amplifier that meets the design specifications can be designed using the selected ATF-36077.

Since the selected device is unstable at the design frequency band, stabilization is necessary to make k greater than 1 at 10 GHz. One way of improving the stability is shown in Figure 8.24. A series feedback inductor Le is connected to the source terminal. To some extent, the inductor added to the source terminal generally increases the stability factor. Figure 8.24 is a circuit setup in which the inductance is swept from 0 to 0.3 nH at a fixed frequency of 10 GHz to evaluate the change in k.

Figures 8.25(a) and (b) show the simulated stability factor. Figure 8.25(a) shows the stability factor change for Le. From Figure 8.25(a), k has a maximum value of 1.031 at 10 GHz when Le is approximately 0.05 nH, and the stability is thus achieved. Therefore, Le is set to 0.05 nH and k is plotted with respect to frequency as shown in Figure 8.25(b), which shows k greater than 1 at the design frequency. The improvement in the k value is achieved by the addition of Le. However, the bandwidth is narrow and the k value is too close to 1. A slight error in the implementation of Le may cause the active device to be unstable even at 10 GHz and further stabilization would be necessary. There are several other ways to improve the stability of the circuit further. The addition of resistors is one of the methods commonly used (see reference 1 at the end of this chapter). The method of improving k by the addition of a shunt resistor to the drain terminal is used in this book. The reason for the connection to the drain terminal is to minimize the impact of the amplifier on the noise figure.

Figure 8.26 shows a shunt stabilizing circuit added to the drain terminal. An R1 = 35 Ω chip resistor (for improving the value of k) is connected in series to a 100 nF DC block capacitor. The microstrip lines represent connecting lines and land patterns for mounting the chip resistor and DC block capacitor. The shunt stabilizing circuit in Figure 8.26 is configured as a subcircuit that is named R_stab. Thus, the amplifier circuit can be represented by a simple schematic, which avoids the necessity of a complex schematic during the design.

The R_stab subcircuit is added to the stability evaluation circuit in Figure 8.24 and a parameter-swept S-parameter simulation for the resistor value R1 in Figure 8.26 is performed to determine the change in k. The value of R1 is swept from 0 to 50 Ω. Figure 8.27(a) shows the k for R1. The value of resistor R1 is selected as 36 Ω. For the value of 36 Ω, Figure 8.27(b) shows the plot of the stability factor for a frequency range of 1–18 GHz. The stability factor k is found to be greater than 1 for wider frequency range. However, the gain slightly decreases due to the resistor added for stabilization, and the effect is slightly compensated by modifying Le = 0.04 nH.

Marker m1 reads the minimum noise figure of 0.47dB, while marker m2 reads the maximum available gain of 15.27 dB. The gain and noise figure performances depend on the choice of the source reflection coefficient, which must be properly selected in accordance with the design goal. Considering the given specifications of a 10-dB gain and a 1.5-dB noise figure, the source reflection coefficient Γ_S is selected as marker m1 that has a minimum noise figure of 0.47 dB. The selected source reflection coefficient in Figure 8.29 will give a noise figure of 0.47 dB and a gain above 13 dB.

The source reflection coefficient thus selected is Γ_S = m1 = 0.609∠133.7°. The corresponding conjugate matching load reflection coefficient is given by

The determined Γ_S and Γ_L are converted to the impedances, and they are given by

Z_source = (Z_in)^* = 50*(0.285 + j0.398)

Z_load = (Z_out)^* = 50*(0.301 – j0.169)

To confirm that the selected impedances give the estimated gain and noise figure at the design frequency, the circuit in Figure 8.30 is set up. Since the source and load impedances have the selected impedances, the gain and noise figure should show a gain above 13 dB and a noise figure of 0.47 dB.

The simulated gain and noise figure are shown in Figure 8.31. As expected, the gain is found to be more than 13 dB and the noise figure is about 0.47 dB at 10 GHz. Thus, the selected impedances yield the gain and noise figure that satisfy the design specifications in the design frequency band. Therefore, the selected source and load impedances are found to be appropriate for the desired low-noise amplifier.

In Figure 8.32, the values of capacitor C1_L and inductor L1_L are optimized for maximum power transfer. The goal is set using |S₂₁| and the maximum power transfer is implemented by setting |S₂₁| = 1. Note that |S₂₁| = 1 is a sufficient condition for conjugate matching. Since the matching circuit consists of lossless elements, the S-parameters satisfy the relation |S₁₁|² + |S₂₁|² = 1. Thus, S₁₁ = 0 when |S₂₁|² = 1. In addition, as the lumped-element matching circuit is a passive circuit, S₂₁ = S₁₂, by invoking the lossless condition it can also be seen that S₂₂ = 0. After the optimization, the values of the lumped-element matching circuit in Figure 8.32 are updated by the optimized values. The value of C1_L is 0.504 pF and that of L1_L is 0.675 nH. Figure 8.33 shows the S-parameters of the lumped-element matching circuit with updated values. It can be seen that |S₂₁| is close to 1 while |S₂₂| is close to 0, which indicates successful impedance matching.

Similarly, the lumped-element output matching circuit is set up as shown in Figure 8.34. After optimization, the values of the lumped-element output matching circuit are determined as C1_L = 0.478 pF and L1_L = 0.231 nH. The simulated S-parameters for the determined values are shown in Figure 8.35, where |S₂₁| = 1, while |S₁₁| = |S₂₂| = 0 and the successful impedance matching is achieved.

The lumped-element input and output matching circuits are configured as subcircuits. Using these subcircuits, the low-noise amplifier circuit is configured as shown in Figure 8.36 to confirm the designed matching circuits.

Figure 8.37 is the simulated gain and noise figure. The gain from Figure 8.37 is found to be more than 13 dB, while the noise figure is below 1.5 dB in the desired frequency band. Due to the frequency-dependent matching circuits, the difference arises as the frequency moves away from the design frequency of 10 GHz.

The approximate transformation can be done by replacing the lumped elements with transmission lines. Figure 8.38 shows the transmission-line circuit that can replace the designed lumped-element matching circuit. The transmission line with characteristic impedance Z₁ and length θ₁ can act as a series inductor, while the two parallel-connected open transmission-line stubs having characteristic impedance Z₂ and length θ₂ can act as the shunt capacitor. The values of Z₁, θ₁, Z₂, and θ₂ can be approximately determined using Equations (8.99a) and (8.99b).

It is worth noting that because the variables in Equation (8.99a) are Z₁ and θ₁, there are two degrees of freedom in implementing the value of an inductor. The higher Z₁ is, the closer it can be implemented as a series inductor. However, considering that the packaged active device is mounted and soldered on top of the inductor transmission line, there should be no problem soldering the active device. Thus, the inductor transmission line has a width wider than that of the active device’s terminal. In addition, the two degrees of freedom are also true for Equation (8.99b), and the lower Z₂ is, the closer to a capacitor it will be. However, because increasing the transmission line’s width shortens its length, the implemented transmission-line circuit is close to two cascaded transmission lines with step-discontinuity rather than a cross-junction connection. To avoid this, the lengths of the transmission lines connected at the cross-junction are made greater than their widths.

In addition, when an external circuit is connected directly to the matching circuit, the field of the cross-junction shown in Figure 8.38 may be affected, especially when a coaxial connector is directly connected to the matching circuit. To prevent this, the transmission line with the same value of characteristic impedance Z_o is inserted. The output transmission line has no function when viewed from the load side. In addition, the length must be sufficiently long to adequately attenuate the higher-order modes arising in the cross-junction.

Figure 8.39 shows a schematic to determine through optimization the input matching circuit composed of microstrip lines. As previously explained, the microstrip line provides two degrees of freedom, such as the width and length. Of these two, the width is fixed as previously described. The matching circuit is configured by simply changing the length. The width of the transmission line for the shunt capacitor is set slightly wider than the width of a 50-Ω line as W_C = 1.0 mm, while the width of the transmission line for the series inductor is set slightly smaller than the width of a 50-Ω line as W_L = 0.5 mm. With the widths thus fixed, the lengths of the two transmission lines, l_L and l_C are adjusted in a way similar to that of the lumped-element matching circuit until maximum power is delivered. The optimized dimensions are also shown in Figure 8.39.

The optimized S-parameters are shown in Figure 8.40, where |S₂₁| = 1 while |S₂₂| = 0, and the successful impedance matching is achieved. Thus, the microstrip-line matching circuit with the optimized dimensions can be used in place of the lumped-element input matching circuit. Similarly, the microstrip-line output matching circuit is set up as shown in Figure 8.41. The length of the microstrip lines l_L and l_C are optimized for the maximum power transfer. The impedance of port 1 is the complex conjugate of the load impedance, while the impedance of port 2 is 50 Ω.

The S-parameters for the optimized dimensions are shown in Figure 8.42. From the results, |S₂₁| is approximately 1 while |S₁₁| and |S₂₂| are approximately 0, which indicates successful matching. Thus, the microstrip-line matching circuit with the optimized dimensions can be used in place of the lumped-element output matching circuit.

Figure 8.43 shows the simulation results for the low-noise amplifier with the microstrip-line input and output matching circuits. It can be seen that the gain of 13.6 dB and the noise figure of 0.54 dB have been achieved. The values of the gain and the noise figure are close to those that result from using the lumped-element matching circuits. However, the gain is found to be reduced by about 0.1 dB and the noise figure increases by 0.07 dB. This is caused by the losses of the input and output microstrip-line matching circuits.

A DC block and an RFC are usually required for DC biasing. Taking into consideration the parasitic inductance discussed in Chapter 2, it is difficult to use chip capacitors as a DC block in the current design’s frequency band. Therefore, the coupled lines shown in Figure 8.44 are usually used as a DC block. However, the spacing between the coupled lines generally tends to be too narrow to be fabricated. In addition, the bandwidth of the coupled-line DC block can also be too narrow. As a result, the values of the previously determined matching circuits can sometimes change significantly due to the coupled-line DC block. Although the redesign of the matching circuits due to the inclusion of the coupled-line DC block is similar to the previous design of the matching circuit, the discussion of the coupled-line DC block will not be covered here.

Recently, a high-frequency chip DC block capacitor has been developed and widely commercialized. The advantage of this capacitor is that it generally does not cause any significant changes to the designed matching circuit compared with the coupled-line DC block shown in Figure 8.44. In this section, we will illustrate a process to redesign the matching circuits, including the chip DC block capacitor. ATC’s 1-pF chip DC block capacitor is used as a DC block capacitor.¹ The S-parameters of the chip DC block capacitor are provided by the manufacturer and are shown in Figure 8.45, where the 1-pF chip DC block capacitor operates as a DC block from 5 GHz to 26.5 GHz. Using the S-parameters of the chip DC block capacitor that are provided, the chip DC block capacitor can be configured using the S2P data item of ADS. Refer to the datasheet for more details on its frequency characteristics.

1. American Technical Ceramics Corporation, ATC 500S Series BMC Broadband Microwave Millimeter-Wave 0603 NPO SMT Capacitors, available at www.atceramics.com.

Figure 8.46 shows the redesigned input matching circuit. The chip DC block capacitor is configured as a data item, and the RFC is composed of a quarter-wavelength microstrip line (see Chapter 3) and a radial stub. The dimensions of the radial stub MRSTUB are determined through a separate simulation. The parameters Wi and Angle are fixed, and the length is determined to yield its input impedance 0. The DC gate voltage is applied to the DC bias point shown in Figure 8.46. The radial open stub and DC block capacitor have effects on the designed input matching circuit but they are not significant. Thus, it is necessary to carry out a new optimization. The goals are similar to the previous optimization. The microstrip line lengths l_C and l_L are selected as the optimizing parameters of the input matching circuit, as in the case of the previous optimization process. The other variables such as the line width and length of the RF choke, except length l_C and l_L, are set to be constant and the optimization is carried out. The optimized S-parameters are shown in Figure 8.47. As in the previous optimization, S₁₁ and S₂₂ are both 0, while |S₂₁| is close to 1, indicating successful matching. Note that S₂₁ is slightly less than 1 due to the loss of the microstrip lines and the DC block capacitor.

Similarly, the output matching circuits are set up as shown in Figure 8.48. The DC block is configured using the data item and the same RFC as in the input matching circuit. The DC drain voltage is supplied at the DC bias point shown in Figure 8.48. The simulation results are shown in Figure 8.49. Similar to the input matching circuit, S₁₁ and S₂₂ are both 0, while |S₂₁| is 1, indicating successful matching.

Figure 8.50 shows the gain and noise figure of the low-noise amplifier with the determined input and output matching circuits that include the DC supply circuits. The gain at 10 GHz is about 13.7 dB, which is about 0.1 dB less than that of the previous low-noise amplifier. The noise figure increases by approximately 0.3 dB from the previous value of about 0.48 dB. This is believed to be due to the loss of the DC block capacitor.

Alternatively, the stability at low frequency can be checked using the S-parameters of the low-noise amplifier rather than those of the active device. The frequency-dependent stability circles of the low-noise amplifier can be similarly plotted on the Smith chart. In this case, the source and load impedances Γ_S and Γ_L become the port impedances that result in Γ_S = Γ_L = 0. Therefore, the stability at low frequency can be checked by determining whether or not the origin of the Smith chart is in the stable region at each frequency. In the latter method, since the source and load stability locus is fixed as Γ_S = Γ_L = 0, the origin of the Smith chart that repeatedly determines whether or not the origin is in the stable region is visually much easier compared to the former method that checks the stability at the active device plane.

Sometimes, the unstable frequency can be missed because the source and load stability circles are drawn at many discrete frequency samples. The stability of the designed low-noise amplifier means that Γ_in and Γ_out for the selected Γ_S and Γ_L do not show negative resistances. Therefore, |Γ_in| < 1 and |Γ_out| < 1 must be satisfied for the selected Γ_S and Γ_L. In the latter method, Γ_in = S₁₁ and Γ_out = S₂₂ and so |S₁₁| < 1 and |S₂₂| < 1 must also be satisfied. Therefore, the determination of low-frequency stability based on the S-parameters of the low-noise amplifier is dependent on:

1. Checking the frequency range in which |S₁₁| > 1 and |S₂₂| > 1.

2. Plotting the stability circles and checking whether their origins are stable or unstable for the frequency range in which |S₁₁|>1 and |S₂₂|>1.

This procedure significantly reduces the work required to check the stability of the designed low-noise amplifier. When the designed matching circuits for the low-noise amplifier are unstable at some low frequencies, the matching circuits should be readjusted until they move out of the unstable region. The circuit shown in Figure 8.51 is set up to determine stability at frequencies other than the design frequency. Note that the matching circuits include the DC bias supply circuits shown in Figures 8.46 and 8.48.

After simulating the S-parameters, |S₁₁| and |S₂₂| are plotted. Fortunately, |S₂₂| < 1 for all frequencies; however, at around 1 GHz, |S₁₁| > 1, as shown in Figure 8.52. Note that |S₁₁| can be greater than 1 because the load Γ_L lies in the unstable region. Thus, the load stability circle at 1 GHz is also drawn with S₁₁. The stable region can be determined by using the ADS function l_stab_region(S), which identifies whether or not the inside of the stability circle is stable. The load’s stable regions at 1 GHz are inside the stability circle. This means that the load at the origin of the Smith chart is unstable at 1 GHz. As a result, |S₁₁| is greater than 1 at a frequency of 1 GHz. Therefore, the designed amplifier is unstable at 1 GHz.

The reason for the appearance of |S₁₁| > 1 at low frequencies could be attributed to the DC block capacitors inserted in the matching circuits, which open at low frequencies. Therefore, to solve the stability problem, the impedance of the input or output matching circuit seen from the active device is set close to 50 Ω at low frequencies. This looks somewhat like a trial-and-error approach but it is the commonly used method. Usually, the S-parameters of most active devices are measured using 50-Ω reference impedances and the S₁₁ or S₂₂ of active devices is usually less than 1 for most cases; consequently, the devices are stable in these situations. Therefore, for any frequency at which the active device is unstable, setting the impedance seen from the active device into the source or load close to 50 Ω at that frequency will achieve stability. In this sense, the impedance seen from the active device is set close to 50 Ω at low frequencies. Most stabilizing circuits can essentially be regarded as the application of this concept. It is worth noting that the insertion of the low-frequency stabilizing resistors can affect the DC bias voltage or the flow of current, and this must be prevented when inserting the resistors.

In the case of the instability in the designed low-noise amplifier, the modification of the input matching network may be efficient for solving the stability problem. The change in Γ_S at 1 GHz will cause changes in the load stability circle’s center and radius at this frequency. Thus, the load at the origin of the Smith chart will be stable. To change the load stability circle’s center and radius, a 50-Ω resistor is inserted in the input matching circuit, as shown in Figure 8.53. The capacitor C1 acts as a bypass capacitor. For the modified input matching circuit, the S-parameters of the amplifier are simulated again with the output matching circuit remaining unchanged. The stability circles S₁₁, and S₂₂ are shown in Figure 8.54.

As can be seen in that figure, both S₁₁ and S₂₂ lie in the unit circle. In conclusion, the low-frequency instability is solved by inserting a low-frequency stabilizing resistor in the DC supply circuit; this must be done carefully so as not to affect the matching circuit at the design frequency. In this way, the instability at low frequencies can be largely eliminated.

The substrate used for the implementation of the microstrip matching circuits has an inherent dielectric loss as well as a conductor loss due to the finite conductivity of the conductor material. Table 8.4 shows the loss-related parameters of the selected substrate, which is Taconic’s TLX-9;² the reader may refer to the corresponding datasheet. Note that the substrate losses are not considered in the previously designed low-noise amplifier. The substrate losses can be included in the ADS circuit simulation. It is also possible to include the substrate losses in the settings of the MSUB in the circuit simulation.

2. Taconic Advanced Dielectric Division, TLX, available at www.taconic-add.com/en--index.php.

Careful consideration of the substrate loss is particularly important because the loss degrades the noise figure, especially the substrate loss at the input matching circuit because it degrades the noise figure of the designed low-noise amplifier. Similar optimization techniques can be applied to further refine the values of the matching circuits and take into consideration the substrate loss.

Figure 8.56 shows the distributed inductor circuit for the source inductor. This inductor is implemented using a microstrip line and four vias. The ATF-36077 transistor has two source terminals. Thus, the value of the distributed inductor circuit in Figure 8.56 must have twice the inductance value of the source inductor, so its value is 0.08 nH.

In Figure 8.56, the reference inductor circuit is shown on the right side and it has an inductance value of 0.08 nH. The reference inductor circuit provides an impedance reference of 0.08 nH. The inductance of a single via is about 0.08 nH. To implement the source inductor, the number of vias is 4, and the inductance of 0.08 nH can be obtained adjusting the microstrip-line length. Sweeping the length of the microstrip line TL1, the appropriate microstrip-line length can be found that makes the impedance of the distributed inductor circuit equal to that of the reference inductor circuit. The value of the microstrip-line length thus obtained through the circuit simulation is shown in Figure 8.56. Then, the layout for the distributed inductor circuit in that figure is generated using the autolayout utility of ADS and modified as shown in Figure 8.57. The layer settings for Momentum simulation are configured by importing the MSUB information in Figure 8.56.

A slight difference between the Momentum- and circuit-simulated impedances is observed at 10 GHz. In Momentum simulation, by reducing the microstrip-line length that is determined in the circuit simulation, the inductor value of 0.08 nH can be achieved. Figure 8.58 shows the comparison of Momentum- and circuit-simulated impedances with the reference impedance, which is the impedance computed from the reference inductor circuit. It can be seen that the three impedances show good agreement.

The Momentum simulation of the whole matching circuit is still difficult to perform due to its limitations. In particular, Momentum cannot handle the DC block that has an unknown three-dimensional structure. Thus, the DC block and the load-side 50-Ω microstrip line are removed and the layout is prepared for the Momentum simulation. The input matching circuit layout for Momentum simulation is shown in Figure 8.59. Figure 8.60 compares the Momentum-simulated impedances to the circuit-simulated impedances. Here, the circuit-simulated impedance is computed using the circuit that corresponds to the input matching circuit layout in Figure 8.59. Figure 8.60(a) shows the comparison of the two source impedances seen from the active device. Similarly, the output matching circuit layout is prepared and Momentum simulated. Figure 8.60(b) shows the comparison of the load impedances seen from the active device.

Due to the approximate models for discontinuities in the circuit simulation, the Momentum-simulated impedances are slightly different from the circuit-simulated impedances. Figure 8.61 shows the comparison of the two impedances for the input and output matching circuits after the length adjustments. They are found to show good agreements. The Momentum-simulated impedance is tuned by adjusting the lengths of both the inductor line and the open stub in the matching circuit. The length reduction by about 0.15 mm of the two open stubs in parallel and the reduction by about 0.12 mm for the input matching circuit make the circuit-simulated and Momentum-simulated input impedances coincide, as shown Figure 8.61(a). Similarly, the length reduction by about 0.07 mm of the two open stubs and the reduction by about 0.08 mm of the inductor line for the output matching circuit make the circuit-simulated and Momentum-simulated output impedances coincide, as shown Figure 8.61(b).

It is necessary to verify whether or not the Momentum-simulated impedances provide adequate performances for the low-noise amplifier. The matching circuits as well as the source inductor obtained from Momentum simulation are represented by the S-parameter data shown in Figure 8.62. Note that the DC block is the same as the circuit simulation and it is also included as a data item. Figure 8.62 shows the circuit setup to confirm the Momentum-simulated results.

Figure 8.63 shows the simulated gain and noise figure. The gain is about 13 dB and the noise figure is about 0.9 dB. Comparing the gain and noise figure with those of the circuit-simulation results, it can be seen that the gain has decreased while the noise figure has increased; in particular, the noise figure has increased by 0.2 dB. This is thought to be due to the substrate loss included in the Momentum simulation. However, the gain is found to be more than 12 dB and the noise figure is found to be less than 1.5 dB, which satisfies the design specifications.

The gate bias voltage was adjusted from the pinch-off voltage until a specified drain current of 10 mA flowed. A gate voltage of V_GS = –0.33 V provided the drain current close to 10 mA. The measured drain current was then 10.7 mA. After DC bias adjustment, the noise figure and gain were measured using a noise figure analyzer (NFA). In measuring the noise figure, an attenuator was inserted at the input of the low-noise amplifier. The internal function of the NFA was able to calibrate the inserted attenuator. This was done to reduce the mismatch between the low-noise amplifier and the noise source. After the calibration, the noise figure and gain of the low-noise amplifier was measured.

Figure 8.65 shows the measured and simulated noise figure and gain for the fabricated low-noise amplifier. The measured gain peak shifts downward about 300 MHz and shows the narrower bandwidth compared to the simulated gain. The measured noise figure does not show frequency shift but the noise figure is generally higher than the simulated noise figure. The measured noise figure at 10 GHz is about 1.1 dB, while the simulated noise figure is about 0.89 dB. The noise figure increases by about 0.2 dB. It can be seen that the measured results satisfy the design specifications. However, the measured noise figure and gain show a difference from the simulated noise figure and gain.

1. Substrate parameter variations such as permittivity and thickness.

2. Pattern tolerance in the PCB fabrication.

3. Inaccuracy in the simulation; the S-parameters and noise parameters of the active device may be different from the ADS data.

Factors 1 and 2 cannot explain the shift of the measured gain peak. Since the permittivity change is 2.45–2.55 in the datasheet, the shift of the gain peak is estimated at about

Since Δf is about 300 MHz, Δf cannot be explained using the permittivity change. Also, Δf cannot be explained by the thickness change. Similarly, the pattern tolerance is determined but it cannot explain Δf.

To determine the difference between the measured and simulated gain and noise figure, the S-parameters of the input and output matching circuits are measured. The S-parameters of both the active device with the series feedback inductor and the DC block capacitor are also measured. The measured S-parameters of the input and output matching circuits are close to the simulated S-parameters; however, the S-parameters of the active device show a significant difference compared with the generated S-parameters using the ADS data model. Thus, it can be concluded that the difference in the S-parameters of the active device is the key reason for the difference between the measured and simulated gain and noise figure. This may be caused by differences in the S-parameter measurement environment. In order to verify that the difference of the gains in Figure 8.65 is caused by the difference of the active device’s S-parameters, the gain is computed using the measured S-parameters of the active device and then compared with the measured gain. Figure 8.66 shows the comparison of the computed gain with the measured gain. Although there is still a slight difference, they show good agreement. In conclusion, before creating the design, it is better to measure the S-parameters and noise parameter in advance; the use of measured parameters in the design is also recommended.

• A stability check is required to prevent the designed amplifier from becoming an oscillator. A source stability circle is the locus of Γ_S, which yields |Γ_out| = 1. The load stability is the locus of Γ_L, which yields |Γ_in| = 1. Using the stability circles, the stable regions of Γ_S and Γ_L can be found.

• Stability is determined by using the stability factor k. In the case of unconditional stability, simultaneous conjugate matching is possible.

• Available gain and noise circles provide a convenient way to find the gain and noise figure degradations. Using these circles, we can determine the optimum source and load impedances that satisfy the design objective.

• A low-noise amplifier that satisfies the design objective can be fabricated by following the procedures described below:

1. Select an active device.

2. Perform a stability check at the design frequency. If unstable, stabilize the active device using stabilization circuits.

3. Draw the available gain circles and noise circles.

Determine the optimum source-load impedances.

4. Design input and output matching circuits that give the determined impedances.

5. Add DC bias circuits to the designed matching circuits. Modify the designed matching circuits to compensate for the effects of the DC bias circuit.

6. Perform a stability check at low frequencies. If unstable, modify the matching circuits to make them stable.

7. Perform a layout check with Momentum.

8. Complete fabrication and measurement.

2. D. M. Pozar, Microwave Engineering, 2nd ed. New York: John Wiley & Sons, Inc., 1998.

3. G. D. Vendelin, A. M. Pavio, and U. L. Rohde, Microwave Circuit Design Using Linear and Nonlinear Techniques, New York: John Wiley & Sons, Inc., 1990.

8.2 Prove the transducer power gain in Equation (8.24) using the input reflection coefficient of the active device.

8.3 Available power gain can be directly derived using the Thevenin equivalent circuit at the device output plane rather than using the conjugate matching condition described in Section 8.1.3.2. Derive the available power gain using the Thevenin equivalent circuit at the device output plane shown in Figure 8P.2.

8.4 The power gain is the fraction of the input power delivered to the load. Using this definition, the power gain is derived in the text.

However, power gain can also be thought of as the ratio of the power delivered to the load to the input power when the input is matched for maximum power transfer. Referring to Figure 8P.3, prove the power gain using this definition.

8.5 Solve the ten problems below by using the S-parameters of ATF-35076 in the S-parameter library in ADS shown in Figure 8P.4.

(1) Plot the stability factor and maximum gain for the frequency range of 2–14 GHz. Find the maximum gain G_max at 8 GHz and identify this gain as either MSG or MAG.

(2) Find the minimum noise figure F_min (dB) at 8 GHz. Also, determine if this device is adequate for amplifier design; does it satisfy the noise figure < 1 dB and the gain > 10 dB at 8 GHz?

(3) Figure 8P.5 is a schematic for the stabilization of a transistor using series inductive feedback. Find the value of inductor L_s that yields a maximum stability factor.

(4) For the selected L_s in Figure 8P.5, find the maximum gain and minimum noise figure at 8 GHz.

(5) Draw the available gain circles degraded by {1, 2, 3} dB from the maximum gain; then draw the noise-figure circles degraded by {0.1, 0.2, 0.3} dB from minimum noise figure.

(6) When source reflection coefficient Γ_S is selected to yield the minimum noise-figure point, find the load reflection coefficient Γ_L that yields the maximum gain for the selected Γ_S. Also, find the corresponding impedances Z_S and Z_L in real and imaginary formats and find the expected gain G_ex and noise figure F_ex for the selected impedances.

(7) Plot the frequency response for the frequency range 2–14 GHz with a 0.05-GHz step. Verify the expected gain and noise figure that appear at 8 GHz.

(8) Design the low-pass input and output matching networks with lumped-element inductors and capacitors. Find the values of input and output inductors and capacitors C_i, L_i, C_o, and L_o.

(9) Using the matching circuits that have the values of inductors and capacitors determined in the preceding step, check the desired gain and noise figure that appear with the frequency response plots for the frequency range of 2–14 GHz with a 0.05-GHz step.

(10) Using DCFEED and DC_Block in ADS, add the bias circuit to the previous amplifier circuit. Find the frequency where the amplifier is unstable using the ADS function for the frequency range 2–14 GHz with a 1-GHz step.