8An analytical space vector pulse width modulation method for multilevel inverters

In this chapter, an analytical space vector pulse width modulation (SVPWM) method for multilevel voltage source inverter (VSI) is proposed based on the intrinsic relation between multilevel and two-level SVPWM. In this method, the dwelling time of vector calculation is derived from the two-level inverter. Using linear transformation, the dwell time of vectors for two-level VSI can be transformed into multilevel VSI. A novel classification of voltage vectors is proposed to determine switching pattern of PWM sequence and used up to the eleven-level inverter, which can be extended to the n-level inverter as well.

8.1Relation between three- and two-level SVPWMs

The first step of the nearest three vector algorithm is to determine the subsection where the reference vector is located, and the second step is to calculate the dwelling times of each vector. As the number of inverter levels increases, the subsection becomes very small. In this section, an analytical SVPWM algorithm for multilevel inverters is explained.

8.1.1SVPWM for the two-level inverter

The two-level inverter space vector diagram is shown in Fig. 8.1. The reference voltage vector is described as

${\text{V}}^{*}={\text{V}}_{\text{A}}+{\text{V}}_{\text{B}}{\text{e}}^{\text{j}\frac{2\pi }{3}}+{\text{V}}_{\text{C}}{\text{e}}^{\text{j}\frac{4\pi }{3}}.$

The switching times of the SVPWM-based inverter can be calculated using volt-second relation. The volt-second balance equation in matrix form is

$\left[\begin{array}{ccc}{\text{<msup> V <mo>′</mo> </msup>}}_{1\text{x}}& {\text{<msup> V <mo>′</mo> </msup>}}_{2\text{x}}& 0\\ {\text{j<msup> V <mo>′</mo> </msup>}}_{1\text{y}}& {\text{j<msup> V <mo>′</mo> </msup>}}_{2\text{y}}& 0\\ 0& 0& 1\end{array}\right]\left[\begin{array}{c}{\text{<msup> t <mo>′</mo> </msup>}}_1\\ {\text{<msup> t <mo>′</mo> </msup>}}_2\\ \text{T}\end{array}\right]=\left[\begin{array}{c}{\text{V}}_{\text{x}}^{\text{*}}\text{T}\\ {\text{jV}}_{\text{y}}^{\text{*}}\text{T}\\ \text{T}\end{array}\right]$

The dwelling times of vectors are

$\begin{array}{l}{\text{<msup> t <mo>′</mo> </msup>}}_1=\text{mTsin}\left(\frac{\pi }{3}-\text{θ}\right)\\ {\text{<msup> t <mo>′</mo> </msup>}}_2=\text{mTsin}\left(\text{θ}\right)\\ {\text{<msup> t <mo>′</mo> </msup>}}_0=\text{T}-{\text{<msup> t <mo>′</mo> </msup>}}_1-{\text{<msup> t <mo>′</mo> </msup>}}_2,\end{array}$

where m is the modulation index, θ is the angle of rotation, t′1, t′2, and t′0 are the dwell times of voltage vectors V′1, V′2, and V′0, respectively.

Fig. 8.1: Space vector diagram of the two-level inverter.

8.1.2Switching times calculation for the three-level inverter

Figure 8.2 shows the space vector diagram of the three-level inverter. The relation between the switching times and the voltage vectors are given by

$\begin{array}{c}{\text{t}}_1{\text{V}}_1+{\text{t}}_2{\text{V}}_2+{\text{t}}_3{\text{V}}_3={\text{V}}^{*}\text{T}\\ {\text{t}}_1+{\text{t}}_2+{\text{t}}_3=\text{T}\end{array}.$

In matrix form

$\left[\begin{array}{ccc}{\text{V}}_{1\text{x}}& {\text{V}}_{2\text{x}}& {\text{V}}_{3\text{x}}\\ {\text{jV}}_{1\text{y}}& {\text{jV}}_{2\text{y}}& {\text{jV}}_{3\text{y}}\\ 1& 1& 1\end{array}\right]\left[\begin{array}{c}{\text{t}}_1\\ {\text{t}}_2\\ {\text{t}}_3\end{array}\right]=\left[\begin{array}{c}{\text{V}}_{\text{x}}^{\text{*}}\text{T}\\ {\text{jV}}_{\text{y}}^{\text{*}}\text{T}\\ \text{T}\end{array}\right].$

The relation between two- and three-level voltage vectors is given by

$\begin{array}{l}{\text{V}}_1={\text{a}}_1{\text{V}}_1^1+{\text{b}}_1{\text{V}}_2^1=({\text{a}}_1{\text{V}}_{1\text{x}}^1+{\text{b}}_1{\text{V}}_{\text{2x}}^1)+\text{j}({\text{a}}_1{\text{V}}_{1\text{y}}^1+{\text{b}}_1{\text{V}}_{\text{2y}}^1)\\ {\text{V}}_2={\text{a}}_2{\text{V}}_1^1+{\text{b}}_2{\text{V}}_2^1=({\text{a}}_2{\text{V}}_{\text{1x}}^1+{\text{b}}_2{\text{V}}_{\text{2x}}^1)+\text{j}({\text{a}}_2{\text{V}}_{1\text{y}}^1+{\text{b}}_2{\text{V}}_{\text{2y}}^1)\\ {\text{V}}_3={\text{a}}_3{\text{V}}_1^1+{\text{b}}_3{\text{V}}_2^1=({\text{a}}_3{\text{V}}_{1\text{x}}^1+{\text{b}}_3{\text{V}}_{\text{2x}}^1)+\text{j}({\text{a}}_3{\text{V}}_{1\text{y}}^1+{\text{b}}_3{\text{V}}_{\text{2y}}^1).\end{array}$

Describing Eq. (8.6) in matrix form and substituting in Eq. (4.12) gives

$\left[\begin{array}{ccc}{\text{V}}_{1\text{x}}^1& {\text{V}}_{\text{2x}}^1& 0\\ {\text{jV}}_{1\text{y}}^1& {\text{jV}}_{\text{2y}}^1& 0\\ 0& 0& 1\end{array}\right]\left[\begin{array}{ccc}{\text{a}}_1& {\text{a}}_2& {\text{a}}_3\\ {\text{b}}_1& {\text{b}}_2& {\text{b}}_3\\ 1& 1& 1\end{array}\right]\left[\begin{array}{c}{\text{t}}_1\\ {\text{t}}_2\\ {\text{t}}_3\end{array}\right]=\left[\begin{array}{c}{\text{V}}_{\text{x}}^{*}\text{T}\\ {\text{jV}}_{\text{y}}^{\text{*}}\text{T}\\ \text{T}\end{array}\right].$

Comparing Eq. (8.7) with Eq. (8.1) and considering that the first left matrix is reversible, and then the switching times for the three-level inverter is described as

$\left[\begin{array}{ccc}{\text{a}}_1& {\text{a}}_2& {\text{a}}_3\\ {\text{b}}_1& {\text{b}}_2& {\text{b}}_3\\ 1& 1& 1\end{array}\right]\left[\begin{array}{c}{\text{t}}_1\\ {\text{t}}_2\\ {\text{t}}_3\end{array}\right]=\left[\begin{array}{c}{\text{<msup> t <mo>′</mo> </msup>}}_1\\ {\text{<msup> t <mo>′</mo> </msup>}}_2\\ \text{T}\end{array}\right].$

From Eq. (8.7), the switching times for the three-level inverter can be described as

${\left[\begin{array}{ccc}{\text{a}}_1& {\text{a}}_2& {\text{a}}_3\\ {\text{b}}_1& {\text{b}}_2& {\text{b}}_3\\ 1& 1& 1\end{array}\right]}^{-1}\left[\begin{array}{c}{\text{<msup> t <mo>′</mo> </msup>}}_1\\ {\text{<msup> t <mo>′</mo> </msup>}}_2\\ {\text{<msup> t <mo>′</mo> </msup>}}_3\end{array}\right]=\left[\begin{array}{c}{\text{t}}_1\\ {\text{t}}_2\\ {\text{t}}_3\end{array}\right].$

The switching times of the three-level inverter can be obtained from the solution of Eq. (8.8). Thus, from a linear transformation between two- and three-level inverters, the switching times of the three-level inverters can be derived. This method simply can be extended to the N-level inverter.

8.2Switching states and switching sequence

8.2.1Three-level inverter

The switching states of the three-level inverter can be classified into four groups based on their magnitudes and represented by a space vector diagram, as shown in Fig. 8.2. They can be classified into zero, small (vertices of inner hexagon), medium (mid-points of sides of outer hexagon), and large vectors (vertices of outer hexagon). Both the zero and small vectors have redundant switching states.

The space vector diagram of the three-level inverter is divided into six sextants, and each sextant is divided into four triangular regions in order to show the vectors nearest to the reference. The three-level inverter consists of zero voltage vectors (ZVV), lower small voltage vectors (LSVV), upper small voltage vectors (USVV), middle voltage vectors (MVV), and large voltage vectors (LVV), as shown in Tab. 8.1.

A new method is proposed for the generation of voltage vector switching pattern. The voltage vectors are divided into X and Y groups as shown in Tab. 8.2. If one vector belongs to the X group, then the vector with only one level changing in one phase belongs to the Y group. Thus, all middle voltage vectors belongs to the X group and all large voltage vectors belong to the Y group. The lower small voltage vectors and upper small voltage vectors belong to the X and Y groups, respectively. Thus, the output vector always alternates between X and Y groups. After odd times varying, the vector reaches the other group, and after even times varying, the vector reaches the same group. The switching sequence of sections A2, A3 and A4 are shown in Tab. 8.3.

Fig. 8.2: Space vector diagram of the three-level inverter in sextant I.

Tab. 8.1: Classification of voltage vectors.

Tab. 8.2: Classification of the three-level inverter switching states.

Tab. 8.3: Switching sequence of A2, A3, and A4 regions.

8.2.2Eleven-level inverter

The schematic diagram of the eleven-level inverter is shown in Fig. 8.3. The dc bus voltage is split into eleven levels using ten dc capacitors, C1, C2, C3, C4, C5, C6, C7, C8, C9, and C10. Each capacitor has Vdc/10 V and each voltage stress will be limited to one capacitor level through clamping diodes.

The space vector diagram of the eleven-level inverter is divided into six sextants, and each sextant is divided into 100 triangular regions in order to show the vectors nearest to the reference voltage. The switching sequences of the three level inverter in sector I are as shown in Tab 8.4. The voltage vectors of the eleven-level inverter are divided into X and Y groups, as shown in Tab. 8.5. The procedure of selecting the voltage vector of X and Y groups are similar to that of the three-level inverter. Table 8.6 shows the switching ON sequence and OFF sequence for all the regions of sextant I of the eleven-level inverter. The subsections of the eleven-level inverter in sextant-I are shown in Fig. 8.4.

Fig. 8.3: Eleven-level NPC inverter topology.

Tab. 8.4: Switching sequence of the three-level inverter in sector I.

Fig. 8.4: Subsections of the eleven-level inverter in sextant I.

Tab. 8.5: Classification of the eleven-level inverter switching states.

Tab. 8.6: Switching sequence of the eleven-level inverter in sector I.

8.3Algorithm for the N-level inverter

The first step is to identify the triangle where the reference voltage vector is located. Then the reference voltage vector is synthesized from the vectors that present at the vertices of this triangle and the dwell times of these vectors can be calculated. The triangle can be defined as a three-dimensional array

$\begin{array}{l}{\text{λ}}_1={\text{floor[t}}_{1,2}\times (\text{N}-1)]\\ {\text{λ}}_2={\text{floor[t}}_{2,2}\times (\text{N}-1)]\\ {\text{λ}}_0={\text{floor[t}}_{0,2}\times (\text{N}-1)].\end{array}$

The following conclusions are made from the space vector diagram of the eleven-level inverter shown in Fig. 8.5.

There is only one bit is changed between names of adjacent triangles.

The last bit in each row is the same.

If λ1 + λ2 + λ0 = N − 1, the reference vector is located on vertices of triangle.

If λ1 + λ2 + λ0 = N − 2, the voltage vectors are in the same direction with the voltage vectors of the two-level inverter triangle.

If λ1 + λ2 + λ0 = N − 3, the triangle has the opposite direction with the voltage vectors of the two-level inverter triangle.

After identifying the triangle where the reference vector is located, the nearest three voltage vectors are chosen as the compound reference vector. As shown in Fig. 8.6, according to the volt-second balancing principle, the relation of the synthesis of the voltage vector to the reference vector is

Fig. 8.5: Space vector diagram of the eleven-level inverter in sector I.

Fig. 8.6: Relation between the voltage vectors of N- and two-level inverters.

$\begin{array}{l}{\text{t}}_{\text{1}}{\text{V}}_{\text{1}}+{\text{t}}_{2,\text{N}}{\text{V}}_{2,\text{N}}+{\text{t}}_{3,\text{N}}{\text{V}}_{3,\text{N}}={\text{V}}^{*}{\text{T}}_{\text{s}}\\ {\text{t}}_{1,\text{N}}+{\text{t}}_{2,\text{N}}+{\text{t}}_{3,\text{N}}={\text{T}}_{\text{s}}.\end{array}$

That is,

$\left[\begin{array}{ccc}{\text{V}}_{1,\text{Nx}}& {\text{V}}_{2,\text{Nx}}& {\text{V}}_{3,\text{Nx}}\\ {\text{jV}}_{1,\text{Ny}}& {\text{jV}}_{2,\text{Ny}}& {\text{jV}}_{3,\text{Ny}}\\ 1& 1& 1\end{array}\right]\left[\begin{array}{c}{\text{t}}_{1,\text{N}}\\ {\text{t}}_{2,\text{N}}\\ {\text{t}}_{3,\text{N}}\end{array}\right]=\left[\begin{array}{c}{\text{V}}_x^{*}\text{T}\\ {\text{jV}}_y^{*}\text{T}\\ {\text{T}}_{\text{s}}\end{array}\right].$

In N-level inverters, there is a mapping relation between the three nearest vectors used to synthesize the vector and the two non-zero vector of the two-level inverter, which is

$\begin{array}{l}{\text{V}}_1={\text{a}}_1{\text{V}}_{1,2}+{\text{b}}_1{\text{V}}_{2,2}\\ {\text{V}}_2={\text{a}}_2{\text{V}}_{1,2}+{\text{b}}_2{\text{V}}_{2,2}\\ {\text{V}}_3={\text{a}}_3{\text{V}}_{1,2}+{\text{b}}_3{\text{V}}_{2,2}.\end{array}$

Changing Eq. (8.13) into the matrix and putting it into Eq. (8.12). In complex plane, we can obtain the following matrix.

$\left[\begin{array}{ccc}{\text{V}}_{1,2\text{x}}& {\text{V}}_{2,2\text{x}}& 0\\ {\text{jV}}_{1,2\text{y}}& {\text{jV}}_{2,2\text{y}}& 0\\ 0& 0& 1\end{array}\right]\left[\begin{array}{ccc}{\text{a}}_1& {\text{a}}_2& {\text{a}}_3\\ {\text{b}}_1& {\text{b}}_2& {\text{b}}_3\\ 1& 1& 1\end{array}\right]\left[\begin{array}{c}{\text{t}}_{1,\text{N}}\\ {\text{t}}_{2,\text{N}}\\ {\text{t}}_{3,\text{N}}\end{array}\right]=\left[\begin{array}{c}{\text{V}}_x^{*}\text{T}\\ {\text{jV}}_y^{*}\text{T}\\ {\text{T}}_{\text{s}}\end{array}\right].$

From the two-level inverter to the N-level inverter, the voltage vector transition matrix is defined as

$\text{R}=\left[\begin{array}{ccc}{\text{a}}_1& {\text{a}}_2& {\text{a}}_3\\ {\text{b}}_1& {\text{b}}_2& {\text{b}}_3\\ 1& 1& 1\end{array}\right].$

The matrix R is reversible.

$\left[\begin{array}{ccc}{\text{a}}_1& {\text{a}}_2& {\text{a}}_3\\ {\text{b}}_1& {\text{b}}_2& {\text{b}}_3\\ 1& 1& 1\end{array}\right]\left[\begin{array}{c}{\text{t}}_{1,\text{N}}\\ {\text{t}}_{2,\text{N}}\\ {\text{t}}_{3,\text{N}}\end{array}\right]=\left[\begin{array}{c}{\text{t}}_{1,2}\\ {\text{t}}_{2,2}\\ {\text{T}}_{\text{s}}\end{array}\right].$

${\text{T}}_{\text{N}}=\left[\begin{array}{c}{\text{t}}_{1,\text{N}}\\ {\text{t}}_{2,\text{N}}\\ {\text{t}}_{3,\text{N}}\end{array}\right]={\text{R}}^{-1}\left[\begin{array}{c}{\text{t}}_{1,2}\\ {\text{t}}_{2,2}\\ {\text{T}}_{\text{s}}\end{array}\right]={\text{R}}^{-1}{\text{T}}_{\text{2}}.$

From the solution of these above equations, the dwell time of each vector can be obtained. Thus, there is a simple linear mapping relation between the dwell time of the vectors of the N-level inverter and the two-level inverter. The positive and negative triangles of N-level inverter space vector diagram is as shown in Fig. 8.7

Fig. 8.7: Positive and negative triangles of the N-level inverter space vector diagram.

In a triangle, any voltage vector of the N-level inverter can be given as

Then, the nearest three vectors of positive and negative triangles have the following relationship.

$\begin{array}{l}{\text{V}}_{1,\text{N}}=\frac{1}{\text{N}-1}\{{\lambda }_1[100]+{\lambda }_2[110]+\gamma [111]\}\\ {\text{V}}_{2,\text{N}}=\frac{1}{\text{N}-1}\{({\lambda }_1-1)[100]+({\lambda }_2+1)[110]+\gamma [111]\}\\ {\text{V}}_{3,\text{N}}=\frac{1}{\text{N}-1}\{{\lambda }_1[100]+({\lambda }_2+1)[110]+\gamma [111]\}\end{array}$

The direction and length of the voltage in the N-level inverter are represented by coefficients λ1 and λ2. Parameter γ controls the redundancy vector. The matrix R is the voltage vector transform matrix, but the matrix R−1 is the time transition matrix from the two-level inverter to the N-level inverter, respectively. These positive triangle transition matrices are given by

${\text{R}}_{\text{positive}}=\left[\begin{array}{ccc}\frac{{\lambda }_1}{\text{N}-1}& \frac{{\lambda }_1+1}{\text{N}-1}& \frac{{\lambda }_1}{\text{N}-1}\\ \frac{{\lambda }_2}{\text{N}-1}& \frac{{\lambda }_2}{\text{N}-1}& \frac{{\lambda }_2+1}{\text{N}-1}\\ 1& 1& 1\end{array}\right]$

${\text{R}}_{\text{negative}}^{-1}=\left[\begin{array}{ccc}0& -(\text{N}-1)& ({\lambda }_2+1)\\ -(\text{N}-1)& 0& {\lambda }_1\\ (\text{N}-1)& (\text{N}-1)& -({\lambda }_1+{\lambda }_2)\end{array}\right]$

The negative triangle transition matrices can be obtained from the following relationships:

$\begin{array}{l}{\text{V}}_{1,\text{N}}=\frac{1}{\text{N}-1}\{{\lambda }_1[100]+{\lambda }_2[110]+\gamma [111]\}\\ {\text{V}}_{2,\text{N}}=\frac{1}{\text{N}-1}\{({\lambda }_1-1)[100]+({\lambda }_2+1)[110]+\gamma [111]\}\\ {\text{V}}_{3,\text{N}}=\frac{1}{\text{N}-1}\{{\lambda }_1[100]+({\lambda }_2+1)[110]+\gamma [111]\}\\ {\text{R}}_{\text{positive}}=\left[\begin{array}{ccc}\frac{{\lambda }_1}{\text{N}-1}& \frac{{\lambda }_1+1}{\text{N}-1}& \frac{{\lambda }_1}{\text{N}-1}\\ \frac{{\lambda }_2}{\text{N}-1}& \frac{{\lambda }_2}{\text{N}-1}& \frac{{\lambda }_2+1}{\text{N}-1}\\ 1& 1& 1\end{array}\right]\\ {\text{R}}_{\text{negative}}^{-1}=\left[\begin{array}{ccc}0& -(\text{N}-1)& ({\lambda }_2+1)\\ -(\text{N}-1)& 0& {\lambda }_1\\ (\text{N}-1)& (\text{N}-1)& -({\lambda }_1+{\lambda }_2)\end{array}\right]\end{array}$

Fig. 8.8: Flowchart of the N-level inverter.

Thus, the analytical SVPWM algorithm for the N-level inverter can be deduced from the two-level inverter as shown in Fig. 8.8.

8.4Results and discussions

The proposed method is verified by designing a model for the N-level inverter and simulating for the three-, five-, seven-, nine-, and eleven-level inverters. The simulation parameters and specifications of induction motor used in this method are given in Appendix V. Figures 8.9 to 8.14 show the results of the three-level inverter. The phase voltages, line voltages, and output voltage total harmonic distortion (THD) are shown in Figs. 8.9 to 8.11, respectively. The stator currents, rotor speed, and torque of the three-level inverter fed induction motor are shown in Figs. 8.12 to 8.14, respectively. Figures 8.15 to 8.20 show the results of the five-level inverter. The phase voltages, line voltages, and output voltage THD are shown in Figs. 8.15 to 8.17, respectively. The stator currents, rotor speed, and torque of the five-level inverter fed induction motor are shown in Figs. 8.18 to 8.20, respectively. The seven-level inverter results are shown in Figs. 8.21 to 8.26. The phase voltages, line voltages, and output voltage THD are shown in Figs. 8.21 to 8.23, respectively. The stator currents, rotor speed, and torque of the seven-level inverter fed induction motor are shown in Figs. 8.24 to 8.26, respectively. The results of the nine-level inverter are shown in Figs. 8.27 to 8.32 shows the results of the seven-level inverter. The phase voltages, line voltages, and output voltage THD are shown in Figs. 8.27 to 8.29, respectively. The stator currents, rotor speed, and torque of the nine-level inverter fed induction motor are shown in Figs. 8.30 to 8.32, respectively. The results of the eleven-level inverter are shown in Figs. 8.33 to 8.38. The phase voltages, line voltages, and output voltage THD are shown in Figs. 8.33 to 8.35, respectively. The stator currents, rotor speed, and torque of the eleven-level inverter fed induction motor are shown in Figs. 8.36 to 8.38, respectively.

The line-to-line voltages and harmonic spectra of three-, five-, seven-, nine-, and eleven-level inverters are entirely the same as traditional SVPWM algorithm, and it shows that as the level of inverter increases the line voltage in a nearly standard sine wave. The THD, RMS current, and torque ripples decrease as the level of inverter increases. A simulation analysis using a higher level showed that it merely modifies the level setting number N, indicating that the algorithm is flexible and transplantable.

8.4.1Three-level inverter

Fig. 8.9: Phase voltages of the three-level inverter.

Fig. 8.10: Line-to-line voltages of the three-level inverter.

Fig. 8.11: Output line voltage harmonic spectrum of the three-level inverter.

Fig. 8.12: Stator currents of the three-level inverter fed induction motor.

Fig. 8.13: Speed response of the three-level inverter fed induction motor.

Fig. 8.14: Torque response of the three-level inverter fed induction motor.

8.4.2Five-level inverter

Fig. 8.15: Phase voltages of the five-level inverter.

Fig. 8.16: Line-to-line voltage of the five-level inverter.

Fig. 8.17: Output line voltage harmonic spectrum of the five-level inverter.

Fig. 8.18: Stator currents of the five-level inverter fed induction motor.

Fig. 8.19: Speed response of the five-level inverter fed induction motor.

Fig. 8.20: Torque response of the five-level inverter fed induction motor.

8.4.3Seven-level inverter

Fig. 8.21: Phase voltages of the seven-level inverter.

Fig. 8.22: Line-to-line voltage of the seven-level inverter.

Fig. 8.23: Output line voltage harmonic spectrum of the seven-level inverter.

Fig. 8.24: Stator currents of the seven-level inverter fed induction motor.

Fig. 8.25: Speed response of the seven-level inverter fed induction motor.

Fig. 8.26: Torque response of the seven-level inverter fed induction motor.

8.4.4Nine-level inverter

Fig. 8.27: Phase voltages of the nine-level inverter.

Fig. 8.28: Line-to-line voltage of the nine-level inverter.

Fig. 8.29: Output line voltage harmonic spectrum of the nine-level inverter.

Fig. 8.30: Stator currents of the nine-level inverter fed induction motor.

Fig. 8.31: Speed response of the nine-level inverter fed induction motor.

Fig. 8.32: Torque response of the nine-level inverter fed induction motor.

8.4.5Eleven-level inverter

Fig. 8.33: Phase voltages of the eleven-level inverter.

Fig. 8.34: Line-to-line voltages of the eleven-level inverter.

Fig. 8.35: Output line voltage harmonic spectrum of the eleven-level inverter.

Fig. 8.36: Stator currents of the eleven-level inverter fed induction motor.

Fig. 8.37: Speed response of the eleven-level inverter fed induction motor.

Fig. 8.38: Torque response of the eleven-level inverter fed induction motor.

Tab. 8.7: Performance of multilevel inverters.

8.5Conclusions

An analytical SVPWM algorithm for multilevel inverter fed induction motor is based on two-level inverter is proposed and described in detail. An intrinsic relationship between multilevel and two-level inverters is developed, and using linear transformation, the switching time of vectors for the two-level inverter can be transformed for the multilevel inverter. A novel classification of voltage vectors is proposed to determine switching sequence. This method can be extended for the N-level inverter also. The results shows that the output voltage THD for the three-, five-, seven-, nine-, and eleven-level inverters is 16.92%, 4.35%, 2.45%, 2.26%, and 2.13%, respectively as shown in Tab. 8.7. As the level of the inverter increases, the THD and the torque ripples are effectively decreased and the rotor speed is improved.