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by Pedro C. Diniz, José Figueiredo Coutinho, João Paiva Cardoso
Embedded Computing for High Performance
Cover image
Title page
Table of Contents
Copyright
Dedication
About the Authors
Preface
Acknowledgments
Abbreviations
Chapter 1: Introduction
Abstract
1.1 Overview
1.2 Embedded Systems in Society and Industry
1.3 Embedded Computing Trends
1.4 Embedded Systems: Prototyping and Production
1.5 About LARA: An Aspect-Oriented Approach
1.6 Objectives and Target Audience
1.7 Complementary Bibliography
1.8 Dependences in Terms of Knowledge
1.9 Examples and Benchmarks
1.10 Book Organization
1.11 Intended Use
1.12 Summary
Chapter 2: High-performance embedded computing
Abstract
2.1 Introduction
2.2 Target Architectures
2.3 Core-Based Architectural Enhancements
2.4 Common Hardware Accelerators
2.5 Performance
2.6 Power and Energy Consumption
2.7 Comparing Results
2.8 Summary
2.9 Further Reading
Chapter 3: Controlling the design and development cycle
Abstract
3.1 Introduction
3.2 Specifications in MATLAB and C: Prototyping and Development
3.3 Translation, Compilation, and Synthesis Design flows
3.4 Hardware/Software Partitioning
3.5 LARA: a language for Specifying Strategies
3.6 Summary
3.7 Further Reading
Chapter 4: Source code analysis and instrumentation
Abstract
4.1 Introduction
4.2 Analysis and Metrics
4.3 Static Source Code Analysis
4.4 Dynamic Analysis: The Need for Instrumentation
4.5 Custom Profiling Examples
4.6 Summary
4.7 Further Reading
Chapter 5: Source code transformations and optimizations
Abstract
5.1 Introduction
5.2 Basic Transformations
5.3 Data Type Conversions
5.4 Code Reordering
5.5 Data Reuse
5.6 Loop-Based Transformations
5.7 Function-Based Transformations
5.8 Data structure-Based Transformations
5.9 From Recursion to Iterations
5.10 From Nonstreaming to Streaming
5.11 Data and Computation Partitioning
5.12 LARA Strategies
5.13 Summary
5.14 Further Reading
Chapter 6: Code retargeting for CPU-based platforms
Abstract
6.1 Introduction
6.2 Retargeting Mechanisms
6.3 Parallelism and Compiler Options
6.4 Loop Vectorization
6.5 Shared Memory (Multicore)
6.6 Distributed Memory (Multiprocessor)
6.7 Cache-based Program Optimizations
6.8 LARA Strategies
6.9 Summary
6.10 Further Reading
Chapter 7: Targeting heterogeneous computing platforms
Abstract
7.1 Introduction
7.2 Roofline Model Revisited
7.3 Workload Distribution
7.4 Graphics Processing Units
7.5 High-level Synthesis
7.6 LARA Strategies
7.7 Summary
7.8 Further Reading
Chapter 8: Additional topics
Abstract
8.1 Introduction
8.2 Design Space Exploration
8.3 Hardware/Software Codesign
8.4 Runtime Adaptability
8.5 Automatic Tuning (Autotuning)
8.6 Using LARA for Exploration of Code Transformation Strategies
8.7 Summary
8.8 Further Reading
Glossary
Index
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