PIC Registers
Some knowledge of the PIC internal architecture is useful at this point. The MCU operation is controlled by a set of file registers, which contain special function registers (SFRs) in the first 32 locations, followed by some general purpose registers (GPRs). The 16F877 has four banks of 128 registers, as shown in Figure B.2. Some registers are duplicated in more than one bank, so the actual number of distinct GPRs is 192.
Figure B.2. PIC 16F877 File Registers (by permission of Microchip Technology Inc.)
Figure B.3 shows the function of each bit of the SFRs in Bank0 and Figure B.4 the details for the status register, which contains the bank select bits. Note that the file register bank select bits RP0 and RP1 are used for direct addressing, but IRP is used for indirect addressing via the file select register (FSR).
Figure B.3. PIC 16F877 Registers, Bank 0 (by permission of Microchip Technology Inc.)
Figure B.4. PIC 16F877 Status Register Bit Functions (by permission of Microchip Technology Inc.)
In this case, the value in the register specified in the FSR is read or written at file address 00. The PIC internal architecture and register operations are fully explained in the 16F87XA data sheet downloadable from www.microchip.com.