11.2.1 The analog-to-digital converter

The task of the ADC is to determine a digital output number that is the equivalent of its input voltage. The design of such circuits is a non-trivial task. Many very different ADC circuits have been developed, targeted towards different applications. Some, like the dual ramp ADC, are slow but with very high accuracy, and useful for precision measurements such as digital voltmeters. Others, like the Flash converter (not to be confused with Flash memory technology), are fast but of lesser accuracy, and are used to convert high-speed signals such as video or radar. Others, like the successive approximation ADC, are of medium speed and medium accuracy, and useful for general-purpose industrial applications. This is the type most commonly found in embedded systems. Descriptions of how this type of ADC circuit works can be found in most electronics textbooks [see Ref. 1.1].

An ADC is characterised principally by the following features.

Conversion characteristic

The ADC accepts an input voltage that is infinitely variable. It converts this to one of a fixed number of output values. An example ADC conversion characteristic is shown in Figure 11.2, where the input voltage is represented on the horizontal axis and digital output on the vertical. If the ADC is converting continuously and the input voltage is gradually increased from zero, the output is also initially zero. At a certain value of input, the output changes to …001. It stays at this same value as the input increases further, until at another input value the output switches to …010. If the input voltage increases continuously, the output at some point reaches its maximum value. The input has then traversed its full ‘range’. The output will have moved stepwise up to its maximum value. For an n-bit ADC, the maximum output value will be (2ⁿ – 1). For example, for an 8-bit ADC, the final value will be (2⁸ – 1), or 11111111_B, or 255_D.

Figure 11.2 The ideal analog-to-digital converter input/output characteristic

The input range shown in Figure 11.2 starts from zero and goes up to the value V_max. This is placed a little to the right of where one might expect it, at the centre of where a step for 2ⁿ would occur. This positioning allows the horizontal axis to be divided into exactly 2ⁿ equal segments, each centred on an output transition.

Many ADCs have a characteristic like that in Figure 11.2, for example with an input range of 0–5 V. Others, however, have a bipolar range, with the input voltage taking both positive and negative values, for example –5 to +5 V. In every case the input range V_r is the difference between maximum input voltage and minimum input voltage. The range usually relates in a direct way to the value of the voltage reference, which forms part of the ADC.

It can be seen intuitively from the diagram that the higher the number of output bits, the higher will be the number of output steps and the finer is the conversion. A measure of the fineness of conversion is called the ‘resolution’. This is the amount by which the input has to change to go from one output value up to the next. In the diagram, the resolution is the width of one step in the conversion characteristic. An ADC with n output bits can take 2ⁿ possible output values, from 0 up to 2ⁿ – 1. It therefore has a resolution of V_r/2ⁿ, where V_r is the input voltage range. An incoming signal should use as much of the input range as possible, without exceeding it. If it only uses a part of it, then the effective resolution is degraded and the ADC is not being put to best use.

11.2.2 Signal conditioning – amplification and filtering

To make best use of the ADC, the input voltage should traverse as much of its input range as possible, without exceeding it. Yet most signal sources, say a microphone or thermocouple, produce very small voltages. Therefore, in many cases amplification is needed to exploit the range to best effect. Voltage level shifting may also be required, for example if the signal source is bipolar while the ADC input is unipolar (voltage is positive only).

If the signal being converted is periodic, then a fundamental requirement of conversion is that the conversion rate must be at least twice the highest signal frequency. This is known as the Nyquist sampling criterion. If this criterion is not met, then a deeply unpleasant form of signal corruption takes place, known as ‘aliasing’ (see Ref. 1.1 or signal processing text for further details). Anti-aliasing filtering may therefore be required to ensure that the Nyquist criterion is satisfied.

11.2.3 The analog multiplexer

If there are to be multiple inputs, then an analog multiplexer is used. The alternative, of multiple ADCs, is both costly and space-consuming. The multiplexer acts as a selector switch, choosing which input out of several is connected to the ADC at any one instant. The multiplexer is built around a set of semiconductor switches. It is important to know that the semiconductor switch is an imperfect device. In particular, when switched ‘on’, it has internal series resistance, which can range from tens to thousands of ohms. This can impact on the data acquisition process, as we shall see.

11.2.4 Sample and Hold, and acquisition time

Because most ADCs are unable to accurately convert a changing voltage, a ‘Sample and Hold’ (S&H) circuit is often found. This takes a sample of the voltage, like a snapshot, and holds it steady for the duration of the conversion. A circuit of a simple but practical S&H is shown in Figure 11.3. At its heart are just a semiconductor switch and a capacitor. When the switch is closed, the capacitor charges up to the input voltage V_S. At this moment, ideally V_O = V_C = V_S, as the buffer amplifier just has unity gain. When the switch opens, the charge is left on the capacitor and V_C (and hence V_O) remains at a fixed value. In practice there is some leakage from the capacitor, so the output voltage drifts. This circuit is sometimes also called ‘track and hold’, as when the switch is closed the output voltage follows, or tracks, the input.

Figure 11.3 A simple form of Sample and Hold circuit

One problem with this simple circuit is that there is inevitably series resistance in the signal path. This is represented by the resistor in the circuit. When the switch closes, therefore, the capacitor voltage V_C does not take on the signal voltage immediately, but rises towards it exponentially. This is shown in Figure 11.4. The voltage rise is given by:

Figure 11.4 Exploring acquisition time (not to scale)

(11.1)

Our interest from a data acquisition point of view is to ensure that the voltage has risen sufficiently close to its final value with the switch closed, before the switch is opened (the signal is then ‘held’) and a conversion allowed to start. The time that V_C (and hence V_O) takes to reach a value deemed to be acceptable is called the ‘acquisition time’.

Let us suppose that V_C must rise to 90 per cent of its final value, V_S. Then, substituting into Equation (11.1):

This is shown in Figure 11.4. It is, however, an undemanding requirement. To ensure good accuracy in data conversion, the error introduced by this process should be less than the equivalent of half of one LSB. Hence, for 8-bit conversion, this implies that the acquired voltage value V_C must reach ≥ (511/512)V_S, or 0.9980V_S. For 10-bit conversion it must be ≥ (2047/2048)V_S, or 0.9995V_S.

Following the calculation above, but substituting in the 10-bit value, we get:

The resulting acquisition times are shown in Figure 11.4. It is clear that acquisition time increases with increasing resistance, capacitance and with accuracy required. We will meet practical application of this calculation later in the chapter.

It is worth noting that the multiplexer circuit and S&H circuit can be merged into one, with the multiplexer switches forming the S&H switch. This is common practice.

11.2.5 Timing and microprocessor control

Usually, a data acquisition system is under the control of a microprocessor or microcontroller. This can control the overall system timing, including which input is being selected, when the selected signal is sampled and when the conversion starts.

The process of a single conversion can be represented as a flow diagram, as shown in Figure 11.5. Two major time requirements need to be satisfied – the acquisition time (of the S&H) and the conversion time (of the ADC).

Figure 11.5 Typical timing requirement of one analog-to-digital conversion

Once the system is initialised, the multiplexer switch can be set. The S&H can then start its sample process. A period equal to or greater than the required S&H acquisition time must elapse. The ADC can then start its conversion. Again, this takes finite time. The ADC flags when it has completed a conversion and the microprocessor can read the output data.

11.2.6 Data acquisition in the microcontroller environment

Embedded systems need ADCs, so it is natural to expect to find an ADC integrated onto a microcontroller as one of its peripherals. It is important, however, to realise that ADCs and microcontrollers do not make happy bedfellows. To operate to a good level of accuracy, an ADC needs a quiet life (electronically speaking), with excellent and clean power supply and ground, and freedom from electromagnetic interference. A microcontroller, on the other hand, being a digital device, tends to corrupt its power supply and ground with a voltage spike on every switching edge. As a consequence, with all its intensive internal digital activity, it radiates a smog of local interference. Therefore, to integrate an ADC onto a microcontroller is at best a compromise and high accuracy is not usually possible.

Despite this, ADCs are widely available in the microcontroller environment, with many microcontrollers having an on-chip ADC. These are mostly 8- or 10-bit.

11.3.1 Overview and block diagram

The 16F87XA has a versatile and powerful 10-bit ADC module, shown in Figure 11.6. This provides a subset of the overall data acquisition system shown in Figure 11.1, having an ADC, a multiplexer and the possibility of using the supply voltage as the voltage reference. The particular ADC design used incorporates in an interesting way the function of Sample and Hold, discussed further in Section 11.3.3.

Figure 11.6 The 16F87XA analog-to-digital converter (supplementary labels in shaded boxes added by the author)

The input multiplexer, seen to the right of the diagram, has five channels for the 16F873A and ’F876A, and eight for the 16F874A and ’F877A. The inputs are shared with five of the six Port A bits, and three of the eight Port E (for 16F874 and ’F877) bits. Only Port A bit 4 is not used, as it already shares with the important Timer 0 input. Port bits can be allocated in a flexible way to analog or digital input, according to settings in an SFR.

An external voltage reference can be used for applications requiring reasonable accuracy, with terminals for both positive and negative connections provided. Provision of the negative connection means that the reference does not have to be referred to system ground. For lower-cost, lower-accuracy conversions, the power supply voltage can be used as the reference. The input range is equal to whatever voltage reference is chosen.

11.3.2 Controlling the ADC

The ADC is controlled by two SFRs, ADCON0 (Figure 11.7) and ADCON1 (Figure 11.8). The result of the conversion is placed in two further SFRs, ADRESH and ADRESL. These four registers can all be seen in Figure 7.6. Other SFRs also have an important impact on the ADC. These include TRISA and (for the 40-pin devices) TRISE. Any bits used for analog input must be set as inputs in these. Registers PIR1 and PIE1, which contain the ADC interrupt flag and interrupt enable bits respectively, are also used.

Figure 11.7 The ADCON0 register (address 1F_H)

Figure 11.8 The ADCON1 register (address 9F_H)

The control possibilities are now described, in the approximate sequence they would be used.

Formatting the result

The result of the conversion is placed in registers ADRESH and ADRESL. Two possible result formats are possible, as shown in Figure 11.9. The result can be left justified, in which case the eight most significant bits appear in ADRESH. This is useful if only an 8-bit result is required, as the contents of ADRESL can then be ignored. In most other cases a right-justified result will be the more useful. The formatting is controlled by bit ADFM in ADCON1.

Figure 11.9 Formatting the analog-to-digital converter conversion result

11.3.3 The analog input model

It was demonstrated earlier in this chapter that an understanding of the actual signal path is necessary in order to understand and predict system characteristics. Figure 11.10 is a diagram of the signal path for this ADC – and what an obstacle course it appears to be! This diagram is effectively a real-life representation of parts of Figure 11.6, shown from the signal's point of view.

Figure 11.10 The 16F87XA analog-to-digital converter input model

The signal source, together with internal resistance, is depicted to the left of the diagram, modelled as voltage source in series with internal resistance. The signal voltage enters the microcontroller through the pin labelled ANx. There is a small input capacitance (5 pF), and the input protection diodes and other input circuitry clearly have the potential to leak current into the signal path. The signal then passes through the interconnect resistance, R_IC, before reaching the multiplexer switch. This is one of the switches of the analog input multiplexer in Figure 11.6. The internal resistance of this switch, R_SS, is shown. The approximate value of this is dependent on supply voltage and is given by the small graph on the bottom right of Figure 11.10. From this we see that the switch resistance is a sobering 7 kΩ approximately, when the supply voltage is 5 V.

The ADC itself is a so-called switched capacitor type (Ref. 1.1, Chapter 5). First of all, that means that the ADC has internal capacitance, which must be charged up to the input voltage before a conversion can start. Neatly, however, this capacitance takes on the function of the S&H capacitor. On the downside, the capacitance, all 120 pF of it, must be charged up in the first place.

11.3.4 Calculating acquisition time

In Ref. 7.1 Microchip define three sources of time delay in their calculations for acquisition time, t_ac, as shown:

(11.2)

The reference specifies the amplifier settling time as a fixed 2 μs. The temperature coefficient applies only when temperature is above 25°C and is specified as:

It can be seen that this creates a time delay of only 0.5 μs for every 10° above 25°, so its impact in most cases is slight.

It is the capacitor charging time that dominates the acquisition time, which we now explore. The analog input model of Figure 11.10 can be related back to the S&H diagram of Figure 11.3 and Equation (11.1). To analyse this, we neglect the effects of the input leakage current and the small input capacitance. Actual values for R and C in Figure 11.3 for the 16F87XA ADC can be extracted from Figure 11.10. R is made up of (R_SS + R_IC + R_S), or (1k + 7k + R_S), for a supply voltage of 5 V. C is the 120 pF shown. Calculations made for Figure 11.4 showed us that, for 10-bit accuracy, an acquisition time of 7.6RC was needed. Substituting values in, assuming at first negligible source resistance, gives:

If amplifier settling time is added to this, as it must be, the acquisition time rises to 9.3 μs.

This represents a best possible value. To determine the overall time needed to complete a single conversion, this acquisition time must be added to the conversion time, discussed in Section 11.3.2. There, a best possible conversion time of 19.2 μs was deduced. Adding this to the best possible acquisition time leads to a total time to complete a conversion of (2 + 7.3 + 19.2) μs, i.e. 28.5 μs.

In many cases the source resistance is not negligible and any external series resistance will degrade the acquisition time calculated above. In Ref. 7.1 Microchip recommend a maximum source resistance of 2.5 kΩ. In this case:

Note that this is not the highest acquisition time that may be encountered, as the maximum allowed source resistance is specified in Ref. 7.1 as being 10 kΩ.

11.3.5 Repeated conversions

When a conversion is complete, the converter waits for a period of 2 × T_AD before it is available to start a new conversion cycle. Once this time is up, either the same input channel may be converted again, or a new one (which may already have been selected) may be converted.

A best possible conversion time of 28.5 μs was calculated in Section 11.3.4. If a period of 2 × T_AD is added to this, i.e. 3.2 μs for fastest possible, then the complete conversion cycle time becomes 31.7 μs. If successive conversions are intended, this implies a maximum sampling rate of around 30 kHz. Note, however, that this figure takes no account of software overheads, which would tend to slow the conversion rate.

11.3.6 Trading off conversion speed and resolution

The conversion times deduced above are not particularly fast by today's standards and there will be occasions when a faster conversion time is needed. While one option is to use an external ADC, another is to consider whether the full 10-bit resolution is needed. If it is not, then the conversion time can be reduced. One technique, described in Ref. 11.1, is to start a conversion with a valid ADC clock frequency and then to switch it during the conversion to a faster speed, which violates the clock specification. The higher-order bits converted before the switch will be valid and can be used. Those converted after will not be valid. A lower-resolution conversion, at higher speed, has thus been achieved. It is up to the programmer, however, to determine when the switch should take place.

An alternative approach is to reduce the acquisition time, as suggested in Figure 11.4, so that, for example, the acquisition is only to 8-bit accuracy. The conversion can then be allowed to run its full course. The switching of the ADC clock frequency, as just described, can still be implemented.

11.4.1 Configuration of the analog-to-digital converter

The initial setting of the ADC control registers, ADCON0 and ADCON1, can be seen in the program example. Figure A3.1 shows that the right LDR is connected to Port A bit 0, the left to Port A bit 1 and the rear to Port A bit 3. No external reference voltage is available, so the power supply is used. These connections lead to the PCFG bits in ADCON1 (Figure 11.8) being set to 0100.

With a main clock period of 250 ns (4 MHz), but a minimum specified T_ad time of 1.6 μs, it is necessary to divide the clock frequency by at least eight. This value is chosen, giving a T_ad of 2 μs. A right-justified result is selected.

11.4.2 Acquisition time

The operation of the data acquisition can be examined by looking further down the program example.

The acquisition time needs to be calculated for the worst-case condition, which is when ambient light is low and the LDR resistance high. This may be checked in the LDR data [Ref. 8.5]. In the worst case the LDR resistance will be very high and the source resistance will tend towards the value of the 10 kΩ resistor in series with the LDR. Note that this is at the limit of the maximum allowed source resistance. However, under normal lighting conditions the source resistance will be considerably lower. From Figure 11.4, acquisition time is given by:

Adding in the amplifier settling time gives 18.4 μs.

Program Example 11.1 Applying the analog-to-digital converter in the Derbot light meter program

11.4.3 Data conversion

The actual operation of the ADC can be seen by checking further down the program example, from the label main_loop. The three LDRs are sampled in turn. For the first (front left), it can be seen that the appropriate input channel is selected, with the GO/DONE bit of ADCON0 left low. A delay of 20 μs is introduced for signal acquisition, which just covers the calculated worst-case value of 18.4 μs. The actual conversion is then initialised by setting the bit high. Completion of conversion is awaited by testing the same bit. The result of the conversion is then transferred from ADRESH and ADRESL to the two stores in memory, and the program moves on to sample the next input. The data manipulation that follows is omitted in this program example, but is described later in the chapter.

11.5.1 Fixed- and floating-point arithmetic

We have already repeatedly used the fact that an n-bit binary number can represent any integer number value from 0 to 2ⁿ – 1. For example, an 8-bit number can represent from 0 to 255_D, a 12-bit number from 0 to 4095_D, and a 16-bit number from 0 to 65 535_D. For larger numbers, more bits just need to be added. We could even represent fractional numbers in this way, by inserting a binary point. Then the digits to the right of the binary point represent negative powers of two. This is seen in the example of Figure 11.11, where the binary number 1101.11 is evaluated to 13.75_D. As long as the binary point remains in the same fixed place in all numbers being used (in fact, we only need to imagine it there), then it is possible to undertake a range of arithmetic operations with a set of numbers.

Figure 11.11 A fractional binary number

This type of binary number representation is called ‘fixed point’. The binary point is not used, or else is assumed to be in a fixed place in the number. Such representation can solve the need to represent integers and non-integer numbers. It does not, however, solve the problem of dealing with number values that range from the very small to the very large. The smallest non-zero number that the 6-bit fixed-point number of Figure 11.11 can represent, for example, is 0.25_D, while the maximum number is 15.75_D. It could neither represent 0.0004_D nor 2.3 × 10⁶.

The solution to this problem lies in ‘floating-point’ representation. This represents the number with a ‘sign bit’, ‘mantissa’ and ‘exponent’. A huge range of numbers can be represented, but processing complexity is greater. While floating-point routines are available in Assembler, they are most commonly found in high-level languages, where they are used for all precision calculation. In this chapter we apply only fixed-point arithmetic.

11.5.2 Binary to Binary Coded Decimal conversion

While all fixed-point arithmetic is done in binary, where there is human interaction, there will be a marked preference for decimal. How do we move data between the binary domain and the decimal?

A simple halfway house between binary and decimal is Binary Coded Decimal (BCD). This uses a 4-bit number to represent a decimal digit, as shown in Table 11.2. The only thing that distinguishes BCD from hexadecimal is that in BCD the binary equivalents of hex. A_H, B_H, C_H, D_H, E_H or F_H are not allowed. Thus, Table 11.2 shows all legal BCD codes for a single decimal digit. The table also shows the ASCII (American Standard Code for Information Interchange) code for each of the numbers. For numeric characters, it can be seen that this is simply a single-byte code in which the number itself occupies the lower nibble and the number 3 forms the higher.

TABLE 11.2 Binary, Binary Coded Decimal and American Standard Code for Information Interchange

Given this simple coding, multi-digit decimal numbers can be represented in BCD. In ‘packed BCD’, which is commonly used, a byte is used to represent two decimal digits. An example is shown in Figure 11.12.

Figure 11.12 Packed Binary Coded Decimal representation of the decimal number 6927

Despite this simple representation, it is not completely straightforward to convert between BCD and binary. Standard algorithms are available, however, such as are used in Ref. 11.3. The Derbot light meter example uses a subroutine taken from this reference that converts a 16-bit number into a five-digit BCD number. This is used to prepare the data for the display. The underlying algorithm can be found in many books on computer arithmetic and in Ref. 1.1.

11.5.3 Multiplication

After addition and subtraction, multiplication is the next most common arithmetic requirement that is usually needed in computer arithmetic. Some processors have hardware multipliers in them and hence a multiply instruction. For the simpler ones, like the PIC 16 Series, multiplication must be achieved by software routines. The standard algorithm for this is a repeated shift and add process [Ref. 1.1]. A very wide range of standard routines are available, in both fixed point and floating point. The fixed-point ones come in different sizes, depending on the number size to be used. Inevitably, those with longer word length take more time to execute. Reference 11.2 has fixed-point multiply routines for 8-bit × 8-bit (with 16-bit result), 8-bit × 16-bit (with 24-bit result), and 16-bit × 16-bit up to 32-bit × 32-bit (with 64-bit result).

The Derbot light meter example uses a 16-bit × 16-bit multiply subroutine taken from Ref. 11.3, as is now described.

11.5.4 Scaling and the Derbot light meter example

A common application of multiplication is for scaling of input data, perhaps to convert it into a standard unit. The Derbot example is interesting in this respect.

The Derbot uses the power supply voltage of 5 V as its reference. Hence the 10-bit resolution is (5/1024) = 4.883 mV. Thus, the ADC least significant bit, when using this voltage reference, is ‘worth’ 4.883 mV. If the ADC output value is multiplied by 4.883, then the result will give a true millivolt reading. Yet it is awkward to introduce and track a binary point. A possible workaround is to scale the fractional number up by a binary power and then – after the multiplication – divide by the same number. It's easy to do this, as binary division is a straightforward process of shifting a number right, effectively discarding less significant bits.

For example, for the Derbot light meter, we want to do the calculation:

While we can't multiply by 4.883, we note that 4.883 × 256 = 1250.048 and we can do the following multiplication using integers only:

With the ADC output being a 10-bit number and 1250_D (i.e. 04E2_H) an 11-bit number, the result will be at most 21 bits. This defines the type of multiply routine needed.

If the intermediate result is then divided by 256, which can be done simply by discarding its least significant byte, then our scaling process is complete. The outcome is the voltage input to the ADC, given in millivolts.

One is justified in asking how the multiplying factor of 256 was chosen, rather than say 128 or 512. This depends on the rounding or truncation error introduced. The error in taking 1250 instead of 1250.048 is very small, well below 0.05 per cent, and so is acceptable when dealing with 10-bit numbers. In fact, it would have been acceptable to use 128 as the multiplying factor, but then the convenience of dropping the least significant byte for the division stage would have been lost.

Remember that all of this is a workaround. We could alternatively convert 4.883 directly to binary, which turns out to be 100.11100010, or 4.E2_H. With a bit of thought, and comparing this number with the multiplier we found above, it can be seen that the two methods are essentially equivalent.

The process described above is applied in Program Example 11.2, which scales the value of the rear LDR. It uses two subroutines: mult16x16 to multiply two 16-bit numbers and Bin2BCD16 to convert a 16-bit number to a five-digit BCD output. The program section starts after the ADC conversions have been made. The stored output of the ADC conversion, held in memory locations ldr_rear_hi and ldr_rear_lo, is transferred into aargb0 and aargb1, one of the 16-bit inputs to the multiplier subroutine. The other input to the subroutine is the word formed by bargb0 and bargb1. Into this is loaded the word 04E2_H, the hexadecimal equivalent of 1250_D. The mult16x16 subroutine is then called, with the result being placed in aargb0:aargb1:aargb2:aargb3. As the result can only be 21-bit, the most significant byte aargb0 will be empty and is ignored. The least significant byte is similarly ignored, as the result needs to be divided by 256. The next byte up, aargb2, is the less significant byte of the required result and is therefore transferred into the lower byte (templ) of the 16-bit input to the Bin2BCD16 subroutine. Similarly, aargb1 is transferred to the upper byte, temph. The Bin2BCD16 subroutine is then called. The output bytes of this are immediately used for transfer to the LCD, by the subroutine four_dig_disp. This sends the BCD characters in turn on the I²C link, for display on the hand controller LCD.

Program Example 11.2 Data processing sequence for rear light-dependent resistor, Derbot light meter program

All subroutines appear in the complete program listing on the book's companion website.

11.5.5 Using the voltage reference for scaling

The fact that the ADC output in the Derbot example immediately needs to be scaled, in order to provide a true voltage reading, can be annoying, and of course use of the multiply routine itself is time-consuming in program execution.

In some cases a judicious choice of voltage reference value can significantly simplify further calculations that need to be made. For example, if the Derbot ADC was fitted with a reference of 4.096 V, then 1 LSB of the output would represent 4 mV exactly and complex scaling would not be needed. Similarly, if the reference voltage was 1.024 V, then 1 LSB of the output would represent exactly 1 mV. Voltage references with values such as these are readily available for this very purpose.

11.7.1 Review of comparator action

A comparator is shown in Figure 11.14(a). The comparator simply compares its two inputs, shown in the diagram as V₊ and V_–. If V₊ is greater than V_–, then the comparator output goes to a positive voltage value, usually the maximum ‘saturated’ voltage level. If V₊ is less than V_–, then the output goes to a negative or zero voltage value. With suitable design of output circuit, the output voltage levels can easily be made to be recognisable logic levels.

Figure 11.14 Comparator. (a) The comparator symbol. (b) Example signals

An example of input and output voltages is shown in Figure 11.14(b). V₋ has been set to a fixed voltage, shown by the dotted line, while V₊ is varying. Whenever V₊ is greater than V_–, the output goes to Logic 1; when it is less, the output goes to Logic 0.

11.7.2 The 16F87XA comparators and voltage reference

The 16F87XA has two comparators, which share inputs with the ADC inputs. Comparator 1 has inputs on AN0 and AN3, and comparator 2 on AN1 and AN2. They are controlled by the CMCON register, seen at address 9C_H in Figure 7.6. A number of different configurations are possible. For example, comparator outputs can be routed externally, to pins RA4 and RA5, or they can simply appear as bits in the CMCON register. These can be easily looked up in the Microchip data [Ref. 7.1] and are not enumerated here. Importantly, the comparators also form an interrupt source. A change in state of either comparator will set the CMIF flag, seen in Figure 7.10.

The 16F873A also has a voltage reference module, under the control of the CVRCON register (address 9D_H). This is a resistor ladder, connected at one end to the supply voltage (via a switching transistor), which allows different voltage values to be selected as the reference. The voltage reference can be used as an input to one or both comparators, and can be output through pin 4 of the 16F873A. In this case, it can be used as a very crude ADC output.

11.8.1 The electronic tape measure

The ultrasound test program, shown in part in Program Example 9.7, forms the basis of an ultrasonic ‘tape measure’, displaying in centimeters the distance from the sensor to a reflecting surface. It processes data in a similar way to the light meter program of Program Example 11.1 and therefore shares a number of features with it.

To build the tape measure as a stand-alone unit, the circuit of Figure 11.15 needs to be built on the Derbot PCB, but without the LDRs and their resistors. A Devantech SRF04 or SRF05 ultrasonic sensor should be used. A set of connection points for this is available just forward of the motor locations on the Derbot PCB. Terminal pins should be soldered in here, or a PCB-mounting screw-terminal block used. Applying the sensor data [Ref. 8.7], connect 0 V, 5 V, pulse and echo to the pins, and glue or attach the sensor to a place of your choosing on the PCB. A completed unit is shown in Figure 11.16. Power is supplied from a 9 V PP3 battery held between main and hand controller boards. It connects with a flying lead to the main power input.

Figure 11.16 Derbot configured for light meter and electronic tape measure

Complete the build as described and create an MPLAB project around the Dbt_US_Test program, shown in part in Program Example 9.7. Adjust the initialisation to match your build, setting all unused port bits to output. Build the program and download to the microcontroller. Point the sensor at a reflective surface, and the distance between sensor and surface should be continuously displayed in centimetres on the hand controller display.

11.8.2 The light meter

To create the light meter, build the circuit of Figure 11.15 without the ultrasonic sensor. Download the Dbt_light_meter project from the book's companion website and create an MPLAB project around it. Adjust the program initialisation to match your build, setting all unused port bits to output. Build the program and download to the microcontroller. Run the program and see how all LDR readings are displayed. As discussed, each reading is in millivolts, but gives an indication of light intensity. Notice that the reading goes down as the light intensity increases.

11.8.3 The voltmeter

It is a simple matter to adapt the light meter program to a voltmeter. In this case, the LDRs should not be built onto the board. The voltmeter input is shown connected across the left LDR, although any other LDR connection points can be chosen. Input terminals for the voltmeter can be placed in the prototype area and connected appropriately.

Download the Dbt_light_meter project from the book's companion website and create an MPLAB project around it, giving it a name appropriate to this project. Adjust the program initialisation to match your build, setting all unused port bits to output (and noting that two ADC inputs are now no longer used). The program can otherwise be used as it is. It is better, however, to remove the two unused ADC readings and the two redundant displayed values, which will now have no meaning, unless a multi-input voltmeter is wanted. To test, connect a variable DC voltage input to your voltmeter input and connect a digital voltmeter across this. Check whether the two voltmeter readings agree.

This adaptation of the Derbot core design leads to a fairly inaccurate voltmeter, as the voltage reference is the power supply. The place of the rear LDR can, however, be taken by a voltage reference of appropriate value. It can be seen from Figures 11.6 or 11.8 that this input can be reconfigured as a reference input. The software scaling will need to change to reflect any change in reference value. By making these changes, a voltmeter of reasonable accuracy can be developed.

11.8.4 Other measurement systems

It is very easy to adapt the ideas already applied here to other measurement systems. This applies to any sensor that has a voltage output. There is, for example, a range of semiconductor temperature sensors that have a voltage output directly dependent on temperature. One of these could be used, either on a flying lead or soldered into the prototyping area. With the scaling adjusted, a digital thermometer can readily be developed.