Using Outside IP

One of the quickest ways to design a new chip is to not design it at all. Most big new chips include a fair amount of reused, borrowed, licensed, or recycled circuitry; not physically recycled silicon, of course, but recycled design ideas. Like a musician composing new variations on an old theme, it's often better to borrow and adapt than to create from scratch.

In engineering circles this is called design reuse or intellectual property (IP) reuse. IP is a high-sounding name for intangible assets that can be sold, borrowed, or traded. Lawyers use IP to refer to trademarks, logos, musical compositions, software, or nearly anything else that's valuable but insubstantial. Engineers use IP to refer to circuit designs.

Since the mid-1990s there has been a growing market for third-party IP: circuit designs created by an independent engineering company solely for the purpose of selling to other chip designers. As chip designs have grown ever more complex, the demand for this IP has grown and encouraged the supply. There are a few profitable “chip” companies that not only don't have their own factories, they don't even have their own chips. They license partial chip designs to others and collect a royalty.

To makers of large chips, it's an attractive alternative to buy parts of the design from outside IP suppliers. There are dozens of large IP vendors and hundreds of smaller ones. Some IP houses specialize in large (and valuable) types of circuit designs, such as entire 32-bit microprocessors, for which customers gladly pay more than $1 million in licensing fees, plus years of royalties down the road. Many smaller IP firms license their wares for $10,000 or less, sometimes without any royalties at all. There are also sources of free IP on the Internet, just as there are for free software.

Although outside IP is a great boon to productive chip design, it isn't all smooth sailing. First, customers often balk at the prices. Designing a new chip is an expensive undertaking already without paying large additional sums to an outside firm. Then there are technical problems. Outside IP is designed to appeal to the largest possible audience, so it's naturally somewhat generic. Potential customers might be looking for something more specific that outside IP doesn't offer. It's also possible that the IP won't be delivered in a form that the customer can use. If the bulk of the chip is being designed using Verilog, but the IP is delivered in VHDL, it's probably not usable. For IP firms that deliver their products as HDL, there's about a 50 percent chance of getting it wrong.

There's also the usual finger pointing when something goes wrong. If the chip design fails its final verification, does the fault lie with the licensed IP or with the original work surrounding it? Neither side will be eager to admit liability, but the IP vendor's entire business rides on delivering reliable circuitry. Usually these problems have their root in ambiguous or insufficient specifications or a misunderstanding between engineers on either side.

Hard and Soft IP Cores

Among IP vendors and customers, one of the first questions asked is, “Does this IP come in hard or soft form?” What the customer is asking is whether the circuit design will be delivered in a high-level HDL such as Verilog or VHDL, or as an already-synthesized “hard” design ready for manufacturing. There are pros and cons each way, and debate continually simmers over which way is better.

IP that's delivered in “soft” form (i.e., as an HDL description) is generally easier for the customer (the chip-design team) to work with, but it will have all the same drawbacks that all synthesized hardware suffers: larger size, slower speed, and higher cost when it's manufactured. That might be okay, but the customer will have to decide. On the plus side, the HDL is probably easier to integrate into the rest of the chip design, especially if the rest of the chip is also being designed with the same HDL.

IP vendors sometimes don't like to provide their wares in HDL form for two reasons. First, the usual drawbacks of synthesized hardware might make their product look bad. The IP vendor can't guarantee, for example, that its circuit will run at 500 MHz because it can't control the synthesis process. Consequently, the vendor winds up being very conservative and cagey about promising hard performance numbers. Unlike chip companies, IP companies rarely advertise MHz numbers (or power usage) in their literature.

Another aspect of soft IP that gives the vendors headaches is the possibility of piracy and IP theft. Soft IP is like sheet music, in that it's easy to duplicate and to pass copies around to others. As with sheet music, customers are supposed to pay royalties to the copyright holder in that event, but that's a tough law to enforce. Many IP vendors simply do not offer synthesizable IP cores for exactly that reason.

The alternative to soft IP is, of course, hard IP. A “hard” IP product (often called a core) isn't really hard. It's just the same as a soft core after it's been synthesized, placed, and routed. It's film, or the electronic equivalent of film. A hard core is nearly ready for manufacturing: All it needs is to be dropped into the rest of the chip design at the last minute.

There are good and bad aspects to using hard cores. They're generally faster, smaller, and use less power than synthesized soft cores because they've been extensively hand-tuned. For very high-performance or very low-power chips, hard cores are the only way to go. On the other hand, hard cores are much more difficult to incorporate into the rest of the chip, especially if that chip is being synthesized. Essentially, the chip's designers have to leave a rectangular hole in their design that exactly fits the hard core. Then, during the late stages of preparation before manufacturing, the hard core is inserted.

Hard cores prevent the customer's engineers from altering or modifying the core in any way, which is partially the point. IP vendors like delivering hard IP cores because they know their customers won't have access to the “recipe” for the IP. Hard cores also perform better than soft cores, as previously mentioned.

Early IP vendors in the mid-1990s almost always delivered hard IP cores. The trend has moved more toward soft IP in recent years, however. As more and more engineering teams use hardware-synthesis and HDLs for their own chips, they demand the same from their outside IP vendors. IP vendors might cringe because of the performance and security issues that soft IP raises, but the alternative is to lose business.

Various industry groups have looked at ways to protect soft IP by “watermarking” the circuit design or through public-key encryption of the data files, but so far these efforts have produced little. There might not be a need; the industry seems to be self-policing. The larger the customer, the more likely they are to regulate themselves. An infringement scandal in a public corporation would be a huge embarrassment, so they protect their suppliers' products very carefully. Smaller startups are likely to be a bit less conscientious, but they also represent a smaller economic threat to the IP vendor. In the end, an open and thriving IP market shows every sign of taking care of itself.

Physical Libraries

Another form of IP, although a much less glamorous one (if that's possible), is the physical library. These fit in toward the end of a chip's design, as it's being synthesized, placed, and routed. The physical libraries carry the arcane details of the production line that will be used to fabricate the part. As such, these libraries change from one semiconductor manufacturer to another, and often from one building or site to another within the same company. In the later stages of a chip's design, the EDA tools need to know exactly how thick, how wide, and how high each silicon transistor will be, and these characteristics vary slightly from maker to maker.

There used to be a thriving business in supplying these libraries (which are really just big data files) to chip designers, but no more. The foundries and other semiconductor manufacturers wised up to this business opportunity and began supplying libraries of their own. By supplying chip designers with their libraries for free, manufacturers provide a small incentive for a designer to choose that manufacturer. Soon it became de rigueur for any semiconductor manufacturer to supply a free library or risk being excluded when it came time to bid on manufacturing.