Field-Programmable Chips
Our first category of customizable chips are called field-programmable chips because they are programmed “in the field,” meaning in the customer's office or laboratory. They could be programmed literally out in a field, but that wasn't on anyone's mind when these chips were being developed. Field-programmable chips are like blank slates on which customers can draw their own chip design. Like blackboard slates, these chips are erasable and can be reused for many different chip designs.
The category of field-programmable chips includes some specific types that are called by different names by their manufacturers. Some are called FPGAs, short for field-programmable gate arrays. (A gate array is a technical term for an earlier kind of custom chip, which is covered later in this chapter.) You might also hear them called LCAs, for logic-cell arrays, PALs, for programmed array of logic, or CPLDs, for complex programmable-logic devices. By and large, all these terms refer to the same general thing. Naturally, there are minor differences between the FPGAs from one company and the CPLDs from another, but they share more similarities than differences.
Field-programmable chips aren't really custom at all. They're mass-produced like any chip, but customers can customize them after they receive them. Like an Etch-a-Sketch, they're sold by the millions to happy customers all around the world. Each customer can then use it to create, erase, and re-create nearly any chip design he or she can imagine. With an Etch-a-Sketch, you're limited only by the size of the screen. With field-programmable chips, you're limited by the amount of silicon on the chip. Bigger field-programmable chips can hold bigger and more ambitious chip designs, but they also cost more money.
How can a mass-produced chip work like a custom user-designed chip? Field-programmable chips like FPGAs and CPLDs work by dicing up their internal functions and connecting them back together with microscopic fuses or switches. Blowing one fuse disconnects one tiny portion of the chip; leaving the fuse intact leaves that function connected. By carefully deciding which pieces to connect, and how, you can create virtually any electronic design at all.
The whole process is, strangely, a bit like needlepoint. The canvas backing for needlepoint supplies a regular grid pattern, and you essentially connect the dots using colored thread. One little × at a time, a picture slowly starts to emerge. In the same way, field-programmable chips provide a silicon canvas on which you can paint your chip design.
Pushing the analogy a bit further, field-programmable chips waste a lot of silicon the way needlepoint wastes a lot of colored thread on the back of the canvas. This makes FPGAs and similar chips more expensive than usual. It also means field-programmable chips consume more energy than other chips of the same size. Every part of an FPGA that's disconnected by a blown fuse is a part of the chip that's wasted because it's silicon that had to be manufactured, tested, and sold, but is never used by the customer. The ratio of used silicon to unused silicon (called the utilization ratio) thus becomes a big issue for customers who don't like paying for any more silicon than they have to. Typical utilization ratios for a big FPGA are about 35 percent to 50 percent. You're extraordinarily lucky if you actually use 75 percent of an FPGA.
Tech Talk
Technically, some FPGAs and CPLDs don't use fuses; they use antifuses. An antifuse works in the opposite way from a normal fuse, meaning that when you “blow the fuse” you're actually making a connection, not breaking one. Antifuses have some subtle technical advantages over fuses, and one big disadvantage. They use slightly less electricity, and because most of the fuses (or antifuses) in an FPGA are not connected, you don't have to blow as many antifuses to get the connection pattern you want. The big downside to antifuses is they can't be “healed” once they're blown, so the chip can't be erased or reprogrammed.
CPLDs tend to be smaller and less expensive than FPGAs. A small CPLD might have a few thousand transistors, cost about $15, and be about the size of a jellybean. A big FPGA will have several million transistors, cost more than $1,000 per chip, and be as big as a box of matches. Both types—and plenty of sizes in between—are very popular and sell by the millions.
Regardless of type, almost all field-programmable chips are erasable and reusable. In other words, you can “heal” their internal fuses to reset the chip to its original blank condition. This is a great boon to chip developers, who can experiment with different designs without fear of throwing $500 chips into the trash every couple of hours. Field-programmable logic is one of the best things to ever happen to young engineers-in-training.
Apart from their comparatively high cost through wasted silicon, field-programmable chips are also slow. It takes time (albeit, very little time) for electricity to pass through the patchwork of fuses that makes up a large FPGA. All that time adds up, so field-programmable chips are much slower than “real” ASIC chips designed and built from the ground up to perform the same function.
You might think this would make FPGAs useful only for small prototype runs or for experimentation. In reality, companies buy FPGAs by the thousands and include them in their own products. Even though these companies know they're paying a price and performance penalty for using field-programmable logic, it's still cheaper and easier than manufacturing their own chip. Unless you've got a million dollars to spend on development, field-programmable chips are your best alternative.
The field-programmable chip suppliers know this, and their business models rely on customer dependency and addiction. The story is always the same: A new customer buys one or two of the latest expensive FPGA chips thinking they'll use them just for development or a few experiments. Then they buy a few more for their other engineers. Before long, they're buying dozens for use in prototypes. When their product is finished, they need still more FPGAs to build the first production run, and down the slippery slope they go. It's too late to redesign the product around some other type of chip. Time to market is too precious to jettison the FPGAs (which work) and start over with a cheaper alternative (which might not work). After two or three years of this, the customer has consumed thousands of expensive FPGAs and wonders how this compulsion began.