What's a Processor Architecture?

Architecture is the slightly pretentious word engineers use to describe how a microprocessor is designed. For simple semiconductor chip like AND-gates or inverters, there aren't many different ways to make one work. A brick is a brick is a brick. However, when you get to more complex and elaborate chips like microprocessors, there are thousands of different ways to design one, and the differences have a big effect on the chip's performance, cost, and power usage. All bricks might be the same, but brick buildings can be firehouses, palaces, or skyscrapers. Hence, the microprocessor architecture describes these differences.

RISC and CISC Architecture

The two most common schools of processor architecture are called complex instruction-set computer (CISC) and reduced instruction-set computer (RISC). Like WWI and WWII, the first term didn't become popular until the second term provided something to compare it to.

Neither RISC nor CISC is fundamentally faster or better than the other, all marketing claims to the contrary. RISC is the newer style of the two, but it has been much less successful in commercial terms. Until RISC came along, all microprocessor chips were CISC designs. Even today, CISC chips outsell RISC chips by a hefty margin. RISC is newer, flashier, and sexier (to an engineer, perhaps), but not necessarily better. (For reference, CISC is pronounced like the penultimate syllable in San Francisco; RISC is just what it looks like.)

Briefly, CISC chips include complex circuitry that allows them to calculate complex instructions (hence the name), such as adding several numbers together at the same time. RISC chips, on the other hand, have a much simpler set of instructions. Anything that's not absolutely necessary is jettisoned from the chip design, streamlining the chip and making it smaller, faster, and cheaper to manufacture (because it uses less silicon). The trade-off is that it takes several RISC instructions to do the same work as one CISC instruction, almost exactly offsetting the advantage of the faster chip.

Microprocessor designers argue like cooks in a kitchen. You might design or remodel a kitchen to include every modern appliance and gadget known to humankind. The kitchen would be expensive and large, but no recipe would be beyond your ability. You could also go to the opposite extreme and design only the most rudimentary and spartan kitchen. You'd spend a lot less money on hardware and the kitchen would be smaller (and easier to clean). Theoretically, you could prepare the same dishes in both kitchens, but in the “reduced” kitchen you'd have to put in more manual labor (e.g., no automatic pureeing of egg whites) and the recipes in your cookbook would have to be longer and more detailed. Is one better than the other? That depends on your taste and personal style. RISC promotes simple hardware and detailed instructions; CISC endorses complex hardware and fewer instructions.

DSP Architecture

A third major category of microprocessor designs is called digital signal processor (DSP). Like RISC and CISC, DSP is a design style, a way of organizing a chip to efficiently accomplish certain tasks. In the case of DSP chips, those tasks generally involve handling audio, video, and wireless information.

DSPs are like other microprocessors in most respects, but they are more adept at certain complex mathematical equations. In particular, DSPs are good at compressing and decompressing digitized audio, which is useful in cellular telephones and other wireless products. They're also good at compressing and decompressing video, such as for cable or satellite TV receivers. Finally, DSPs are good at converting these forms of digital information into a form suitable for high-speed transmission, which makes them good for cellular, terrestrial, and satellite communications.

Programming a DSP chip is a bit different than programming a RISC or CISC chip. DSP programmers tend to have a background in mathematics and understand arcane subjects like information theory, signal-to-noise ratios, and Shannon's Law. DSP programmers and RISC/CISC programmers often find little in common to talk about, even at technical gatherings.

Superscalar Architecture

Superscalar is the microprocessor equivalent of having several cooks in the kitchen. A superscalar microprocessor can run two or more instructions at the same time, like two or more cooks working on different recipes. Just as in a crowded kitchen, there are often resource constraints or other conflicts that reduce efficiency. Two cooks do not necessarily work twice as fast as one.

Some superscalar microprocessors can handle two instructions at a time, some can handle five or six, and some can do even more. The more instructions a chip can handle (the more “massively superscalar,” in computer parlance), the less efficient the whole operation becomes. The point of diminishing returns generally comes after about six simultaneous instructions on one chip.

VLIW Architecture

A microprocessor technique that's related to superscalar is called very long instruction word (VLIW), which doesn't say very much about how it works. All VLIW processors are superscalar but not all superscalar processors use VLIW.

To reuse our cooks-and-kitchens analogy, a VLIW processor works by splitting the instructions from a recipe into perhaps six different subrecipes, one for each cook. Six different cooks would all read from their part of the same cookbook and cooperate on the recipe together. This would be a strange arrangement, but it might avoid some of the haphazard confusion of six different cooks all running in different directions with no cooperation. The writer of this six-part cookbook would, we hope, organize the cooking instructions to maximize cooperation and avoid six-way squabbles over the paring knife.

In theory, VLIW microprocessors avoid many of the diminishing-return problems that plague other superscalar microprocessors. However, they put a great burden on computer programmers to maximize efficiency. Unless the programmers can find ways to gracefully orchestrate multiple “cooks,” they're no better off than before.