APPENDIX C: MOTOROLA 68000 AND SUPPORT CHIPS
by M. Rafiquzzaman
Microprocessor Theory and Applications with 68000/68020 and Pentium
- Cover Page
- Title Page
- Copyright
- Dedication
- Contents
- PREFACE
- CREDITS
- 1: INTRODUCTION TO MICROPROCESSORS
- 2: MICROCOMPUTER ARCHITECTURE
- 3: MICROPROCESSOR MEMORY ORGANIZATION
- 4: MICROPROCESSOR INPUT/OUTPUT
- 5: MICROPROCESSOR PROGRAMMING CONCEPTS
- 6: ASSEMBLY LANGUAGE PROGRAMMING WITH THE 68000
- 7: 68000 HARDWARE AND INTERFACING
- 8: ASSEMBLY LANGUAGE PROGRAMMING WITH THE 68020
- 9: 68020 HARDWARE AND INTERFACING
- 10: ASSEMBLY LANGUAGE PROGRAMMING WITH THE PENTIUM: PART 1
- 11: ASSEMBLY LANGUAGE PROGRAMMING WITH THE PENTIUM: PART 2
- 11.1 Logic, Bit Manipulation, Set on condition, Shift, and Rotate Instructions
- 11.2 String Instructions
- 11.3 Unconditional Transfer Instructions
- 11.4 Conditional Branch Instructions
- 11.5 Iteration Control Instructions
- 11.6 Interrupt Instructions
- 11.7 Processor Control Instructions
- 11.8 Pentium Delay routine
- Questions and Problems
- 12: PENTIUM HARDWARE AND INTERFACING
- APPENDIX A: ANSWERS TO SELECTED PROBLEMS
- APPENDIX B: GLOSSARY
- APPENDIX C: MOTOROLA 68000 AND SUPPORT CHIPS
- APPENDIX D: 68000 EXECUTION TIMES
- D.1 INTRODUCTION
- D.2 OPERAND EFFECTIVE ADDRESS CALCULATION TIMING
- D.3 MOVE INSTRUCTION EXECUTION TIMES
- D.4 STANDARD INSTRUCTION EXECUTION TIMES
- D.5 IMMEDIATE INSTRUCTION EXECUTION TIMES
- D.6 SINGLE OPERAND INSTRUCTION EXECUTION TIMES
- D.7 SHIFT/ROTATE INSTRUCTION EXECUTION TIMES
- D.12 MISCELLANEOUS INSTRUCTION EXECUTION TIMES
- D.13 EXCEPTION PROCESSING EXECUTION TIMES
- APPENDIX E: 68000/SELECTED 68020 INSTRUCTION SET
- APPENDIX F: PENTIUM INSTRUCTION FORMAT AND TIMING
- APPENDIX G: PENTIUM INSTRUCTION SET IN REAL MODE (SELECTED)
- APPENDIX H: PENTIUM PINOUT AND PIN DESCRIPTIONS
- BIBLIOGRAPHY
- INDEX
APPENDIX C
MOTOROLA 68000 AND SUPPORT CHIPS
PIA INTERFACE SIGNALS FOR MPU
PIA PERIPHERAL INTERFACE LINES
INTERNAL CONTROLS
FIGURE B.2 PORT A AND PORT B EQUIVALENT CIRCUITS
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