5.2.1.1 Semiconductor Laser Principle

The principle at the base of the working of a semiconductor laser is to create population inversion between valence and conduction electrons (or holes, depending on the material), exciting electrons from the valence to the conduction band of a semiconductor via current injection.

In order to achieve photon-stimulated emission, the transition between valence and conduction bands corresponding to the desired laser frequency has to be a “direct transition.”

This means that pseudo-electrons in the valence and conduction bands must have the same crystal momentum so that decay can happen with photon emission without the need of higher-order processes to compensate the momentum difference. In Figure 5.1 [2] the band structure of silicon, characterized by an indirect transition between the valence and the conduction band, is shown, while the band structure of an InGaAs alloy [2], characterized by a direct transition in the near-infrared region, is shown in Figure 5.2.

The requirement of direct transitions practically selects the materials that are suited to build semiconductor lasers: they are essentially the alloys of III–V semiconductors, starting from GaAs and GaAsP, used for pump lasers, to InGaAsP, which is generally the alloy in the active region of lasers used for transmission.

Once the material is selected, a structure suitable for electron pumping has to be realized. The best possible structure is an inversely polarized p–n junction. In a p–n junction under inverse polarization, the field in the junction zone is opposite to the electron flux; thus if a current is pumped in the junction, electrons pass through being promoted to higher-energy levels to overcome the junction potential barrier. In this condition the average population of the conduction band can become greater than the population of the valence band, thus causing population inversion.

However, if a simple junction is used, creating the conditions for lasing operation is quite difficult.

As a matter of fact, in a structure like that of Figure 5.3, there is no lateral confinement either for the injected current or for the optical field. Thus on the one hand, there is a constant electron loss due to the leak current flowing away from the inversion zone on the side of the device and, on the other hand, the optical mode is very large and the superposition of the mode with the inverted area of the junction where optical gain is concentrated is quite scarce.

In order to achieve effective lasing operation, both the current and the optical mode have to be effectively confined in the junction area.

Several architectures have been proposed to achieve vertical and lateral confinement, at present the most used solution is constituted by heterostructure index–guided architecture [1].

The heterostructure solution consists in realizing a p–i–n junction where the neutral zone is realized in a different alloy with a smaller band gap with respect to the doped zones. The band profile across the heterostructure is shaped approximately as shown in Figure 5.4 when an inverse polarization is applied.

The fact that the intrinsic material has a smaller energy gap with respect to the surrounding doped layers creates a sort of trap for the injected carriers: when the carriers arrive in the intrinsic zone, they fall in the potential energy hole and are confined to the intrinsic zone.

If the heterostructure provides confinement in the direction of the current injection, confinement in the lateral direction has to be achieved via some other system.

The most used structure for lateral confinement is the so-called index-confined architecture, where the optical mode is confined in the laser-active region by realizing an optical waveguide whose core is the active region itself. In this way the different materials provide confinement of the current and the diffraction index difference provides confinement of the field in the same region.

A transversal section of a buried heterostructure laser is represented in Figure 5.5. The gray area represents the active waveguide that is buried below the surface structure and assures contemporary good lateral current confinement and good superposition between the optical mode and the inverted region.

Once inversion is effectively realized, in order to start the lasing operation, a positive counterreaction has to be introduced via an optical cavity to sustain spontaneous oscillations of the structure.

The easier way to do this is to cleave the front and rear facets of the laser to create a reflectivity.

The inner laser waveguide behaves like a Fabry–Perot (FP) cavity assuring the needed feedback to the laser.

The structure of an FP laser is schematized in Figure 5.3. With the typical dimensions of semiconductor lasers, the FP cavity has a free spectral range so small that several modes are enhanced by the optical gain.

Thus in general, FP semiconductor lasers oscillate in multimode regime even if, with some care in designing the laser, few modes can be selected. Even when single-mode operation is achieved by using strongly wavelength-dependent mirrors (that can be realized by multiple layer coating of the FP facets) this is not a stable condition and side modes can start to oscillate due to environmental fluctuations or laser modulation.

In order to achieve real single-mode operation a strongly wavelength-selective feedback has to be introduced.

This can be done in several ways, among which distributed feedback (DFB) is by far the most used.

5.2.1.2 Semiconductor Laser Modeling and Dynamic Behavior

Once confinement is achieved both for the optical field and for the injected charges, the laser can be considered as a waveguide inserted into a resonant cavity with the core subject to population inversion to generate optical gain.

A physical modeling of the semiconductor laser would require a quantum representation of both the optical field and the pseudo-particle population inside the crystal.

In this way the laser equations will appear as a couple of interacting equations, one for the density matrix elements representing the electron population and the other for the quadrature operators of the field [3].

Even though this analysis is possible, it is quite complicated and, from the point of view of the physical comprehension of laser dynamics, is not more effective with respect to a semiclassical model.

In a semiclassical model, the laser behavior is represented with a set of rate equations for the propagating field and for the carrier density.

The only element that cannot rise from a semiclassical analysis is the spontaneous emission noise, which is a pure quantum element (compare Section 4.3.1.1). Thus the noise terms have to be added phenomenologically to the semiclassical rate equations [4].

With this in mind, the rate equations can be derived by the coupled field wave equation and electrons balance equation and by applying the slowly varying and rotating wave approximation to the wave equation [5].

At the end of these procedures, calling N(x,y,z,t) the carrier population in the conduction band, S(x,y,z,t) the optical energy inside the cavity, which is proportional to the photon density, and ϕ(x,y,z,t) the field phase, the coupled equations of a semiconductor laser can be written as

(5.1)

The symbols that appear in the rate equations have the following meanings:

D_N is the carrier diffusion coefficient. In many problems the carrier density can be considered approximately constant in the active region and zero elsewhere, thus neglecting the diffusion term D_N ∇ ²N and the dependence of N from the spatial coordinates.

J is the pumping current.

d_a is the active layer thickness.

q is the electron charge.

τ_N is the carrier’s lifetime.

G_N is the population inversion induced gain.

(N − N₀) is the population inversion factor.

Ɛ is the gain saturation constant.

τ_P is the photon’s lifetime.

γ is the confinement factor, that is, the ratio between the active region volume and the modal volume. This parameter is evaluated by solving the mode propagation into the active region.

ω₀ is the angular frequency of the optical field.

Ω is the resonance frequency of the laser cavity.

R_sp is the spontaneous emission rate.

α is the so-called linewidth enhancement factor. The fundamental limit for the linewidth of a free-running laser is provided by the Schawlow Townes formula. Semiconductor lasers exhibit significantly higher linewidth values due to a coupling between intensity and phase noise, caused by the dependence of the refractive index on the carrier density. In the semiclassical model, the linewidth enhancement factor α quantifies this amplitude–phase coupling mechanism; essentially, α is a proportionality factor relating phase changes to changes of the amplitude gain [6].

F_j, j = S, N, ϕ are the noise terms that are added phenomenologically to the rate equations. These are independent random processes whose first moments have to be determined from the results of the quantum theory. In particular we have

(5.2)

(5.3)

D_jk are the elements of the so-called diffusion matrix which, in the framework of the semiclassical approximation, can be written as

(5.4)

Realistic values of the parameters of a standard DFB laser used as a source in DWDM systems are reported in Table 5.1.

To describe the laser behavior on the grounds of Equation 5.1 what we have assumed up to now is not sufficient.

As a matter of fact, these equations are stochastic equations that cannot be solved if the distribution of the noise term is not known.

The most correct distribution of the terms F_j (j = S, N, ϕ) is not Gaussian: it is sufficient to consider that the term representing the shot noise (i.e., the fluctuation of the optical power) should be distributed following a Poisson distribution.

However, in the case of a stable lasing operation, it is possible to demonstrate that, due to the fact that the number of excited carriers and of the photons is very high, the Gaussian approximation implies a small error, in line with the overall accuracy of the semiclassical model.

Starting from Equations 5.1 and from the laser structure the main characteristics of a specific type of semiconductor laser can be derived. Despite the intrinsic complexity of their behavior, gain saturation happens also in semiconductor lasers.

In particular, due to the presence of the saturation constant, increasing the power in the cavity, the laser inner gain decreases so that the dependence of the emitted power from the pump is not exponential as foreseen in a laser without gain saturation.

Moreover, the dependence of the carrier density on a temperature typical of a p–i–n junction induces a sensible dependence of the curve relating the pumping current and the emitted power on temperature.

TABLE 5.1 Values of the Microscopic Parameters of a DFB Used at the Transmitter in DWDM Systems

A typical emitted power versus current characteristic of a DFB laser is shown in Figure 5.6. From the figure, the laser threshold, the dependence of the laser behavior on temperature, and the saturation of the cavity gain are evident, so that at each temperature a maximum emitted power exists at the edge of saturation.

Above the maximum emitted power, the gain saturation drives a decrease of the emitted power while increasing the driving current.

When emitting in continuous wave (CW) mode, a semiconductor laser is affected both by phase and by intensity noise due to the amplified spontaneous emission into the laser cavity and to the fluctuations of the carrier density.

The noise characteristics can be obtained from the rate equations with a perturbation approach, at least as far as the noise is small [7]. In particular, substituting the variables of the rate equations the following expressions

(5.5)

where N₀, S₀, and ϕ₀ are the stationary solutions of the rate equations without noise, and linearizing with respect to the noise terms, the noise statistical characteristics can be derived.

In particular, the linearized equations assume a simpler form by introducing the vector X¯=(S,N,ϕ) and the matrix

(5.6)

In order to evidence the macroscopic noise terms in the expression of the emitted field, it can be written as

(5.7)

where

r(t) and φ(t) are the relative intensity noise (RIN) and the phase noise

ℑ is the end mirror transmittance

τ_c is the cavity round trip time that allows us to pass from internal energy to emitted power

ψ is the phase contribution of the extraction mirror

The power spectral density of the RIN is given by

(5.8)

where it is not difficult to recognize the typical behavior of a resonance, whose natural frequency is ΩR2=(ΓSSΓNN+ΓSNΓNS) and whose dumping rate is (Γ_NN + Γ_SS).

The observation that the laser behavior is characterized by a dumped resonance is very general, not limited exclusively to the RIN spectrum.

As a matter of fact, the same behavior is exhibited by the frequency noise (i.e., the process φ˙=δφ/δt), whose power spectral density is given by [8]

(5.9)

Besides the presence of the laser characteristic resonance, the expression of the frequency noises spectrum allows also the other typical diode laser mechanism to be evidenced.

As a matter of fact, it is made by two terms: the first is due to the phase of random emitted photons, and the second is proportional through ΓφN2 to α² and represents the additional phase noise due to the coupling between amplitude and phase through the carrier density [9].

The power spectral densities of the RIN and of the phase noise for a typical DFB laser emitting at 1550 nm are represented in Figures 5.7 [10] and 5.8 respectively.

From the theory we have presented, it results that the same phenomenon causes both the excess RIN and the excess phase noise with respect to the quantum limit. Thus a relationship must exist between the RIN and the phase noise spectra.

This relationship can be obtained by simplifying the denominator in the expressions of the two spectra and deriving an expression for the relation between them.

This expression can be experimentally verified by passing from the phase noise to the linewidth that is one of the most commonly measured quantities in a laser.

A rigorous derivation of the laser linewidth that is possible starting from (5.9) [8] would conclude that the laser linewidth is not Lorentian, but is composed by a Lorentian lobe plus two side peaks far from the central wavelength, exactly the frequency of relaxation oscillations. However, in high-quality lasers these lobes are so reduced that a Lorentian approximation of the linewidth is more than accurate.

Assuming a Lorentian linewidth, the expression of the full width at half maximum (FWHM) is given by

(5.10)

where r is the cavity refraction index.

The curve relating the linewidth and the maximum of the RIN spectrum is shown in Figure 5.9 besides a set of experimental points from [11]. In particular the theoretical curve is obtained by best fitting the experimental data.

Another important characteristic of the semiconductor lasers is that they can be directly modulated acting on the bias current. However, when the bias current fluctuates, a complex dynamical behavior is observed, mainly due to the coupling between field amplitude and phase and to the resonance at Ω_R.

This phenomenon causes the contemporary presence of intensity and phase modulation, which always creates a frequency chirp in the direct modulated pulse train.

Besides this fundamental effect, a second phenomenon constraining the direct modulation bandwidth of semiconductor lasers is the presence of parasitic capacities in the structure. Reducing them is a key issue to increase the direct modulation bandwidth.

Considering again the rate equations with spatially constant variables and neglecting the noise terms, it is possible to study direct modulation by applying the substitutions in Equation 5.5 where now the fluctuations are due not to the noise but to the modulation.

In this condition the equations can be linearized again around the laser bias point. In this case Equation 5.7 can be used to pass from the field into the cavity to the emitted field so that the modulation index (i.e., the derivative of the emitted optical power with respect to the pump current fluctuations) results:

(5.11)

where ω_m is the modulation frequency. The presence of the natural laser resonance is always evident and in this case it limits the modulation bandwidth.

If the expression of the coefficients Γ_kj is substituted in Equation 5.11 it is evident that, besides the presence of a resonance, gain saturation (represented by the factor ε also contributes to shrink the bandwidth with respect to the theoretical limit, and that higher the gain saturation coefficient, the smaller is the modulation bandwidth.

Similarly to the power modulation index, a frequency modulation index can be evaluated whose expression is

(5.12)

Equation 5.12 represents the theoretical frequency response of a semiconductor laser that is responsible for both the possibility of modulating the output field frequency by modulating the bias current (property exploited for example to implement the Brillouin dither) and the chirp that unavoidably is present when the laser is directly modulated.

Equation 5.12, however, due to all the approximations that are the base to derive the rate equations, does not take into account several phenomena that cause the deviation of the frequency response of real lasers from the simple proportionality to the carrier density variations.

Generally the frequency response is almost flat up to the resonance of the laser, but here it shows the resonance effects through a peak and then decreases rapidly.

5.2.1.3 Quantum Well Lasers

A quantum well laser is a laser diode in which the active region of the device is formed by one or more regions so narrow that quantum confinement occurs, alternated by wider regions of higher bandgap.

The carriers in the active region are generally divided into two populations that occupy a completely different set of energy levels: carriers in the wells and carriers out of the wells.

Carriers out of the wells are ordinary pseudo-particles obeying the rules of carrier motion in crystals, and in particular they cannot have any energy in the forbidden band of the semiconductor forming the active region.

Inside the quantum well, quantum confinement of the carriers creates energy sub-bands inside the forbidden energy band. The central energy of the sub-bands depends on the well thickness.

This is easily understood remembering that in the simple case of a one-dimensional infinite energy well the energy levels of a particle are equal to E_n = n²(ħ²π²/8mL² ), where n is the quantum number and L is the width of the well.

Due to these characteristics the wavelength of the light emitted by a quantum well laser is determined by the width of the active region rather than just the bandgap of the material from which it is constructed. This means that much shorter wavelengths can be obtained from quantum well lasers than from conventional laser diodes using a particular semiconductor material. The efficiency of a quantum well laser is also greater than a conventional laser diode due to the stepwise form of its density of states function.

Beside the use of a quantum well, in order to shape the energy levels inside the active region, the so-called strain technique can be incorporated.

This consists in introducing in the quantum well zone a tensile or compressive strain, whose effect is to change the conduction sub-bands due to the quantum well.

One of the main effects of a controlled strain is to reduce the threshold current of the laser due to the increased separation between energy bands that renders recombination more difficult [12].

5.2.1.4 Source Fabry–Perot Lasers

Probably FP semiconductor lasers used as signal sources are the lasers produced in larger volumes on the market for a huge number of applications, from telecommunications to consumer electronics to sensors and so on.

In telecommunications such lasers are adopted at transmitters either to generate the carrier or to generate the information-carrying signal through direct modulation when single-mode laser operation is not required but the cost of the source is a key issue. As a matter of fact, due to the simpler structure and the great volume production, FPs are cheaper with respect to single-mode lasers like DFB.

Thus, FPs are the standard optical sources in several types of access systems, from point-to-point to A and B class G-PON. Moreover, such lasers are used in the low-performance client cards of transmission systems, where it is needed to connect systems in the same central office and the connection speed is not so high.

The typical emission spectrum of an FP InGaAsP laser emitting in a quasi single-mode regime is plotted in Figure 5.10. The side modes suppression ratio (SMSR) is about 19 dB, which is much lower than the typical 35–40 dB of a DFB laser, but is enough for several applications, especially if the laser has not to be modulated.

The presence of a few lasing modes in an FP laser generates the growth of a particular noise phenomenon when it is directly modulated: the mode partition noise [13].

Mode partition noise is due to the random fluctuations of the lateral modes that causes a change in the spectrum and a fluctuation in the power of the main mode due to the fact that the steady-state power emitted from the laser in a first approximation is constant and depends only on the pump and on the laser quantum efficiency.

The effect is an enhancement of the RIN well above the limit given by the spectrum in a strict single mode operation. This effect is shown in Figure 5.11 where the fact that the sensible amount of RIN is mainly due to the mode partition noise is clear from the form of the RIN spectrum.

A selection of characteristics of practical FP diode lasers for different applications is reported in Table 5.2. From the table the wide span of applications covered by FP lasers corresponding to the possibility of matching different set of requirements is evident.

5.2.1.5 Source DFB Lasers

In a DFB laser the feedback is obtained by building a grating immediately on top of the active zone or on the side of it, influencing the propagation of the tail of the guided mode. Via interaction with the mode tail, the grating blocks the amplification of all the wavelengths, save the one resonating with the grating itself, thus guaranteeing single-mode operation.

TABLE 5.2 Characteristics of Practical FP Diode Lasers for Different Applications

The scheme of a DFB semiconductor laser is shown in Figure 5.12 while its single-mode spectrum is shown in Figure 5.13.

Altering the temperature of the device causes the pitch of the grating to change due to the dependence of the refractive index on temperature. This dependence is caused by a change in the semiconductor laser’s bandgap with temperature and thermal expansion.

A change in the refractive index alters the wavelength selection of the grating structure and thus the wavelength of the laser output, producing a narrow band wavelength tunable laser.

The tuning range is usually on the order of 6 nm for an ∼50 K (90°F) change in temperature, while the linewidth of a DFB laser is on the order of a few megahertz. Altering of the current powering the laser will also tune the device, as a current change causes a temperature change inside the device.

If this temperature sensitivity can be exploited to tune the laser on the opportune wavelength, it also implies that, in order to match the stability requirements of high-performance DWDM systems, the laser has to be temperature-stabilized. This is generally done through a Peltier temperature controller and a feedback control loop that assure sufficient temperature stability in the face of environment changes and the device heat production during working.

TABLE 5.3 Characteristics of Practical DFB Lasers for Use as Sources in Telecommunication System

There are generally two distinct types of DFB lasers. Traditionally, DFBs are antireflection-coated on one side of the cavity and coated for high reflectivity on the other side (AR/HR). In this case the grating forms the distributed mirror on the antireflection-coated side, while the semiconductor facet on the high reflectivity side forms the other mirror. These lasers generally have higher output power since the light is taken from the AR side, and the HR side prevents power being lost from the back.

Unfortunately, during the manufacturing of the laser and the cleaving of the facets, it is virtually impossible to control at which point in the buried grating the laser cleaves to form the facet. So sometimes the laser HR facet forms at the crest of the buried grating, and sometimes on the slope. Depending on the phase of the grating and the optical mode, the laser output spectrum can vary. Frequently, the phase of the highly reflective side occurs at a point where two longitudinal modes have the same cavity gain, and thus the laser operates at two modes simultaneously. Thus such AR/HR lasers have to be screened at manufacturing and parts that are multimode or have poor SMSR have to be scrapped. Additionally, the phase of the cleaving affects the wavelength, and thus controlling the output wavelength of a batch of lasers in manufacturing can be a challenge.

An alternative approach is a phase-shifted DFB laser. In this case both facets are antireflection-coated and there is a phase shift in the cavity. This could be a single 1/4 wave shift at the center of the cavity, or multiple smaller shifts distributed in the cavity. Such devices have much better reproducibility in wavelength and theoretically they are all single mode, independent of the production process.

A selection of characteristics of practical DFB lasers for use as sources in telecommunication system is reported in Table 5.3.

5.2.4.1 Multisection Widely Tunable Lasers

The simpler type of multisection widely tunable laser is a multisection DFB. Since a standard DFB can be tuned thermally only about 5 nm or less, wider tunability is achieved by creating a laser with multiple cavities. Nonuniform excitation along the cavity in DFB laser enables a change in the lasing condition.

Multi-electrode DFB lasers have been realized to achieve nonuniform excitation where the electrode is divided into two or three sections along the cavity [20].

The tuning function is provided by varying the injection current ratio into two sections. A typical geometry for this kind of laser is shown in Figure 5.18.

Tuning in these devices results from the combined effects of shifting the effective Bragg wavelength of the grating in one or several sections and the accompanying change of the optical path length for the change of the refractive index itself.

Combining these effects with thermal discontinuous tuning, a bandwidth on the order of 15 nm can be achieved, which is much more than pure thermal tuning, but it is not enough to cover the entire C band.

Much wider tuning is achieved using multisection DBR lasers.

A principal scheme of a tunable DBR is represented in Figure 5.19 [21]. The central region of the laser is an active region where a heterojunction is realized to allow population inversion and optical gain. The laser cavity is realized by cleaving one of the active region facets and providing, on the other hand, wavelength-selective feedback through a Bragg grating realized in a portion of the laser waveguide external to the active region, called the Bragg grating region.

Between the active region and the Bragg grating region there is an intermediate part of the waveguide that is used to adapt the field phase to the cavity length through the change of the refraction index caused by carrier injection. This zone is called phase adaptation zone.

In order to satisfy the resonance requirements, the laser mode has to satisfy the relation

where

ϕ₁ and ϕ₂ are phase change of the Bragg reflector in the active and the phase control regions, respectively

k is an integer

Phase change ϕ₂ can be written as

(5.14)

where

subscripts a and p denote the active and phase control regions, respectively

β indicates a propagation constant

λ is the wavelength of the lasing mode

r is the refraction index

The phase ϕ₁ accumulated by the lasing mode passing through the Bragg reflector can be derived starting from the properties of Bragg reflectors.

The characteristic parameter γ of the Bragg reflector can be defined, following [22], as

(5.15)

where Λ, κ, α, and r_b denote the corrugation period, the corrugation coupling coefficient, the loss of the corrugated region, and the equivalent refractive index for the Bragg reflector, respectively.

The phase change experimented by the field when reflected by the Bragg reflector can be expressed as a function of the characteristic parameter γ and the overall cavity length L as

(5.16)

Substituting Equations 5.14 and 5.15 in Equation 5.16 the relation determining the possible lasing wavelength of the DBR laser can be obtained [1,21].

In particular, the laser will pass from one wavelength to the other when the index of the Bragg reflector section is changed by changing the carrier density with the injection of a current in the area; in general, however, the mode will start free oscillations only if the index of the phase matching section is suitably adjusted to satisfy the phase-matching condition (Equation 5.15).

It is clear that the phase-matching conditions can be attained contemporarily by a set of modes, due to the presence of the addendum 2kπ in the phase-matching condition.

Among the phase-matched modes only one starts laser oscillation: the mode having the highest cavity gain.

The cavity gain of a mode in the DBR structure is given by the gain of the gain section minus the losses in the phase-matching and Bragg sections. But these losses are again controlled by the carrier densities; thus the specific mode to start laser oscillations among those permitted by the phase-matching condition can be selected by correctly polarizing the three laser regions.

The DBR laser is a good tunable laser, but the tuning range is just slightly wider than 5 nm and never exceeds 10 nm, since it is essentially due to the change of the index in the Bragg section (the other indexes are changed to satisfy the phase matching and to select the correct mode, and do not directly contribute to tuning); thus the relationship Δλ/λ ∼ r/r still holds and the limited changing range of the refraction index defines the changing range of the emitted wavelength. It is possible to combine index-driven tuning with thermal tuning and in this way a tuning range as wide as 22 nm has been reached with simple DBR structures.

In order to achieve much wider tuning ranges, the tuning cannot be based only on index changes. Now it is useful to remember that only three causes can generate the tuning of a semiconductor laser structure [23]:

1. Index changes

2. Cavity length changes

3. Mirror wavelength-selective reflectivity tuning

Somehow all these three techniques have to be used if a tuning range twice the DBR maximum of 22 nm has to be reached.

This is possible by using a structure with multiple cavities and a short grating as reflector for each cavity. Sampled-grating DBR (SG-DBR) and super-structure grating DBR (SSG-DBR) lasers implement this idea in two different manners [24].

The sampled-grating design uses two different multielement mirrors to create two reflection combs with different free spectral.

The laser operates at a wavelength where a reflection peak from each mirror coincides. Since the peak spacing is different for various mirrors, only one pair of the peaks can line up at a time, so that, when the lasing wavelength passes from a couple of peaks to the others a big change of emitted wavelength is obtained with a small change of the mirror peak positions (Vernier effect [25]).

The scheme of a discrete tuning SG-DBR and a plot showing the idea of the Vernier effect are shown in Figure 5.20.

Even if this simple explanation of the SG-DBR principle seems to limit this kind of laser to step tuning, a suitable design can achieve also semi-continuous tuning, at the expense of a more complex control algorithm.

Most of the features of the SG-DBR are shared by the SSG-DBR [26] design. In this case, the desired multi-peaked reflection spectrum of each mirror is created by using a phase modulation of grating rather than an amplitude modulation as in the SG-DBR.

Periodic bursts of a grating with chirped periods are typically used. This multielement mirror structure requires a smaller grating depth and can provide an arbitrary mirror peak amplitude distribution if the grating chirping is controlled.

Using SG-DBR or SSG-DBR, discontinuous tuning ranges as wide as 60 nm have been reached, arriving in this way to oversatisfy the requirements.

On the positive side, they are compact, they maintain the properties of fixed-wavelength lasers, and, perhaps more importantly, they are suitable to be integrated with other devices leveraging the InP platform.

For example, if the output power has to be increased, it is possible to integrate immediately out of the laser, on the same waveguide, a semiconductor optical amplifier to achieve high output power, or if a compact component that can be directly modulated is needed, an InP modulator (either Mach–Zehnder or electro-absorption [EA]) can be integrated at the laser output.

Moreover, the typical reliability of integrated components is higher than that of components composed by different and possibly moving macroscopic parts.

On the negative side, there is the complex electronic control, which is more complex for more performing structures and the difficult processes needed to produce these lasers.

5.2.4.2 External Cavity Lasers

Limitation in tuning range experienced by integrated lasers when tuning is driven by the change of the optical cavity length is due to the fact that in integrated devices this is possible only by injecting carriers and changing the refraction index.

The situation is completely different in external cavity lasers, where the external part of the cavity can change its length with physical means in order to realize sufficient variations for very wide tuning.

The principal scheme of an external cavity laser is shown in Figure 5.21: after reducing the reflectivity of the cleaved active chip facet, part of the emitted radiation is reintroduced in the cavity of an FP semiconductor laser from an external etalon so as to realize a twocavity system: the FP cavity inside the chip and the external cavity.

The effect of the feedback on the original laser emission can be analyzed by introducing two characteristic factors of the external cavity:

1. The field phase shift Δϕ = ω₀τ experienced during a single external cavity round trip, where ω₀ is the field angular frequency and τ = 2L_c/c is the cavity round trip, L_c being the cavity length.

2. The feedback strength κ, defined as the amount of optical power reinjected into the laser.

The feedback strength can be evaluated starting from the reflectivity R_E of the external mirror and R_s of the facet of the chip obtaining

(5.17)

where τ_s is the laser cavity round trip time.

Naturally the external cavity will influence the laser behavior only if the feedback is not too weak. In order to state a qualitative condition that will help us to understand the order of magnitude of the parameters, let us state that the feedback is relevant for the laser dynamics only if it is more powerful than the spontaneous emission. This seems a reasonable condition since it requires that the feedback be visible by the laser above the noise plateau.

Since in a real laser the reflectivity of the external mirror will be on the order of 0.5 to allow sufficient feedback and sensible output optical power, it can be put at approximately R_s/(1 − R_s) ≈ 1, so that the aforementioned condition becomes

(5.18)

Equation 5.18 states an important property of external cavity lasers: the shorter the cavity (i.e., the smaller the τ_s), the more sensitive is the laser to small amounts of feedback. Thus, if the feedback has to strongly influence the laser behavior it needs to design a short cavity laser.

Moreover, it is to be noted that R_sp/r is practically proportional to the laser linewidth Δν (compare Equation 5.8), but for a factor on the order of 1. This factor, due to the condition ≫ appearing in Equation 5.18 can be neglected and the condition can also be written as R_E ≫ (Δντ_s)² showing that the purer the laser emission (i.e., the smaller the Δν), the more the laser is sensible to reflections.

In order to study an external cavity semiconductor laser, the rate equations have to be written taking into account the electrical field composing the optical wave and not the optical energy, since the feedback has to be represented in terms of the electrical field.

Neglecting the space dependence of the variables and writing the linearly polarized electrical field as E(t) = A(t) exp[iω₀t + ϕ(t)], the external cavity rate equations may be written as follows:

(5.19)

where τ_i is the round trip time of the gain chip inside the laser and A′(t) = (κ/τ_i ) cos[ϑ(t)]A(t − τ) is the intensity of the delayed light injected from the external cavity to the active cavity. The overall ratio between the emitted and the reinjected intensity is indicated by κ and the phase coupling angle is given by the following formula:

(5.20)

In Equation 5.19 also the noise terms have been neglected, since we are interested in the analysis of the deterministic behavior of the laser.

From the solution of the rate equations the dynamic of the external cavity laser can be studied.

In particular the following property is derived. The laser operation is strongly dependent on the so-called feedback parameter defined as ξ=(1+α2)κτ, where α is the linewidth enhancement factor of the gain chip.

If ξ < 1, the laser is in a regime of weak feedback, the laser cavity coincides with the chip cavity, and the feedback is a perturbation for the laser working. In this regime the rate equations can be solved using the perturbation theory where the “small” parameter is κ.

If ξ < 1 but κ ≪ 0.1, different regimes alternate with stable and unstable regions where, depending on the cavity length and feedback intensity, there is a strong mode hopping or a single-mode operation. However, when single-mode operation is achieved, the laser behavior in this region is quite unstable and changes in environmental parameters or aging can completely change the laser emission.

Moreover, laser tuning is difficult due to this instability. Thus this region is difficult to exploit practically.

If ξ ≫ 1 so that κ > 0.1, a stable operation regime of high injection is reached. The laser cavity is de facto the extended cavity (i.e., the chip plus the external cavity) and the presence of the chip internal facet can be considered a small perturbation to the extended laser working.

In this regime the laser is quite stable, its linewidth is sensibly reduced with respect to the value of the free running chip laser, and tuning can be operated by changing the cavity length without altering laser stability and without provoking mode hopping.

This is the regime in which practical external cavity tunable lasers work.

Considering from now on only the strong feedback regime, the laser output power can be evaluated once the exact laser structure is known. Considering in particular the structure in Figure 5.21, the output power is given by

(5.21)

where

η is the chip quantum efficiency

ε is the dielectric constant

L_i is the length of the gain chip

T is the total loss internal to the external cavity (e.g., focusing lenses)

R_i is the reflectivity of the cleaved chip facet

The aforementioned equations for power output indicate that, for a given injection current, the external-cavity laser generally has a somewhat lower power output than that of the solitary diode laser and, moreover, has higher threshold current, as shown in Figure 5.22.

As far as tunability is concerned, the emitted frequency is given, with a very good approximation, by the simple equation

(5.22)

where k is an integer. Also in this case, among all the possible oscillating modes, generally only one experiences spontaneous oscillations, that is, the mode having the greater net cavity gain.

Different schemes have been proposed to change the external cavity length, but in practice two have been adopted in commercial products: the use of a wavelength-selective liquid crystal mirror that can be tuned by the applied voltage and a mechanically movable grating mounted on a micromachining electromechanical switch (MEMS) actuator.

In both cases the selectivity of the tunable mirror does not assure stable single-mode operation. On the other hand, a tunable laser for application in DWDM transmission does not need to be continuously tunable; on the contrary it has to be restricted to the International Association for Standardization in Telecommunications (ITU-T) DWDM wavelengths.

Taking into account such a restriction, sufficient wavelength selectivity can be achieved by inserting a solid-state etalon in the laser cavity, whose FSR coincides with the ITU-T grid spacing.

In order to have good control of the optical signal reinjection and to avoid the creation of spurious cavities, special gain chips are produced with a curve-active waveguide, so that the entire cavity appears at the end to be a curve.

The resulting more practical scheme of the external cavity laser is shown in Figure 5.23.

Beside tunability, one of the most interesting features of the high-feedback external-cavity laser is its narrow linewidth. By extending the optical cavity length, the spontaneous recombination phase fluctuation in the laser linewidth can be dramatically reduced. Since resonance oscillations are damped by the small reflectivity of the internal-gain chip facet, the linewidth can be considered Lorentian with an FWHM given by

(5.23)

where

P₀ is the power in the mode

R_sp is the number of spontaneous emission photons in the mode

g is the local gain

Δv_f is the free running linewidth of the gain chip

The linewidth enhancement factor of the gain chip is indicated as usual with α.

The total cavity loss is indicated with αt=a−ln (T2RsRi), where a is the optical propagation loss.

It is not difficult to derive from Equation 5.23 substituting realistic values to the parameters that the external cavity reduces the linewidth of the gain chip of a factor that can be something like 5 or 7 so that external-cavity lasers with a linewidth of 250 or 500 kHz are used as sources in DWDM systems.

5.2.4.3 Laser Arrays

Laser arrays, where each laser in the array operates at a particular wavelength, are an alternative to tunable lasers. These arrays incorporate a combiner element, which makes it possible to couple the output to a single fiber.

If each laser in the array can be tuned by an amount exceeding the wavelength difference between the array elements, a very wide total tuning range can be achieved.

The DFB laser diode array might be the most promising configuration for wavelength division multiplexing (WDM) optical communication systems due to its stable and highly reliable single-mode operation.

A possible scheme of a laser array used as tunable laser is sketched in Figure 5.24, where a free space propagation (FSP) region, similar to that used in array waveguides (AWGs), is used to collect the laser output and an SOA to compensate losses.

In principle, this is the easiest way of realizing a tunable laser since it is simply a collection in a single chip of a set of well-known devices: DFB lasers, passive waveguides, an MEMS deflector or an FSP, in case of an output SOA to reinforce the signal.

In practice, the real difficulty consists exactly in creating a chip where all these components are realized together.

In particular, two kinds of implementation problems arise, design and fabrication problems.

From a design point of view, thermal and electrical isolation of all the components is not a trivial problem, since the component footprint has to fit into a standard laser package. Moreover, the design has to be so accurate that all the individual lasers hit the correct wavelength region so that each laser can be tuned on the frequencies for which it is designed by simple thermal tuning.

In case an MEMS deflector is used to focus the light emitted from the laser that is currently switched on onto the output fiber, this element has to be realized with great care for reliability. As a matter of fact, laser interfaces are the elements with a smaller lifetime in a DWDM terminal even when fixed lasers are used. Further shortening of the laser life span is not acceptable from a system point of view.

On the other hand, if an FSP element is used it could be difficult to have a sufficiently high output power without an amplifier at the output of the FSP. In this case, besides the need of a very low-noise and wide-spectrum amplifier, further integration problems could arise.

However, laser arrays have been the first “tunable lasers” to hit the market and they still are a type of tunable lasers widely used in practical systems.

5.7.1.1 CMOS Speed Evolution up and beyond the 32 nm Node

As far as the intrinsic RC circuit represented by the transistor gate is dominant over all the spurious RC contributions, the decrease of the gate length is directly related both to the switching speed of the transistor and to the power consumption.

Just to carry out an order of magnitude evaluation, both the capacitance and the equivalent resistance of the CMOS depend on the linear dimensions of the components. Assuming that the material does not change and that all the dimensions but the gate depth scale proportionally (both are in reality not true) in a very first approximation we can write

(5.33)

(5.34)

where

C_p and R_p are the parasitic capacitance and resistance

ε₀ is the dielectric constant of vacuum

κ is the permittivity of the material filling the gate

ρ is the resistivity of the doped silicon electrode

W, L, d are the spatial gate dimensions, d being the depth, ℓ the electrode equivalent length, W the electrode width, and A its equivalent section

If all dimensions scale with the same constant the second term of both Equations 5.33 and 5.34 scale with L, while it is expected that the parasitic term increases, decreasing the characteristic dimensions of the CMOS.

Thus, as far as the parasitic elements can be neglected, it is

(5.35)

Since the depth of the gate does not scale and A is also proportional to d, the second term of Equation 5.35 would increase almost as the inverse of the square of the gate length.

Unfortunately, the parasitic capacity and resistance cannot be neglected in a high-performance CMOS after the 90 nm node, so that the behavior given by Equation 5.35 is no more even approximated.

The decrease of the intrinsic capacitance of the CMOS and the behavior of the parasitic one is demonstrated in Figure 5.40 and a similar plot is shown in Figure 5.41 for the intrinsic resistance and for the parasitic resistance [47].

Several phenomena imply a growth of the parasitic parameters.

• As MOSFET geometries shrink, the voltage that can be applied to the gate must be reduced to maintain reliability. To maintain performance, the threshold voltage of the MOSFET has to be reduced as well. As threshold voltage is reduced, the transistor cannot be switched from complete turn-off to complete turn-on with the limited voltage swing available.

• The final MOS design is a compromise between strong current in the “on” case and low current in the “off” case. Sub-threshold leakage which was ignored in the past can now consume upward of half of the total power consumption of modern high-performance very large-scale integration (VLSI) chips [49,50].

• The gate oxide, which serves as insulator between the gate and the channel, should be made as thin as possible to increase the channel conductivity and performance when the transistor is on and to reduce subthreshold leakage when the transistor is off.

  However, with current gate oxides with a thickness of around 1.2 nm (which in silicon is ∼5 atoms thick) the quantum mechanical phenomenon of electron tunneling occurs between the gate and the channel, leading to increased power consumption.

  Insulators (referred to as high-k dielectrics) that have a larger dielectric constant than silicon dioxide, such as group IV metal silicates, for example, hafnium and zirconium silicates and oxides, are being used to reduce the gate leakage from the 45 nm technology node onward. Increasing the dielectric constant of the gate insulator allows a thicker layer while maintaining a high capacitance (capacitance is proportional to dielectric constant and inversely proportional to dielectric thickness).

• To make devices smaller, junction design has become more complex, leading to higher doping levels, shallower junctions, and so forth, all to decrease draininduced barrier lowering. To keep these complex junctions in place, the annealing steps formerly used to remove damage and electrically active defects must be curtailed [51], increasing junction leakage. Heavier doping is also associated with thinner depletion layers and more recombination centers that result in increased leakage current, even without lattice damage.

• Traditionally, switching time was roughly proportional to the gate capacitance. However, with transistors becoming smaller and more transistors being placed on the chip, interconnect capacitance (the capacitance of the wires connecting different parts of the chip) is becoming a large percentage of capacitance [50]. Signals have to travel through the interconnect, which leads to increased delay and lower performance.

Figures 5.40 and 5.41 individuate a threshold technology node with a dimension of the gate on the order of 22 nm, where the parasitic resistance and capacitance will become almost equal to the intrinsic one.

Before that point, the strategy to decrease the dimensions is effective in increasing the CMOS switching speed; beyond that point, it seems to become less and less effective up to a point at which the component will become slower while shrinking.

This evolution is individuated also in Figure 5.42, where the inverse of the response time is plotted versus the technology node.

To manage the increase in parasitic R_p and C_p a number of solutions are under consideration, among them using novel silicides different from Si₃N₄ and reduced polysilicon height [10] that will bring to a vertical the scaling of the structure.

Another option is that along critical paths of a circuit, the devices are not placed as close as possible to the nearby devices in the wafer. In this case there is some area penalty, but there may be a path for reducing the device degradation caused by the nominal device pitch.

Concluding the section on CMOS switching speed, Table 5.9 provides figures for last-generation CMOS gates in terms of characteristic propagation time [52,53]. This is expressed through the propagation delay, which is the time for an input instantaneous switch to manifest at the gate output.

Considering the digital circuits speed, last generation CMOS are currently used to design processors and other digital circuits dedicated to very high volume markets with a clock up to 20 GHz, while special applications ASICS have been developed up to a clock as high as 50 GHz, reached not only via the choice of the most advanced transistor, but also through a careful circuit design that uses all the structures needed to achieve a so high speed.

So high speed CMOS can be used, and in practice have been used, to design also analog microwave circuits, having performances that are comparable with the more traditional III–V transistors used in these applications.

Analog microwave circuits have been realized with 45 nm and 32 nm CMOS having a passband as high as 50–60 GHz confirming the exceptional speed of these components.

5.7.1.2 CMOS Single-Switch Power Consumption

An ideal CMOS dissipates power only when switching from one state to the other. In reality, the presence of a leakage current, due to several reasons, induces a power consumption also in steady state.

As far as the switching power consumption is concerned, it is related to the dissipation of the electron charge accumulated into the dielectric part of the charged MOS.

Thus the power consumption during switching depends on the switching frequency (number of switching operations per second) and on the dimensions of the gate.

It is interesting to analyze the power consumption at the maximum switching speed, for which indicative values are reported in Table 5.9.

When the CMOS is used to build a switch fabric it is interesting to analyze the energy needed to switch an elementary CMOS gate.

A simple digital 2 × 2 switch can be constructed as a circuit with three inputs and two outputs: the three inputs are the two signals and the control; if the control is on the switch is in the bar state, if the control is off the switch is in the cross state (see Figure 5.43). Realizing the circuit with simple gates and counting the number of elementary CMOS it is possible to evaluate the power consumption per bit of the switch.

Assuming a clock at 3 Gbit/s and a total power consumption of 750 μW, we obtained a value of 3 pJ/bit for the energy consumption per bit.

As underlined in the caption of Table 5.9, data we are using are relative to the 65 nm technology node since this component generation is widely diffused in high-volume products and reliable average data are available.

It is possible to imagine that passing to 35 and 22 nm the power consumption will further decrease and it will be possible to get near the value of 1 pJ/bit, which is considered the target for the consumption of electronic switches.

5.7.1.3 CMOS Circuit Cost Trends

A powerful driver both for the shrink of CMOS dimensions and for the increase of wafer radius is the continuous push to decrease prices of CMOS circuits even if functionalities grow.

The price to pay for this evolution is the use of more and more expensive planar processes, whose cost is partially due to the requirement to fabricate smaller and smaller structures and partly to the need of maintaining the process uniformity over greater and greater wafers.

This evolution is represented in Figure 5.44, where the time evolution of the cost in dollars of a single CMOS (estimated starting from the average cost of an integrated circuit) is compared with the time evolution of the cost of a lithography machine [47].

The cost of the CMOS is decreased as much as seven orders of magnitude, even if the lithography tooling has become continuously more expensive.

At the end of the story, this is really the propulsive strength of microelectronics: it is able to conjugate better performances and lower prices.

Before illustrating specific telecommunication applications of electronics, we will briefly illustrate the structure and the performances of three base electronics-integrated circuits: the application-specific integrated circuit (ASIC), the field-programmable gate array (FPGA), and the digital signal processor (DSP). The evolution of these circuits is not mainly driven by telecommunications, since they find application in a much wider market, comprising consumer appliances and almost all the industrial machinery.

It is a fact, however, that the continuous enhancement in the capabilities of such circuits has conditioned strongly the design of telecommunication equipments. Electronic equalization would not be possible without suitable DSPs and FPGAs, while the evolution of router capacity has been strongly driven by the evolution of the ASIC performances.

ASICs and FPGAs have been largely used to fasten the complex functionalities of next-generation SDH/SONET ADMs and of Carrier Class Ethernet switches, up to the level that the design of an interface card of a packet machine (would be a router or a switch) partially coincides with the design of ASICs or with a programming of FPGAs with suitable characteristics.

5.7.3.1 Programmable Connection Network

In order to build the programmable connection network, present-day FPGAs adopt essentially two different technologies: SRAM-controlled switches and antifuse.

An example of the use of an SRAM-controlled switch is shown in Figure 5.46 where the connection between two logic blocks through two switches constituted by one pass transistor and then a multiplexer is depicted. The whole subsystem is controlled by SRAM cells [61].

The other type of programmable switch used in FPGAs is the antifuse. Antifuses are originally open circuits and take on low resistance only when programmed. Antifuses are suitable for FPGAs because they can be built using modified CMOS technology [62].

Generally antifuses rely on saturable insulators, that is, materials that have a very high resistance without an applied voltage or if the voltage is below a threshold, but if the voltage is brought above the threshold abruptly, the resistance goes down to values typical of a conductor.

Amorphous silicon has a similar behavior and is effectively used in a few antifuses, but much more specialized materials exist that are compatible with the CMOS technology.

5.7.3.2 Logic Block

Logic blocks of an FPGA can be constituted by a large variety of sub-circuits, depending on the use for which the FPGA is designed.

Logic blocks simply as a couple of transistors or a flip-flop are used in some FPGAs, like in other complex structures using a look-up table and a set of logic ports are adopted.

An example of a complex-structure logic block is shown in Figure 5.47 [61]. Such a logic block includes look-up tables and two flip-flops, besides a certain number of logical gates.

Logic blocks of this type are also called configurable, since their functionality can be configured through the content of the look-up tables.

5.7.3.3 FPGA Performances

Since FPGAs are modular elements whose inner connectivity depends on the task to be realized; the performances of these elements depends both on the particular FPGA inner architecture and on the type of function to be carried out.

In telecommunication applications FPGAs are used, for example, to implement digital signal processing in equalization engines, to manage header information in simple communication systems or to carry out protocols in switching machines.

We will select a particular application that is quite studied in literature and that is a key for several equalization algorithms: basic linear algebra subroutines (BLAS).

We will essentially follow [63] in comparing the performances of a typical high-performance FPGA with C programs to execute linear algebra operations with both a standard high-speed central processing unit (CPU), and with a massively parallel graphic processing unit (GPU) running a standard mathematic kernel for high-performance and high-precision applications.

The time elapsed to perform a standard operation on an N × M matrix (like the multiplication for a 1 × M vector) is shown in Figure 5.48. The disadvantage of the FPGA versus a fast CPU with an advanced mathematical kernel is not so significant, and even the parallel GPU with the mathematical kernel gains only about a factor of 3 in speed, at the cost of an expensive and complex parallel processor.

Moreover, a correctly programmed FPGA is superior to a standard C programming of about a factor of 1.8, qualifying as a real-time processor.

On the other hand, the FPGA advantages are clear in terms of dissipated power, which is one of the main parameters to judge the electronic circuitry for signal processing.

In all the considered examples the FPGA is able to go over the 3000 iteration per Joule of burned energy, while the GPU can carry out an average number of 800 iterations for burned Joule and the CPU less than 600.

This is an important advantage that qualifies FPGA as a competitive alternative for many telecommunication applications, where the consumed power is a key issue.

Another useful comparison is between FPGAs and ASICs. In this field it is clear that the FPA will always have worse performances due to the specific optimization of a well-designed ASIC. On the other hand, carrying out an FPGA project can be 10 times less expensive with respect to an ASIC project and the final ASIC, once in production, has a competitive price only if produced in very large volumes, which is not the case generally for telecommunications.

This consideration often leads designers to use FPGAs instead of ASICS every time the required performances allow it.

5.7.4.1 DSP Hardware Architecture

In most of the applications requiring the use of a DSP, digital algorithms like digital filtering and FFT involve repetitive arithmetic operations such as multiplication, additions, memory access, and heavy data flow through the CPU.

The Von Newman architecture of standard microprocessors is not suited to this type of activity due to the fact that heavy mathematics without any access to the memory or to the input/output interfaces of the system practically nullify the ability of the processor to share the computation power among different processes exploiting the time each process takes to access the memory or the peripheral devices of the system.

DSPs overcome this difficulty by a hardware architecture that exploits a sufficient degree of parallelism so as to avoid the intense mathematics that will destroy the processor performance.

An example of basic DSP architecture is shown in Figure 5.49; this is a particular implementation of the so-called Harvard architecture [64] and exploits different levels of parallelism to speed the real-time processor operations:

• Program memory is separated by the data memory, thus massive data transfer does not collapse the transfer of program instructions to the arithmetic–logical unit (ALU). Moreover, in a standard microprocessor, where the program codes and the data are held in one memory space, the fetching of the next instruction while the current one is executing is not allowed, because the fetch and execution phases each require memory access. On the other hand, since the execution of an instruction requires fetching and decoding before the effective execution phase, it would contribute to speed up operations if the fetching phase would be carried out contemporary to the execution of a previous instruction. This is possible if data memory and program memory are separated and exploit separate busses. Thus, in a DSP with the architecture of Figure 5.49 two instructions are contemporary under processing in the ALU, one is executed, the other fetched. In many DSPs the pipeline process, which is the process constituted by putting in parallel different operations with a different state of completion, is even more developed. In these cases, three instructions are active at the same time: one is in the fetching state, the second in the decoding state, and the third in the execution state.

• The data memory is separated into two independent memory units, each of which has its own bus; in this way parallel data transfer is possible, easing operation on real-time data coming from the environment, for example, on data arriving from a transmission line.

• The ALU is supported by the parallel operation of a multiplier with an accumulator. The basic numerical operations in DSP are multiplication and addition. Multiplication in software is time-consuming, and additions are even worse if floating-point arithmetic is used.

  To make real-time DSPs possible, a fast dedicated hardware Multiplicator and Accumulator Circuit (MAC), using either fixed-point or floating-point arithmetic, is mandatory.

  This device also generally uses a pipeline process, since the operations can be represented in three steps: data read, execution and accumulation. Thus generally also the MAC has three active, contemporary operations, each of which is in a different state of its life cycle in the MAC.

• The ALU is also supported by a shifter that allows recurring operations to be carried out efficiently.

Beyond the basic architecture of Figure 5.49, a much higher degree of parallelization can be realized in high-performance DSPs, as shown in Figure 5.50. This architecture is inspired by what is presented in [65]; however, it is not intended to be the real product architecture, as it is simplified and schematized for explanation purposes and to present a more general example. Here, up to four MACs can be put in parallel to support the ALU in executing recurrent operations. The MACs are not connected to the ALU via the program bus, but via dedicated connections that allow a much more effective pipelining.

Moreover, different DSPs can be built, where one or two MACs can be substituted by other kinds of support units that operate in parallel, like shifter or more complex logical units that can perform also complex operations using hardware-coded instructions.

The pipeline operation and the division of the computation load among the ALU and the other parallel processing units are cared for by a specific part of the chip, a program control unit. This is supported by a sequencer that constructs the sequence of instructions for each parallel element.

The program control unit has also as support an emulation unit that allows more complex operations that have to be emulated via the inner language of the machine to be solved without charging the ALU. As a matter of fact, emulation is a complex operation that would slow the pipeline operation if it would be in charge of the ALU.

Finally different input/output units exist for data and program that are not shown in the figure.

5.7.4.2 DSP-Embedded Instruction Set

Besides architecture that facilitates intense real-time mathematics, the DSPs are equipped with an internal set of machine language instructions that are very different from those of general-purpose CPUs.

As a matter of fact, depending on the DSP-specific architecture, several recurring operations in digital processing are carried out by hardware parts of the ALU or by parallel elaboration circuitry, like MACs.

For example, key parts of an FFT algorithm can be encoded into a single machine language instruction in a DSP optimized for this kind of application.

Moreover, a DSP-embedded instruction set is almost always a reduced instruction set computer (RISC) set, where no micro-language is present to elaborate complex instructions.

The characteristics of a RISC set are as follows:

• The instructions are short and the execution time does not vary so much from instruction to instruction.

• The instructions have a fixed length.

• Every instruction is executed in a clock cycle.

• Memory is addressed with a small number of simple instructions.

• In order to face the reduced number of instructions and the absence of micro-language, registries are used much more than in a traditional CPU.

• Pipelining is easier.

5.7.4.3 DSP Performances

As in the case of FPGAs, it makes little sense to talk in detail about DSP performances, as they vary depending on the application and on the inner DSP architecture.

In the following part of this chapter we will see a lot of applications requiring DSPs or FPGAs in order to have an idea of what can be achieved with these electronic circuits in the telecommunication environment.

5.8.3.1 Feed-Forward/Decision Feedback Equalizer

The idea at the basis of the FFE/DFE is to compensate the dispersion via digital filtering of the received signal.

The electrical current after detection can be in general written as

(5.44)

where

b_j = 0.1 is the transmitted bit

g_j(t − jT) is the received pulse, whose shape depends on the position in the bit stream due to the presence of dispersion

T is the bit interval

Assuming that the pulse received in the absence of distortion would be f(t) and neglecting the pulse shape dependence on the position in the bit stream, the distortion equivalent filter D_ω(ω) is a filter whose characteristic is to transform the ideal pulse in the real one, that is

(5.45)

where

D(t) is the inverse Fourier transform of D_ω(ω)

The distortion equivalent filter is naturally only an approximation of the real channel behavior, which is nonlinear at least due to the photodiode. However, once D_ω(ω) is introduced, the distortion can be in principle compensated by inverting D_ω(ω). If this operation is well conditioned, which is the case in the optical channel, the current after the ideal compensator would be given by

(5.46)

where ⊗ indicates convolution in the time domain.

Sampling at the Nyquist rate and truncating the resulting series to a finite number of terms results in the FFE compensation algorithm

(5.47)

where d(k) are the coefficients of the FFE filter.

The algorithm of Equation 5.47 can be easily implemented by a digital circuit shown in Figure 5.54 that is essentially a set of taps and delay lines.

However, Equation 5.47 differs a lot from Equation 5.46 due to the finite number of taps and all the other approximations, thus a simple FFE does not assure a good chromatic dispersion correction. In order to improve the performance of the compensator generally the FFE is complemented with a DFE.

The DFE is essentially another set of delay lines and taps that is put as a feedback to the FFE in order to correct FFE operation.

Once the circuit is designed, its effectiveness depends on the choice of the FFE and DFE coefficients and on the number of taps. In practice, five to nine is a feasible number of taps; thus it is required to set up 10 or 18 coefficients to optimize the working of the compensator [71,72].

After initial setting, high-performance FFE–DFE relies on an adaptive coefficient setting algorithm that continuously adjusts the coefficients to optimize the receiver performance.

The determination of the FFE–DFE coefficient is in general a process of filter parameters determination in the presence of noise and many FFE–DFE use a least mean square (LMS) algorithm to adapt the coefficient on the grounds of the receiver performances. This solution allows a well-established processing to be used [73].

However, if shot noise cannot be neglected or if amplified optical noise is the dominant noise contribution (see Chapter 6) the noise affecting the photocurrent is not Gaussian so that the LMS algorithm is not the theoretically optimum solution. Other algorithms have been proposed, suitable for the coefficient determination in the presence of non-Gaussian noise that are more complex than LMS, but LMS seems to perform better especially in conditions of high dispersion and the presence of PMD [74]. As a matter of fact, while chromatic dispersion is in principle a deterministic phenomenon and presents only very slow changes due to aging and temperature fluctuations, PMD is a random fluctuating phenomenon. For this reason using an optimum algorithm for the equalizer coefficient identification is much more critical in the presence of a sizeable PMD.

Moreover, it is also demonstrated that, when using an electronic dispersion compensator based on the FFE–DFE the availability of an automatic threshold control (ATC) algorithm is very beneficial for the overall system working. As a matter of fact the compensator, while equalizing the intersymbol interference, also filters the noise with a digital filter that is generally adapted for equalization and not for noise filtering (Figure 5.55).

Since the equalizer implements a feedback structure the statistical distribution of the noise is changed after the equalizer, and more adaptive the equalizer, the more the noise distribution is filtered differently at different moments. An example of noise distributions is shown in Figure 5.56, where the decision-variable distribution estimate is shown in correspondence to the transmission of a “1” and the transmission of a “0.” Besides the distribution in the absence of equalizers, the distributions for different equalizers are shown. In particular, the equalizers are represented with the number of taps after the name of the filtering section (e.g., FFE3–DFE2 is an equalizer with three taps in the FFE and two taps in the DFE) and with the name of the adaptive algorithm used for the estimate of the coefficients. Here LMF [75] and LM8 [76] are two algorithms alternative to the LMS proposed in [74]. The effect of the equalizer in changing the decision variable distribution is clear from the figure, and the greater the equalizer complexity, the greater is the distribution change. Thus continuous optimization of the decision threshold is a key point for the optimum system working.

The fact that the equalizer changes the noise distribution has also another important impact on the overall working receiver.

In high-performance receivers an FEC is almost always implemented to enhance the system performance. The FEC gain in terms of SN_o needed to reach a certain post-FEC error probability is generally evaluated for a Gaussian noise at the FEC input. In case of optical systems there is a long experience that allows the gain of the most common FEC to be estimated also in the presence of the amplifier noise.

However, if the error statistics changes due to an equalizer, the FEC gain can also change. This is a problem that mainly hits nonlinear equalizers and can be important in the general design of the receiver.

An example of performance of the FFE–DFE is shown in Figures 5.57 and 5.58 [74]. Here the performance of a receiver in the presence of a signal carrying optical Gaussian noise (e.g., from optical amplification) is considered. In particular, the increment of the optical signal to noise ratio (Δ SN_o) needed to overcome the effect of dispersion is plotted versus the chromatic dispersion in Figure 5.57 and versus the PMD in Figure 5.58. An equalizer with nine taps in the FFE and four in the DFE is considered, with two different adaptation algorithms and with and without ATC.

From the figures it is evident that the insertion of an equalizer brings a performance degradation in the absence of dispersion, but increasing the dispersion increases the performance of the equalized receiver.

From an implementation point of view, the FFE–DFE is generally realized in digital CMOS technology. In order to digitalize the band-limited photocurrent, a fast ADC is required. After the ADC, depending on the complexity of the tracking algorithm and on the number of taps, both a high-performance DSP and an FPGA can be used. It is difficult that the volumes related to long-haul and ultra-long-haul systems justify the use of a specific ASIC, but FFE–DFE has been proposed also for interconnection on multimode fibers and class C G-PON. In these cases, if the use of equalizers becomes diffused, the development of dedicated ASICs is more than probable.

From an implementation point of view, the ADC is the bottleneck of the FFE–DFE design, since the ADC is a power-consuming component at high speeds and cannot exploit the parallelization of the digital signal in the following components. Today, ADCs that realize a sampling at 5–10 GHz are available on the shelf, but arriving at 80 GHz requires specialized and power-consuming circuits, while 200 GHz is for the moment out of reach.

This is why the use of these circuits is a consolidated practice at 10 Gbit/s, and is a challenge at 40 Gbit/s, where the advantage of having a greater receiver tolerance to dispersion has to be balanced with the greater power consumption, so it is not feasible for serial transmission at 100 Gbit/s.

To close the discussion on FFE–DFE, it is worth mentioning the proposal of nonlinear FFE–DFE based on the Volterra algorithm [77]. These nonlinear equalizers can mitigate the effects of dispersion much better than the classical FFE/DFE, but are more complicated to build. In a practical system the Volterra nonlinearity is limited to second and third order. However, the number of filter coefficients for such a nonlinear FFE of appropriate order (e.g., five taps) is still very high even if methods to reduce the complexity separating the linear from the nonlinear parts have been proposed.

5.8.3.2 Maximum Likelihood Sequence Estimation Equalizers

Theoretically much more powerful with respect to FFE–DFE, the equalizers based on the MLSE algorithm, after a period of pure theoretical study, have nowadays started to become practical circuits while electronics becomes more and more fast and functionally rich [78].

An MLSE equalizer solves the problem of identifying any hidden sequence of initial states (in the transmission case the transmitted bits) starting from the observed sequence of the final states (in our case the received samples before decision).

The Viterbi algorithm [79] operates on the assumption that the system under observation is a state machine, that it can be characterized by a state map composed of a finite number of states and by a set of allowed transitions that connect each state to the states that can be reached starting from it.

The algorithm is based on a few key assumptions:

• If the system starts from one state and arrives at another state, among all the possible paths connecting the two states on the state graph, one and only one is the most likely, which is called the “survivor” path.

• A transition from a previous state to a new state is marked by an incremental metric, usually a number. Typical metrics are the transition probability or the transition cost.

• The metric is cumulative over a path, that is, the metric of a path is the sum of the metric of each transition belonging to the path.

On the grounds of these hypotheses the algorithm associates a number to each state. When an event occurs, in our case every time a new sample is received at the decision level, the algorithm knows the state in which the system is and the previous sequence of states. Starting from them it examines a new set of states that are reachable from the initial state and that are compatible with the observed event, for each state combines the weight associated to the starting state with the metric of the transition and chooses the transition that creates the better combined value. This transition results in a new starting state that enriches the state sequence.

The incremental metric associated with a transition depends on the transition probability from the old state to the new state conditioned to the observed event and from the state transition history for a length equal to the channel memory.

After computing the combinations of incremental metric and state metric, only the best survives and all other paths are discarded. It is to be underlined that, since it is the path weight that is at the center of the Viterbi algorithm, the path history must be stored in order to work the algorithm.

In the case of an equalizer for the distortion of the optical channel, whatever technique is used to identify a finite number of states within the continuous response of the optical channel, the core issue is that the state graph is too big to be completely represented into the memory of the signal processor.

Thus the key issue of this kind of equalizers, besides the sampling at very high rate, is the reduction of the Viterbi algorithm both in terms of number of states and in terms of number of transitions, so as to be able to manage it with a DSP or programming an FPGA [80,81].

One of the most used techniques is that leveraging the circuit scheme of Figure 5.58. Once a new sample is received the probability density function that a “1” is transmitted conditioned to the value of the received sample is estimated starting from the previous N samples. This is the transition metric for the transition to the two possible new states: a “1” is received or a “0” is received.

Two operations help in limiting the complexity of the MLSE [82]:

1. Limiting the number of bits per sample and the number of samples per received intervals; as a matter of fact, if n samples are taken each bit interval and each sample has N bits and the number of MLSE states to be considered in every received bit interval is n2^N, a number that easily becomes too large to be managed by a DSP.

2. Simplifying the probability estimation (i.e., the channel characterization) contributes to speed the algorithm.

These two elements have been drastically simplified in order to realize equalizers that work at 10 and even at 40 Gbit/s, and the surprising thing is that the Viterbi algorithm works well also with a very simplified state machine.

As an example let us consider the architecture presented in Figure 5.59, where a trace-back of three bits is realized via a parallel processor working at 622 Mchips/s. The number of bits per sample is eight, but only one sample is extracted per bit period.

The performance of such an equalizer is shown in Figure 5.60 for a link affected by chromatic dispersion and in Figure 5.61 for a link affected by PMD [71]. As in the case of the FFE–DFE, the performances of the equalizer are measured through the increment of the optical signal to noise ratio (SN_o) needed to overcome the effect of dispersion.

In both cases, and both at 10 and 20 Gbit/s, MLSE outperforms the considered FFE–DFE as soon as the distortion becomes relevant.

The MLSE has also been demonstrated to be effective in mitigating the impact of non-linear distortion in DWDM systems. Both four-wave mixing (FWM) [83] and self-phase modulation/cross-phase modulation (SPM/XPM) [84,85] effects can be attenuated, contemporary to PMD and chromatic dispersion compensation.

As an example, let us consider the structure proposed in [84] where the MLSE digital equalizer comprises a 3 bit analog-to-digital converter operating at up to 25 Gsamples/s and a four-state (two bits per sample, one sample per transmitted bit) Viterbi decoder. This is a case of extreme reduction of the Viterbi algorithm, quite far from the unconstrained working.

Nevertheless, it is effective in mitigating both linear and nonlinear fiber distortions. This is demonstrated in Figure 5.62, where the performance of the MLSE EDC is compared with that of a similar uncompensated receiver in the case of 10 Gbit/s speed. The total fiber link length was 214 km of the G.652 fiber with a nominal dispersion value at 1550 nm of 17 ps/(nm km), for a total link dispersion of about 3638 ps/nm. The amount of transmitted power was varied to evaluate the performance of the MLSE EDC against SPM as a function of residual chromatic dispersion. The baseline SN₀ is about 12 dB due to the use of the FEC at the receiver.

The EDC figure of merit is always the increment of the optical signal to noise ratio (Δ SN_o) needed to overcome the effect of dispersion in a receiver equipped with a standard FEC.

Even if MLSE algorithms perform better even in their most reduced form, the circuitry implementing MLSE is in any case much more complex with respect to the circuitry implementing an FFE–DFE and it requires a much more complex design. This is going to influence prices of MLSE equalizers, at least up to the moment in which they will be diffused in large volumes.

Moreover, if an FFE–DFE introduces slight modifications to the signal statistical distribution, the MLSE changes it more radically.

As a matter of fact, MLSE is a sort of convolution decoding and the surviving errors at the MLSE output have characteristic configurations depending on the MLSE structure [86]. This affects the performances of a traditional FEC. Optimum performances are achieved by a joined design of the MLSE and the FEC so that the interaction between the two algorithms takes into account the correct noise statistics and optimizes the performances of both FEC and MLSE [87]. At present this design is greatly constrained by memory requirements both in terms of memory quantity and memory-processor communication speed. However, it is possible that further progress in electronics will make this technology more accessible.

5.8.5.1 FEC Definition and Functionalities

An FEC is from a functional point of view an extension of the well-known error-detecting code that is able to correct the channel-induced errors if the error rate is within the correction ability of the code [94].

We will consider in this paragraph systematic block group codes without memory.

• A code is a block code if the uncoded message is divided at the encoder in words of the same length and every word is processed by the encoder so as to obtain a longer word (called the code word).

  Let us assume that the encoder receives a message constituted by a string of symbols extracted from the message alphabet M, a collection of M symbols, that is, ≡ {χ_j, j = 1,…, M}. We will assume that the code word is composed of the same symbols of the message word. Thus the encoder transforms message words of m symbols into code words of ɗ symbols all from the same alphabet the difference s = ɗ − m is called code redundancy.

  Due to the encoding the line rate R_Line results in being greater than the message rate R_mess, being R_line = (1 + (s/ɗ)R_mess).

• A block code is systematic when the code word is obtained by adding to the message word a string of s symbols calculated by the encoder, but the message word is transmitted unchanged.

• A block code is said to be without memory when every code word is created at the encoder independently from the previous words and is processed at the decoder also independently from the previous words. Every possible channel memory is considered contained in the length of the message word.

• Finally a block code is called a group code when its coding and decoding algorithms are based on the fact that the alphabet M is structured as a group by defining suitable operations among its members. We will always consider codes built on alphabets that are at least rings (which have the structure of the integer numbers). In the most common cases in optical communications the alphabet structure is even richer, that is, it has the Galois field structure, which we will call G(M). This is the structure of the real numbers, but for the fact that the alphabet is constituted by a finite number of elements, differently from the real numbers.

Practically all the FECs used in optical communications have the properties considered in the aforementioned list, due to the fact that the encoding and decoding algorithms have to be performed in real time in pace with the arriving bit stream, whose speed is a minimum of 10 Gbit/s if not 40 or 100 [95–98]. This trend, however, is going to change with the need of more efficient codes for 100 Gbit/s transmission; at the end of this section we will look at one of the possible solutions for the next-generation codes: the turbo block codes.

A block code can correct errors since not all the words of ɗ symbols are possible code words, but only a subset of M^m words are acceptable. Thus, when an unacceptable word is detected, errors are revealed and, starting from the received word, an algorithm exists to estimate the transmitted word.

The number of nonzero symbols in the difference between two words of ɗ symbols in G(M) is called distance between the words and it is possible to verify that it has all the properties of a well-defined distance. The minimum distance between two code words is called Hamming distance of the code and it is quite clear that the upper bound of the number of errors that the code can correct is exactly the Hamming distance. As a matter of fact, changing a number of symbols equal to the Hamming distance is possible to change a code word into another code word, creating an error that is impossible to correct.

The Galois fields that are used in the block codes commonly used in optical transmission are the fields constituted by the integer numbers module for a given field-generating number ℘ which has to be a prime or the power of a prime; such fields are called G(℘). As an example, G(5) = {0, 1, 2, 3, 4}, where all the numbers have to be an intended module 5, so that, within G(5), 4 + 3 = 2 mod(5).

The symbols of the alphabet M are considered elements of G(M) so as to be able to perform operations with them. On the grounds of this definition, every word is represented with a polynomial in G(M), associating to the finite sequence of symbols {χ_j, j = 1, …, d} the polynomial P(y)=∑j=0d−1χj+1yj.

With this definition, encoding and decoding algorithms can be structured as an operation with polynomials on G(M), the type of operation that a dedicated logic like that of an ASIC or of a DSP executes very fast.

Different codes can be defined depending on the encoding and decoding algorithms; each code is characterized by a correction capability (number of independent errors the code can correct in a received word), a detection capability (number of errors the code can detect, but not correct, in a received code word), and a degree of complexity of the encode and decode algorithms.

5.8.5.2 BCH and the Reed–Solomon Codes

The category of codes that are more effective in providing a good error correction capability with simple implementation algorithms are the Bose–Chaudhuri–Hocquenghem (BCH) codes (named after their inventors). Reed–Solomon (RS) codes, even if historically invented independently, are a category of BCH codes and are the most used in high-speed transmission.

The encoding algorithm of BCH codes is based on the multiplication of the mth degree polynomial representing the message word by a generating degree & polynomial ɡ(x) so as to derive the ɗth degree polynomial representing the code word.

The encoder can thus be implemented as a very simple linear feedback shift register (LFSR) as shown in Figure 5.65.

The characteristics of a particular BCH code depend on the choice of the generating polynomial.

To describe the way in which the generating polynomial is constructed, let us fix a generating prime number ℘, which is introduced to construct the code in G(℘ ). Naturally in many cases of interest ℘ = 2.

To search a code with a given Hamming distance, start to choose two positive integers ɗ and c such that ɗ and ℘ are reciprocally prime in G(℘^m) (their unique common divisor is 1) and m is the multiplicative order of ℘ modulo ɗ.

To construct the generating polynomial it is needed to find the elements (a^c+j, j = 1, …, &) where a is a primitive ɗth root of unit in G(℘^m). In correspondence of each of the a^c+j it is possible to find a minimal polynomial over G(℘), that is the minimum degree polynomial in the considered field with leading coefficient equal to 1 and having a^c+j as radix; let us call it μ_j(χ).

The BCH code-generating polynomial is given by g(x) = lcm(μ_j(χ), j = 1, …), where lcm() indicates the lowest common multiple.

From the definitions, we can also say that a given word of ɗ symbols χ_j in Γ(℘^m) is a code word if and only if the polynomial P(x)=∑j=0d−1χj+1xj has all the elements a^c+j as radix.

The construction we have described assures to the BCH code a minimum Hamming distance equal to δ and the ability to correct up to δ independent errors for each code word.

RS codes are particular BCH codes, where c = 0 and the generating polynomial is given by

(5.48)

As far as decoding is concerned, there are many algorithms to decode BCH codes; we will describe the most used here, due to its easy implementation at high speed.

At the decoder the received word composed by ɗ symbols is considered as a polynomial generated by the channel, adding to the sent polynomial t(χ) an error polynomial e(χ) so that correcting errors means determining e(χ) and subtracting it.

The algorithm steps are essentially three:

1. Compute the & syndromes ξ_j of the received word, which are defined as ξ_j = t(a^c+j). It is evident that if all the syndromes are zero the word is a code word and it is considered correct. If not, there are errors to correct.

2. Starting from the syndromes find the error polynomial e(χ).

3. Reconstruct the correct code word as c(x)= t(χ)–e(χ).

The second step, that is the core of the algorithm, is not obvious, and it is not within the scope of this section to detail a procedure to determine the error polynomial starting from the syndromes.

There are two main algorithms to do that: the Peterson–Gorenstein–Zierler algorithm and the Berlekamp–Massey algorithm, both based on a set of linear operations on matrixes and vectors in the space (℘^m).

Both the algorithms for their nature are well adapted to be implemented in a dedicated signal-processing circuit, and this is the reason for the wide adoption especially of the RS codes, for which the algorithm can be further simplified.

In general, the BCH decoder has the bock scheme represented in Figure 5.59.

5.8.5.3 Turbo Codes

The BCH codes, and the RS that are a particular class of BCH, guarantee a simple coding/decoding algorithm that is suitable for application at very high speed, but are far from the optimality since the capacity of a channel using BCH codes is far from the Shannon limit [94], even if very long code words are selected.

This indicates that much better codes must exist, guaranteeing a higher number of corrected errors for a certain redundancy and code word length.

A class of better codes that is also suitable for application at high speed is constituted by the so-called turbo codes [99,100].

Turbo codes are a class of codes that construct the code word by concatenating two codes separated by an interleaver (see Figure 5.66).

The turbo code word, when the component codes are systematic, can be arranged in a matrix, whose rows are transmitted in a determined order, as shown in Figure 5.67, where it is clear that redundancy is added not only to check errors in the message, but also to check errors in the redundancy introduced by the composing codes.

As a result of the aforementioned definition, the encoder can be built from the encoders of the constituting codes so that the encoder of a systematic turbo code will appear as in Figure 5.68.

Starting from its very general definition, there are several classes of turbo codes: with and without memory (convolution or block codes), systematic or not (i.e., such that the redundancy is separated by the original message at the output or not).

Since we target codes that can be applied in optical systems at a very high speed, we limit our attention to block turbo codes based on two equal BCH components, which results naturally as systematic codes.

The choice of the interleaver is a crucial part in the turbo code design. The task of the interleaver is to scramble the symbols in a predetermined way. The presence of the interleaver has two beneficial effects on the code.

The presence of code words with a high number of null symbols (in case of the BCH codes the zero of the Galois field) weakens the code, since in general they are separated by a smaller distance. From this it derives the general property that a good code has the highest possible average weight, where the code weight is defined as the average of the weight of the code words, that is, the average of nonzero symbols in the code words.

Now, in a turbo code, if the first encoder produces a low-weight word, it is improbable that the second also will do the same after scrambling. Generally it can be seen that scrambling increases the average weight of the code word, while decreasing at the same time its variability.

A second advantage of scrambling is constituted by the fact that decreasing the correlation between the two coded words that are transmitted increases the information that is sent to the decoder, thus allowing more effective decoders to be designed.

Ideally both these advantages are maximized by using a random scrambler, but it is difficult to realize at the high speeds typical of optical systems.

In Figure 5.69 the workings of a few possible interleaver designs are shown for the cases in which the sequences to be interleaved are binary [101].

Row–column interleaver: In this type of interleaver the data are written row-wise and read column-wise. This is a very simple design, adapted for use at very high speed, but it also provides little randomness.

Helical interleaver: In this type of interleaver, data are written row-wise and read diagonally.

Odd–even interleaver: In this encoder architecture, encoding happens before interleaving, and after encoding only the odd-positioned coded bits are stored. Then, the bits are scrambled and encoded again, but now only the even-positioned coded bits are stored.

The idea at the base of the decoder of turbo codes is that the signal arriving at the receiver is composed of two words encoded with the same code where the symbols are in a different order.

It is intuitive, even if it is not so easy to demonstrate, that the quantity of information the decoder has on the sent word is much greater than what it would have if only one code were used.

In this situation, the generic decoder of a turbo code is a sort of soft decoder having at the input the row samples of the received data and constituted by two different decoders, one for each component code.

The decoders exchange information about the received word and at the end, if no errors happen, both produce the same output symbol stream.

Naturally, if the two decoders produce in a certain step two different outputs, they detect it by exchanging data, and interpret it as the presence of errors starting a joined procedure to determine the nature of the error and to correct it.

All this procedure is much more complicated than the decoding algorithm of BCH codes, but nevertheless can be carried out fast using dedicated logic, like a very fast DSP or FPGA or more probably an ASIC.

There is a strong research effort to study properties and implementation of turbo code decoders and the interested reader can start from the following bibliographies [102,103].

5.8.5.4 ITU-T OTN Standard and Advanced FEC

The use of a FEC implies that besides the signal to be transmitted, a redundancy is sent to be used by the decoder to correct decision errors or to perform optimum soft decision.

Since this redundancy has to be placed within the transmitted frame, it is natural to compare the requirement of the most performing codes that are suitable for optical transmission application with the ITU-T frame standard for optical transmission.

Currently, ITU-T has standardized the use of codes with 7% redundancy (exactly 16 bit redundancy and 255 bits overall length), as recommended in ITU-T G.975 and its successor ITU-T G.975.1. A 7% code is applied directly to blocks of binary information bits, producing an output sequence, whose length is expanded by a factor of 255/239, and the resulting bit stream is transmitted using a binary modulation format. That is, redundancy is accommodated by sending more symbols.

The research on transmission systems, however, is going toward a different direction.

As we will see in Chapter 9, in order to transmit speeds higher than 40 Gbit/s binary modulation is not suitable and multilevel coding is a very attractive solution. When multilevel coding is used, redundancy can be either transmitted by increasing the symbol rate or by increasing the number of symbols. For example, if a 16-level transmission is used, redundancy can be accommodated by passing to 32 levels. This means that one redundant bit is transmitted every three message bits.

As far as specific codes are concerned, the RS (255, 239) code was the first to see wide-spread application in fiber-optic communication systems, due to its high rate, good performance, and efficient hard-decision decoding algorithm.

As the speed of electronics increased, it became practical to consider more powerful error-correcting codes. The ITU-T G.975.1 standard describes several candidate codes providing better correction performances, all with a 16/255 structure in order to be accommodated into the Optical Transport Network (OTN) frame in place of the RS (255, 239).

In all the considered cases, hard-decision decoding is applied, and improved performance can be partially attributed to the significantly longer block lengths considered.

Due to the period in which this standard has been developed, no soft decision and no block turbo codes have been considered.

Even if the optical community has, so far, standardized FEC at 7% redundancy, this choice is not at all fundamental. The 7% value certainly reflects a reasonable choice of code rate, given the manner in which optical communication systems have been operated to date.

Due to the high SN of optical channels, the uncoded symbol error rate for binary signaling schemes is small. For the RS (255, 239) code, communication with bit error rates less than 10⁻¹² requires an uncoded error rate (or “FEC threshold”) of less than 1.5 × 10⁻⁴.

Since optical systems have traditionally been operated to achieve such low pre-FEC error rates, a high-rate code was sufficient to provide sizeable coding gains, and 7% redundancy provided a reasonable balance between bit rate and error-correcting capability.

From an information theoretic perspective, however, mandating 7% redundancy unnecessarily restricts the pre-FEC symbol error rate to be small.

When multilevel transmission will come into play, that seems a must for transmission at 100 Gbit/s; this implies that the used multilevel constellation has to include a small number of points so as not to cause too big an SN penalty (see Chapter 9).

To increase the spectral efficiency of fiber-optic communication systems (e.g., via multilevel modulation), it is necessary to design the coded modulation scheme using information theoretic considerations. Maximizing spectral efficiency may, in fact, lead to operating points in which the “raw” error rate requires the use of codes with greater than 7% redundancy.

In view of the next-generation systems, this discussion will be opened inside the ITU-T and for sure, if effective proposals will emerge, standardization will include them into the standard.

The opportunity to do so will be standardization of multilevel optical systems, which are all to be developed since only binary systems are covered by today’s ITU-T recommendations.

Due to these considerations, in all our examples, we will not limit our self to consider 7% redundancy codes, even when binary systems are considered.

5.8.5.5 FEC Performances

A great effort of research has been devoted to determine the performances of various FECs in terms of SN gain. In the case of optical systems, the results obtained in the FEC-related literature have to be elaborated due to the particular form of the optical receiver.

As a matter of fact, we will see in Chapter 6 that the most important application of FEC is in long-haul and ultra-long-haul systems. In this case the error probability depends on the optical signal to noise ratio (SN_o), which is in turn proportional to the optical received power. In general the FEC performances are provided in terms of gain on the SN immediately before decision, which in the optical case is the electrical signal to noise ratio (SN_e).

In order to evaluate the performances in terms of optical gain, we have to link the SN_o with the SN_e using the receiver parameters.

Even if this relationship can be derived in a general way, this is not so significant. The most important cases are the two extreme cases in which there is no optical noise and the receiver noise plus shot noise dominates and the case in which the optical noise dominates.

As detailed in Chapter 6, these are the cases of unamplified systems and optically amplified systems.

In the first case, assuming as always in practice that the received optical signal can be modeled as a time sequence of coherent states, the overall noise after detection is equal to the variance of the shot noise plus the electronic noise (see Section 5.4).

Thus the electrical SN can be written as

(5.49)

as obviously the SN_e depends on the square of the optical power; thus a gain of X dB in SN_e results in a gain of X/2 dB in terms of optical received power.

In the case of dominant optical noise, the SN_o can be written in general as