Improving the stream buffer

In order to deal with an intermittent data stream, there are two possible approaches (for this specific setup):

  •  The USART peripheral on this MCU is capable of detecting an "idle line" and generating an interrupt by setting the USART_CR1:IDLEE bit when an idle line is detected.
  • The USART peripheral also has a receive timeout that can also generate an interrupt after no start bits have been detected for a specified number of bit times (0-16,777,215). 
    • This timeout is specified in the USART_RTOR:RTO[23:0] register.
    • The feature can be enabled with USART_CR2:RTOEN and the interrupts can be enabled with  USART_CR1:RTOIE.

Either of these features could be used to generate a USART interrupt, cut the DMA transfer short, and transfer the data to the stream buffer.

For extremely high baud rates, care needs to be taken when using the idle line approach because the number of interrupts generated is only capped by the baud rate. If there is inter-character spacing (idle time between each character being sent), you'll wind up with an interrupt-driven approach (with even more overhead than normal).

On the other hand, using the receive timeout feature means additional latency before processing the incoming data. As usual, there is no one-size-fits-all solution here.

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