16.3. INDUSTRY STANDARD MECHANICAL PLATFORMS SUPPORTING RAPIDIO
Platform standards help ensure a broad level of interoperability among a set of system components such as printed circuit boards, subracks and cabinets. Including a complete set of mechanical, electrical, protocol, and operating specifications in a platform standard achieves this interoperability. The specifications are either directly defined in the platform standard or are included by referencing other standards. A platform standard enables an industry to produce various system components, which in turn can be used by OEMs to readily build an application specific solution. VMEbus, CompactPCI and PMC are some well-known examples of platform standards.
The RapidIO interconnect is an interface standard that specifies protocol, electrical and management environments to ensure interoperability on the interface. From the beginning the RapidIO Trade Association made a conscious decision not to develop a complete platform specification, which would include mechanical environment specifications. Instead, the RapidIO Trade Association relies on and facilitates various other industry standard forums to incorporate the RapidIO protocol and electrical specifications. This approach is based on the realization that the embedded application market is very broad and diverse. No one mechanical platform could address the associated diverse mechanical packaging requirements.
In the following sections several industry standard mechanical platforms supporting RapidIO will be briefly examined. These are either officially completed standards or are proposed standards being developed at the time of this writing. Other RapidIO standard mechanical platforms are likely to emerge in the future. These platforms illustrate how RapidIO is being successfully applied to a variety of mechanical environments that use readily available and relatively cost-effective board materials and connector technologies. Table 16.1 summarizes the industry standard mechanical platforms discussed here.
These mechanical platforms can be useful for a number of other purposes, besides serving as a basis for assembling production products. One, they can be used as a way to rapidly prototype a system. This can be especially useful to enable early software development. They can be used as a reference design from which the design of an application-specific proprietary system platform can draw upon. In many cases, these industry standard platforms have had extensive channel simulations and real system validations. Finally, these standard platforms can be used as the infrastructure for interoperability testing between multiple devices from multiple vendors. As we will see, one standard RapidIO platform was explicitly developed for interoperability testing.
| Standard or proposed standard | Standard organization | Form factor | RapidIO physical layers supported per card | RapidIO fabric topologies supported |
|---|---|---|---|---|
| RapidIO HIP | RapidIO TA | Card (~300 cm2 and greater) Baseboard (up to 4 cards) | Four Serial 1X/4X Two Parallel 8-bit One Parallel 16-bit | Any |
| CompactPCI Serial RapidIO (PICMG 2.18) | PICMG | Card (~350 cm2) Backplane (up to 21 cards) | Four Serial 1X/4X @ 1.25 Gbps | Star, Dual Star, Mesh |
| AdvancedTCA Serial RapidIO PICMG 3.5 | PICMG | Card (~900 cm2) Backplane (up to 16 cards) | Fifteen Serial 1X/4X | Star, Dual Star, Full Mesh |
| Switched Mezzanine Card XMC (VITA 42.1 and 42.2) | VITA Standards Organization | Mezzanine (~110 cm2) | Multiple Serial 1X/4X Two Parallel 8-bit One Parallel 8-bit | Any |
| Advanced Mezzaine Card (PICMG AMC) | PICMG | Mezzanine (~130 cm2) | Multiple Serial 1X/4X Two Parallel 8-bit One Parallel 16-bit | Any |
| VME Switched Serial VXS (VITA 41.2) | VITA Standards Organization | Card (~350 cm2) Backplane (up to 18 cards on fabric) | Two Serial 4X | Star, Dual Star |
| VME Advanced Module Format (VITA 46) | VITA Standards Organization | Card (~350 cm2) | Multiple Serial 1X/4X | Start, Dual Star, Full Mesh |
16.3.1. RapidIO Hardware Interoperability Platform (HIP)
The RapidIO hardware interoperability platform, or HIP, is an exception to the RapidIO Trade Association's strategy of not directly developing mechanical platform standards. It was developed by and is maintained by the trade association. The primary goal of the HIP specification is a simple and flexible mechanical platform that multiple RapidIO vendors can use for inter-operability testing. The HIP specification references the PC industry ATX standard for its base motherboard and plug-in card mechanical specifications. To this specification an additional high-speed connector is added to carry RapidIO signals between a plug-in card and the baseboard. Overall, the HIP specification is very minimal and flexible. The intent is to ensure multi-vendor platform compatibility while encouraging innovation and adaptation to individual needs. Figure 16.2 is a photograph of the Tundra HIP motherboard. This photograph shows how the new square high-performance connector is placed below the traditional PCI connectors used in personal computers. The HIP motherboard definition can be used to provide switched connectivity and interoperability testing between different RapidIO equipped plug-in cards.
16.3.2. CompactPCI Serial RapidIO (PICMG 2.18)
The CompactPCI Serial RapidIO (PICMG 2.18) specification adds serial RapidIO as an alternative board-to-board interface for the popular CompactPCI platform standard. This provides a significant improvement in bandwidth compared with the traditional CompactPCI interfaces: PCI, H.110 and Ethernet. These traditional interfaces are not required, but are also not precluded. So, a heterogeneous CompactPCI system, supporting both new high bandwidth as well as legacy, can be easily constructed. Figure 16.3 shows a PICMG 2.18 processor board. This board, developed by Spectrum Signal Processing, transmits Serial RapidIO across the existing connector and backplane structure where it can be connected to other RapidIO based boards in the system.
Figure 16.2. HIP platform example (Reproduced by permission of Tundra Semiconductor Corporation, Ontario, Canada)
Figure 2.18. processor board (Reproduced by permission of Spectrum Signal Processing Inc.)
The PICMG 2.18 standard effort chose to use the existing 2 mm CompactPCI connector. This both ensures a level of mechanical compatibly and keeps connector costs reasonable. After performing various signal integrity simulations it was determined that 1.25 Gbps was the maximum reliable speed for a serial RapidIO differential pair on this platform. Each board can have up to four bidirectional 4x Serial RapidIO links running at 1.25 Gbps for a total of 40 Gbps of aggregate bandwidth between the board and backplane.
16.3.3. AdvancedTCA Serial RapidIO (PICMG 3.5)
The advanced telecom computing architecture (ATCA or AdvancedTCA) is a recent family of platform specifications targeted to requirements of carrier-grade communications equipment. PICMG 3.0 is the base standard, addressing mechanics, board dimensions, power distribution, connectors, and system management. This base does not specify an interface fabric for the platform. Various subsidiary specifications provide choices for the fabric. Subsidiary specification PICMG 3.5 defines a serial RapidIO fabric over the ATCA backplane.
The high-speed differential connectors used in ATCA are capable of data rates in excess of 5 Gbps per pair. Thus, 3.125 Gbps Serial RapidIO links are easily mapped on to the connectors. Each board supports up to fifteen 4x Serial RapidIO links. ATCA backplanes can have a maximum of sixteen slots and can be routed as a full mesh, where every board slot has a link to every other slot. Very-high-performance applications can use the full mesh for a potential system aggregate bandwidth in the terabits per second. Dual star and single star topologies are also supported as simple subsets of the full mesh topology.
Figure 16.4. Example ATCA chassis (Reproduced by permission of Mercury Computer Systems, Inc.)
16.3.4. Switched Mezzanine Card XMC (VITA 42)
The Switched Mezzanine Card (XMC) specification adds high-speed fabric interfaces to the widely popular PCI Mezzanine Card (PMC). This is achieved with a new high-speed connector. A traditional PMC module supports a 32/64-bit PCI bus on two or three connectors. An XMC module adds one or two new connectors. This allows both the traditional PCI bus and new high-speed fabrics to be supported simultaneously. For example, an XMC carrier board can contain both sets of connectors, allowing either legacy PMC modules or XMC modules to be used. XMC modules with only the new high-speed connectors are allowed as well. Figure 16.5shows the structure of the XMC card and the placement of the legacy PCI connectors and new high-performance connectors.
Figure 16.5. XMC card structure
An early draft document called RapidIO Mezzanine Card (RMC) was developed in the RapidIO Trade Association and was used as the initial contribution in the development of the VITA XMC specifications. VITA 42.0 is the base specification, defining mechanical and connector elements. Subsidiary specifications define a mapping of a particular interface technology on to the base specification. VITA 42.1 defines the mapping for parallel RapidIO and VITA 42.2 defines the mapping for serial RapidIO.
16.3.5. Advanced Mezzanine Card Serial RapidIO (PICMG AMC)
The Advanced Mezzanine Card (AMC or AdvancedMC) specification is a mezzanine card format optimized for mounting on ATCA cards, but can be used on other card form factors as well. It contains a number of enhancements over earlier mezzanine card standards, including: hot-swapping and high-speed I/O connectors. Organized similar to the ATCA specifications, the AMC specifications include a base specification (PICMG AMC.0) with mechanical, thermal, power, connectors and management elements defined. Subsidiary specifications specify a mapping of a particular interface technology on to the base specification.
In the maximum configuration, the AMC connector supports 21 differential signal pairs into the card and 21 pairs out of the card (21 bidirectional ports). The connector's signal integrity supports a data rate in excess of 10 Gbps on each pair. Thus, multiple 3.125 Gbps 1x or 4x Serial RapidIO links are easily mapped on to the connectors. Two 8-bit parallel RapidIO interfaces or one 16-bit parallel RapidIO interface can also be supported on an AMC.
16.3.6. VME Switched Serial VXS for RapidIO (VITA 41.2)
The VME Switched Serial (VXS) specification adds a high-speed fabric interface to the venerable VME platform, while maintaining direct backwards compatibility with legacy VME64x boards. The base specification VITA 41.0 defines a new additional high-speed connector. A VXS backplane can support legacy VME bus boards, boards with both VME and a serial fabric, and boards with just the fabric interface. The subsidiary specification VITA 41.2 defines a serial RapidIO fabric on the new connector.
The high-speed differential connector used in VXS is capable of data rates in excess of 5 Gbps per pair. Thus, 3.125 Gbps Serial RapidIO links are easily mapped on to the connectors. Each payload board supports two 4x Serial RapidIO links. Two special fabric board slots are defined, each supporting up to eighteen 4x links, one link back to each payload board. The two fabric slots are also connected together with four more 4x links.
16.3.7. Advanced Module Format (VITA 46)
The Advanced Module Format platform retains many elements of VME while completely replacing the board-to-backplane connectors to support dense high-speed I/O. The board and chassis mechanics as well as the VME electrical and protocol interfaces are retained. Both VME bus signals and serial fabric signals are mapped on to the new connectors. While this approach does not support direct slot backward compatibility with legacy VME64x boards, a single chassis and backplane can be easily designed to support a heterogeneous mix of legacy slots and advanced slots. The high-speed differential connector used in VITA 46 is capable of data rates in excess of 5 Gbps per pair. Thus, 3.125 Gbps Serial RapidIO links are easily mapped on to the connectors. A minimal fabric configuration supports four 4x Serial RapidIO links on a board. In a fabric-only configuration more than twenty 4x Serial RapidIO links can be supported on a board.