Minimum Input Impedance.

The input impedance is established by the differential input resistance of the op amp. The input resistance of the 741 (R_D) is listed in the manufacturer’s data sheet (Appendix 1) as at least 300 kilohms. The minimum input resistance, then, is computed as

(3.1)

In this particular case,

It is important to note that without feedback the (−) input does not behave as a virtual ground.

Maximum Input Current.

The maximum input current can be calculated by application of Ohm’s Law:

Since this is a sinusoidal waveform, we can convert it to a peak value if desired:

Output Voltage.

The limits of the output voltage in the circuit shown in Figure 3.2 are simply the values of ±V_SAT. For ±15-volt power supplies and a load resistance of greater than 10 kilohms, the manufacturer’s data sheet in Appendix 1 lists a minimum output swing of ±12 volts. If we loaded the circuit with a resistance of less than 10 kilohms, we could expect the output levels to decrease.

Op Amp Selection.

We must select an op amp that can satisfy the output voltage requirements, survive the input voltage swings, and respond to the input frequencies. The manufacturer’s data sheet in Appendix 1 confirms that a 741 is capable of delivering a ±10-volt output. More specifically, the minimum output voltage with ±15-volt supplies and a load of greater than 10 kilohms is ±12 volts.

Additionally, the data sheet indicates that input voltage levels may be as high as the value of supply voltage. So far, the 741 seems like a good choice. Now let us consider the frequency effects.

The open-loop voltage comparator application requires the output voltage of the op amp to change from one extreme to the other. This change requires a finite amount of time. For DC or low-frequency applications, this amount of time is generally insignificant. As the input frequency increases, however, the switching time becomes a greater portion of the total time for one alternation of the input signal. In the extreme case, if the input alternation were shorter than the time required for the output to change states, then the comparator would cease to function properly. That is, the output voltage would not have time to reach its limits.

The slew rate of the op amp determines the maximum rate of change in the output voltage. The minimum acceptable rate of change is determined by the application. For purposes of example and as a good rule of thumb, let us design our circuit to have rise and fall times of no greater than 10 percent of the time for an alternation of the input signal. For our present design, the highest input frequency was specified as 10 kilohertz. The time for one alternation can be calculated from our basic electronics theory as

(3.2)

where t(period) = 1/frequency. In our case,

and

Our maximum rise and fall times will then be computed as

(3.3)

In the present case, we have

The minimum acceptable slew rate for our op amp can be computed with the following equation:

(3.4)

In our present example, the minimum acceptable slew rate is computed as

It is common to divide this result by 10⁶ and express the slew rate in terms of volts per microsecond. In our case,

The slew rate for a 741 op amp is listed in the data sheet as 0.5 volts per microsecond. Clearly, this is too slow for our application. If we use the 741, our output signal will look more like a triangle wave than a square wave. Appendix 4 shows the data for another alternative.

The MC1741SC op amp should satisfy the voltage specifications of our design. Additionally, the minimum slew rate is listed as 10 volts per microsecond. We will use the MC1741SC for our design.

Figure 3.5 shows the resulting design. The oscilloscope displays in Figure 3.6 reveal the actual performance of the circuit.

1. Upper threshold voltage

2. Lower threshold voltage

3. Hysteresis

4. Maximum frequency of operation

Upper Threshold Voltage.

The upper threshold voltage is the value of voltage that appears across R₁ when the output is at its maximum positive level. In our present circuit, the maximum output is essentially +V_SAT. We will use the lowest value given in Appendix 1 (10 volts) for +V_SAT. The value of threshold voltage is computed by applying the basic voltage divider formula.

(3.5)

where V_T is the total voltage across the series resistors R₁ and R_F. In our case, we have

This calculation reveals a significant limitation for this circuit. The value of threshold voltage is directly affected by the value of V_SAT. That value, however, is far from constant. Appendix 1 indicates that V_SAT can vary from a low value of 10 volts (with a heavy load) to as high as 14 volts when lightly loaded. The resulting variation in threshold voltage may be objectionable in some applications. If so, the feedback voltage can be regulated (e.g., by using a pair of zener diodes) for more consistent performance.

Lower Threshold Voltage.

The lower threshold voltage for the circuit shown in Figure 3.7 is computed using the same method, Equation (3.5), discussed for the upper threshold. The value is computed as

The lower threshold suffers from the same variations described for the upper threshold. Also notice that in this particular circuit, the upper and lower threshold voltages are equal in magnitude and positioned on either side of 0 volts. Other circuits may have dissimilar magnitudes for the two thresholds. Additionally, the thresholds are not necessarily centered around 0 in all detector circuits.

Hysteresis.

The hysteresis of the circuit shown in Figure 3.7 is simply the difference between the two threshold voltages. That is,

(3.6)

In the present case, we have

The higher the value of hysteresis, the more noise immunity offered by the circuit. In the present case, once the input voltage has crossed one of the threshold levels, it will take a noise pulse of the opposite polarity and with a magnitude of at least 1.82 volts before the output will respond.

In the case of equal ±V_SAT voltages, the hysteresis may be computed directly with the following equation:

(3.7)

Maximum Frequency of Operation.

Since the output voltage of the zero-crossing detector switches between two extreme voltages, the upper frequency limit is more appropriately determined by considering the effects of slew rate rather than the falling amplification. You will recall that the slew rate of an op amp limits the rate of change of output voltage. For purposes of this calculation, we will determine the highest operating frequency that allows the output to switch fully between ±V_SAT. If we exceed this frequency, the output amplitude will begin to diminish. The reduced output voltage will produce a similar reduction in threshold voltages and the hysteresis voltage.

Appendix 1 lists the slew rate of a 741 op amp as 0.5 volts per microsecond. The output must change from one saturation level to the other during the time for half of the input period (assuming a symmetrical output signal). For purposes of worst-case design, let us assume that the saturation voltages are at their highest magnitudes (listed as ±14 volts in Appendix 1). The minimum time required to switch between these two limits is computed as shown:

(3.8)

In the case of equal magnitudes of ±V_SAT voltages, this can be expressed as

(3.9)

In our present case, the minimum switching time is determined as shown:

Since this corresponds to half of the period of the highest input frequency, we can determine the upper frequency as shown:

(3.10)

In our case, we have

The above equation represents a worst-case situation. It should be noted, however, that the output waveform under these extreme conditions will more closely resemble a triangle waveform than a square wave. Whether or not this is objectionable is totally dependent upon the application. In cases where output rise and fall times must be short compared to the pulse width, the following equation can be used to determine the highest operating frequency for a particular ratio (ρ) of switching time (t_S) to stable time (t_P).

(3.11)

In the case of Figure 3.7, we have already computed t_S as 56 microseconds. Now suppose we want the switching times (rise and fall) to be one-tenth (0.1) of the stable time (t_P). This establishes our ratio ρ as 0.1. The highest frequency is then computed as

If the input waveform is such that the output will not be symmetrical, then t_S establishes the shortest (either positive or negative) alternation of the output waveform. The highest frequency of operation, however, can be obtained when the output waveform is symmetrical.

Determine the Required Slew Rate.

In this type of application, slew rate is probably the most critical parameter with regard to op amp selection. The slew rate must be high enough to allow the output to switch between saturation levels within the allowed switching time (t_S). The switching time is computed by using a transposed version of the f(max) equation. That is,

(3.12)

For the present circuits, we have

For purposes of op amp selection, we can assume that the output swings between the two power supply limits. That is, assume that ±V_SAT - ±V_CC. The required slew rate can then be computed as

(3.13)

For the present circuit, we have

Select an Op Amp.

Appendix 1 indicates that the slew rate for a 741 is only 0.5 volts per microsecond, which clearly eliminates this device as an option because we will require a slew rate of at least 5.4 volts per microsecond. Appendix 4, however, shows that the MC1741SC op amp has a minimum slew rate of 10 volts per microsecond. This will satisfy our present requirements nicely, and it is compatible with our power supply requirements. We will build our design around the MC1741SC op amp.

Determine R_F and R₁.

The ratio of R_F and R₁ is dependent on the ratio of V_SAT voltage to hysteresis voltage. Appendix 4 indicates that the unloaded output swing will be approximately ±13 volts. We use this value for our computations. If the circuit is expected to drive a greater load (smaller load resistor), then the output will be correspondingly smaller. The ratio of R_F to R₁ is computed as follows:

(3.14)

More specifically, for the present circuit we have

Many combinations of R_F and R₁ will produce a 25:1 ratio. We will select R₁ and calculate the value of R_F. If possible, we generally want both resistors in the range of 1.0 kilohm to 1.0 megohm, although these do not represent absolute limits. For purposes of this example, we select R₁ to be 4.7 kilohms. Having done this, we can now compute R_F by simply multiplying R₁ by the R_F/R₁ ratio.

(3.15)

And, in the present case,

We will select a standard value of 120 kilohms.

This completes the design of the simple zero-crossing detector circuit. The schematic is shown in Figure 3.9. The circuit performance is shown by the oscilloscope displays in Figure 3.10. The original design goals are contrasted with the measured performance in Table 3.1.

1. Upper threshold voltage

2. Lower threshold voltage

3. Hysteresis

4. Maximum frequency of operation

Upper Threshold Voltage.

The upper threshold voltage is the value of the voltage that appears across R₁ when the output is at its maximum positive level, plus the value of the reference voltage. Appendix 1 lists a minimum value of 10 volts for +V_SAT. The value of the threshold voltage is computed by applying the basic voltage divider formula to R_F and R₁ and then adding the result to the reference voltage (V_REF).

(3.16)

For this particular circuit, we have

As with the zero-crossing detector previously discussed, the threshold voltages vary with V_SAT. If this variation is objectionable, then the output can be regulated by zeners, as discussed in Section 3.6.

Lower Threshold Voltage.

The lower threshold voltage for the circuit shown in Figure 3.11 is computed using the same method discussed for the upper threshold:

(3.17)

or, more specifically,

The lower threshold suffers from the same variations described for the upper threshold. Also, notice that in this particular circuit, the upper and lower threshold voltages are both above 0 volts but equally spaced on either side of the reference voltage. The thresholds in some circuits are not equally spaced around the reference.

Hysteresis.

The hysteresis of the circuit shown in Figure 3.11 is simply the difference, as given by Equation (3.6), between the two threshold voltages. That is,

Recall that the value of hysteresis primarily determines the noise immunity offered by the circuit. In the present case, once the input voltage has crossed one of the threshold levels, it will take a noise pulse of the opposite polarity and with a magnitude of at least 3.3 volts before the output will respond.

The hysteresis in this circuit may also be computed directly with Equation (3.7).

Maximum Frequency of Operation.

The upper frequency of operation is limited in the same manner as the zero-crossing detector discussed previously. This frequency is estimated with Equation (3.10):

where t_s is computed with Equation (3.8) as shown:

Or, in the usual case of symmetrical power supplies, we can simply use Equation (3.9) as follows:

In our present case, let us determine the minimum switching time with Equation (3.9):

Substituting this value into the maximum frequency formula, Equation (3.10), gives us

The above equation represents a worst-case situation for a symmetrical output waveform. As noted in the zero-crossing circuit, the output waveform under these extreme conditions will more closely resemble a triangle waveform than a square wave. In cases where output rise and fall times must be short compared to the pulse width, Equation (3.11) can be used to determine the highest operating frequency for a particular ratio (ρ) of switching time (t_S) to stable time (t_P). In the case of Figure 3.11, we have already computed t_S as 40 microseconds. Now suppose we want the switching times (rise and fall) to be one-eighth (0.125) of the stable time (t_P). This establishes our ratio ρ as 0.125. The highest frequency is then computed with Equation (3.11) as

Determine the Required Slew Rate.

The slew rate must be high enough to allow the output to switch between saturation levels within the allowed switching time (t_S). The switching time is computed with Equation (3.12) as follows:

For purposes of op amp selection, we can assume that the output swings between the two power supply limits. That is, assume that ±V_SAT = ±V_CC. The required slew rate can then be computed with Equation (3.13) as

These calculations assume a 50-percent duty cycle on the output waveform. If the output is asymmetrical, then the shortest allowable alternation is given as

Select an Op Amp.

Appendix 1 indicates that the slew rate for a 741 is 0.5 volts per microsecond, which exceeds our requirement of at least 0.04 volts per microsecond. The power supply requirements are also compatible with our stated design requirements. We will build our design around the 741 op amp.

Determine R_F and R₁.

The ratio of R_F and R₁ is dependent on the ratio of V_SAT voltage to hysteresis voltage. Appendix 1 indicates that the lightly loaded (R_L > 10 kΩ) output swing will be typically ±14 volts. We will use this value for our computations. If the circuit is expected to drive a greater load (smaller load resistor and/or feedback network), then the output will be correspondingly smaller. The ratio of R_F to R₁ is computed with Equation (3.14).

We select R₁ and calculate the value of R_F. For purposes of this example, we select R₁ to be 33 kilohms. Having done this, we can now compute R_F by applying Equation (3.15) where the ratio (R_F/R₁) is known.

We will select a standard value of 240 kilohms.

Calculate V_REF.

A simple way to calculate the required value of V_REF is to apply Equation (3.18).

(3.18)

where V_LT and V_H are the lower threshold and hysteresis voltages, respectively. In our present case, we can determine V_REF as shown:

For purposes of illustration, let us derive this reference voltage from a zener diode network across the −15-volt supply. As long as the equivalent (Thevenin) resistance of the zener circuit is small compared to R_F and R₁ (the usual case), it will not affect our previous selection of components.

Appendix 5 shows the data sheet for a family of zener diodes. One of the listed devices is the 1N5233B, which is a 6.0-volt, 1/2-watt zener diode. The maximum zener current can be estimated by applying the power formula:

(3.19)

where P_Z and V_Z are the power and voltage ratings of the zener. In the case of the 1N5233B, the maximum current is

This establishes the upper limit of zener current, and even this must be derated for temperatures above 25°C. The zener test current (I_ZT) is listed as 20 milliamps, which is generally a good quiescent current choice.

The series current limiting resistor for the zener regulator can be computed as follows:

(3.20)

In the present case, we have

Finally, we will choose the standard value of 470 ohms, which completes our design. The final schematic is shown in Figure 3.12. The waveforms in Figure 3.13 reveal the performance of the circuit. The original design goals are contrasted with the measured performance in Table 3.2.

1. +V_REF

2. −V_REF

3. Output voltage (v_O)

+V_REF.

The value of +V_REF is established by the 1N5230 zener diode. Appendix 5 indicates that this is a 4.7-volt zener, so +V_REF is approximately +4.7 volts. If desired, we can determine the amount of zener current with Equation (3.20) (transposed):

V_REF.

The 1N5225 zener diode is used to establish the −V_REF source. Appendix 5 lists the 1N5225 as a 3.0-volt zener. Its current can be calculated with Equation (3.20) (transposed) as

Output Voltage (v_O).

The upper limit of v_O occurs when both of the isolation diodes are reverse-biased or effectively open. This means that the pull-up resistor (R_P) has essentially no current flow and therefore no voltage drop across it. Since R_P drops no voltage under these conditions, the output will be at a +15-volt level. As mentioned previously, if +V_SAT is sufficiently low, the isolation diode will not be reverse-biased and the output voltage (v_O) will be less than +15 volts (+V_SAT + V_F, where V_F is the forward voltage drop of the diode).

If either of the op amp outputs is forced to its −V_SAT level, then the associated isolation diode will be forward-biased. Appendix 1 indicates that the −V_SAT will be about −11 volts. The current through R_P can now be estimated as follows:

(3.21)

where V_F is the forward voltage drop of the isolation diode (typically 0.7 volts). In our present case, we can compute I_RP as

The actual output voltage (v_O) under these conditions is determined as follows:

(3.22)

And, for the present circuit,

This same result can be obtained by applying Kirchhoff’s Voltage Law—that is,

Select the Op Amp.

Since the circuit is being driven by a very low-frequency source, the high-frequency characteristics of the op amp are unimportant to us. The DC stability of the op amp is more important in circuits like this and will be determined by the requirements of the application being considered. If the switching speed of the device is important for an application that has a higher input frequency, then you would do well to select an op amp that is specifically designed for fast comparator applications.

For purposes of our present example, let us choose the 741.

Select the Zener Diodes.

Appendix 5 lists a family of zener diodes. The 1N5236 and 1N5240 devices will satisfy the requirements for our lower and upper reference voltages of 7.5 volts and 10 volts, respectively.

Calculate the Zener-Current Limiting Resistors.

Unless we have some reason to do otherwise (e.g., ultra-low current designs), we can use the zener test current as the design value. Appendix 5 lists 20 milliamps as the test current for both diodes. Basic circuit theory, as given in Equation (3.20), allows us to compute the values of current limiting resistors.

We will choose a standard value of 390 ohms. In a similar manner,

We choose the next higher standard value of 270 ohms. Note that in this particular case, both zeners will be connected across the positive supply voltage because we require both references to be positive.

Select R_P.

The correct value of R_P is determined by two primary considerations:

Since we have no information regarding the driven circuit, let us select R_P such that the op amp output current is limited to 5 milliamps. This calculation, from Equation (3.21), is based on Ohm’s Law as follows:

Let us select the next higher standard value of 5.1 kilohms.

Select the Isolation Diodes.

The requirements for the isolation diodes are not stringent. The two primary parameters that need to be considered are

The maximum current is the same as the value of the op amp output current. In our case, we have designed this to be 5 milliamps. The maximum reverse voltage (ignoring diode drops) is approximately equal to the difference between +V_SAT of one op amp and −V_SAT of the other. That is,

(3.23)

More specifically,

Appendix 6 shows the characteristics for a 1N914A diode. Almost any diode will satisfy our modest requirements. The 1N914A is a standard, low-cost diode that we can use for this application.

This completes the design of the window detector circuit. The final schematic is shown in Figure 3.15. Figure 3.16 shows the actual waveforms produced by the circuit. Table 3.3 compares the original design goals with the measured circuit performance.

1. Upper threshold voltage

2. Lower threshold voltage

3. Hysteresis

4. All zener currents

5. Output voltage limits (v_O⁺ and v_O⁻)

Upper Threshold Voltage.

The upper threshold voltage can be found by applying Kirchhoff’s Law and basic circuit theory to the resistor network R_I and R_F. Our knowledge of op amp operation tells us that no substantial current enters or leaves the (+) pin. Therefore, i₁ = i₂ in Figure 3.18. At the instant v_I reaches the upper threshold, the junction of R_F and R_I will just equal V_REF. This is so labeled on Figure 3.18.

Using Ohm’s Law, we can write expressions for the values of i₁ and i₂:

If we equate these two currents, we get

Some algebraic manipulation gives us the expression for v_I at the moment it reaches the upper threshold:

(3.24)

In the present example, v_O⁻ equals the voltage of D₃ (−5.6 volts as listed in Appendix 5) during this period of time. The reference voltage is 6.2 volts (see Appendix 5). Substituting values enables us to calculate the value of the upper threshold voltage:

This value can be made slightly more accurate by including the effects of the forward voltage drop of D₂ (about 0.7 volts). That is, v_O⁻ will equal the voltage of D₃ plus the forward voltage drop of D₂, or −6.3 volts. If this effect is included, the threshold is computed to be 11.2 volts.

Lower Threshold Voltage.

A similar application of basic circuit theory when the output is at the +V_SAT level and the input is approaching the lower threshold voltage yields the following expression for the lower threshold voltage:

(3.25)

Recognizing that v_O⁺ will be equal to the voltage of D₂ (3.3 volts) during this time, we can calculate the value of lower threshold voltage:

If the forward voltage drop of D₃ is included in the calculation, the threshold voltage will be computed as 7.07 volts.

Hysteresis.

Hysteresis is simply the difference between the two threshold voltages. In our present case, hysteresis is computed as shown in Equation (3.6):

If the diode drops are included, the hysteresis will be computed as 4.13 volts.

Zener Currents.

The current through D₁ can be computed from Equation (3.20) as follows:

The reverse current through D₃ is computed with the following expression:

(3.26)

Continuing with the calculations, we get

Note that the minus sign simply indicates direction and is of no significance to us at this time. D₂ current is computed in a similar manner as shown:

(3.27)

Substituting values for the present circuit gives us

The power dissipation of the zeners can be found by applying the basic power equation P = IV, where I and V are the current and voltages associated with a particular zener. In our particular case,

Output Voltage Limits.

The output voltage swing was essentially determined in a prior step. The upper excursion is established by the zener voltage of D₂ plus the forward voltage drop of D₃. In our case,

The lower limit of v_O is computed as

Compute Hysteresis Voltage.

Our first step will be to calculate the required hysteresis voltage. This is, very simply, the difference between the two threshold voltages from Equation (3.6).

Compute R_F and R_I.

The ratio of R_F to R_I is determined by the ratio of the output voltage swing to the hysteresis voltage. That is,

(3.28)

In our design example, the required R_F/R_I ratio is computed as shown:

We will now select R_I and compute R_F. We will choose 10 kilohms for resistor R_I. The feedback resistor R_F can now be computed, from Equation (3.15), as shown:

The factor 7.5 in the above equation is simply the R_F/R_I ratio previously computed.

Select the Output Zener Diodes.

The voltage rating of the two zener diodes is determined by the stated output voltage swing. That is,

(3.29)

Substituting values gives us

Similarly, the voltage rating for D₃ is computed as

(3.30)

Values for the present circuit are

The power ratings for the zeners are not critical, but must be noted for subsequent calculations. By referring to Appendix 5, we can select a 1N5229 and a 1N5226 for diodes D₂ and D₃, respectively. We also observe that both of these diodes are rated at 500 milliwatts.

Compute R₁.

Resistor R₁ is a current limiting resistor for the zener diodes. First, we will compute the maximum allowable currents through each of the zeners, using Equation (3.19).

Similarly,

Since both of these exceed the short-circuit output current of the 741, we will have to limit the current well below the maximum amount. Let us plan to limit it to 5 milliamps.

Next we compute the minimum values for R₁ in order to limit the diode currents to the desired value by applying Ohm’s Law. The minimum value as dictated by D₂ is found, from Equation (3.20), to be

Similarly, the value required to limit the current through D₃ is computed as

The larger of these two values (1.94 kilohms) sets the lower limit on R₁. We will select the next higher standard value of 2 kilohms for R₁.

Select the Reference Zener Diode.

The required reference voltage can be determined by using the following equation:

(3.31)

In our present design, the required reference is calculated as follows:

A brief scan of Appendix 5 reveals that it may be very difficult to locate a 1.3-volt zener. Let us rely on our knowledge of basic semiconductors to discover an alternative. Recall that a forward-biased silicon diode has about 0.6 to 0.7 volts and remains fairly constant. We can obtain the equivalent of a 1.3-volt zener by using two series silicon diodes. Appendix 6 lists the data for 1N914A diodes. A 1N914A diode will have about 0.64 volts across it with a forward current of 0.25 milliamps. Similarly, this same diode will have about 0.74 volts across it with a forward current of 1.5 milliamps. Let us select 1N914A diodes for our application and establish a forward current of about 0.5 milliamps.

Determine the Value of R_S.

The purpose of resistor R_S is to limit the current through reference diode D₁. In our case, it will limit the current through two series 1N914A diodes. The value of R_S is computed, from Equation (3.20), as follows:

where I_REF is the specified current through the reference diode. For our design, R_S is calculated as shown:

We will choose the standard value of 27 kilohms for R_S.

This completes the design of our voltage comparator with output limiting. The final schematic is shown in Figure 3.19, and the actual performance of the circuit is shown in Figure 3.20 by means of oscilloscope displays. The design goals are contrasted with the measured circuit values in Table 3.4.

Output Saturated.

It is always a good first check to verify the power supply voltages. A missing supply can cause the output to go to the opposite extreme.

If the power supplies are both correct, then compare the voltage readings on the (+) and (−) inputs of the op amp. If the polarity on the two inputs periodically switches (i.e., one input becomes more positive than the other and then later changes so that it is less positive than the other), then the op amp is a likely suspect. That is, the inputs directly on the op amp are telling the device to switch and the op amp has the correct power source, yet the output remains in saturation. The op amp is the most probable trouble.

If, on the other hand, the (+) and (−) input terminal measurements reveal that one of the inputs is always more positive than the other, then the op amp is not being told to change states. In this case, you should check the input signal for proper voltage levels. Pay particular attention to any DC offset signals that may be present. A DC offset at the input can shift the entire operation so far off center that the input signal cannot cause the op amp to switch.

If the input signal is correct, verify the proper voltage on the reference input. If this is incorrect, the problem lies in the reference circuit (i.e., voltage divider, zener diode, etc.).

If both the input signal and the reference voltages are correct but one of the input pins continues to be more positive than the other at all times, measure the output of the op amp (particularly in circuits with output limiting). Although the output is at an extreme voltage, determine if the extreme voltage is one of the expected levels (e.g., a proper zener voltage) or some higher voltage. If the level is incorrect (i.e., too high), then suspect one of the zener diodes in the output.

Incorrect Switching Levels.

Although there are many things that can cause minor shifts in switching levels (e.g., component value drifts), some are more probable than others. If the circuit has adjustable components, such as a variable reference voltage, suspect this first. If the variable components are properly adjusted but the problem remains, suspect any solid-state components other than the op amp (e.g., zener diodes).

The zeners can be checked for proper operation by measuring the voltage across them. A forward-biased zener will drop about 0.7 volts; a reverse-biased zener should have a voltage drop that is approximately equal to its rated voltage. Keep in mind that zeners are not precision devices. For example, a 5.6-volt zener that drops 6 volts is probably not defective.

As a last resort, verify the resistance values. Resistor tolerances in a low-power circuit of this type do not present problems very often.