APPENDIX F
Transistor and Amplifier Formulas

The following formulas are meant as a reminder of the fundamentals given in most standard electronics textbooks. Notation for the formulas have the traditional meanings. Depletion capacitances are all given with a negative sign in the denominator as in C = C0/(1 V/ϕ)γ. Consequently, when the junction is reverse biased, the minus sign turns into a positive sign. Figure F.1 presents the basic FET features and symbols. The transistor body terminal typically is connected to the source or to ground. When the source is not grounded, the body effect modifies the transistor properties. The equations using the Early voltage, VA, should conform with the sign convention used by SPICE (VA > 0).

FIGURE F.1 FET symbols.

bapp06f001

BIPOLAR TRANSISTOR PARAMETERS (BJT)

Description Formula
Collector current bapp06ue001
Transconductance bapp06ue002
Input resistance bapp06ue003
Output resistance bapp06ue004
Base charging capacitance CD = τFgm
Emitter–base junction bapp06ue005
Input capacitance Cπ = Cb + Cje
Collector base bapp06ue006
Collector substrate bapp06ue007
Transition frequency bapp06ue008
Thermal voltage bapp06ue009

JUNCTION FIELD-EFFECT TRANSISTOR PARAMETERS (JFET)

Description Formula
Saturated drain current bapp06ue010
  VDSVGSVP
Ohmic region drain
current
bapp06ue011
  VDS < VGSVP
  bapp06ue012
  bapp06ue013
Transconductance bapp06ue014
Output resistance bapp06ue015
Gate–source capacitance bapp06ue016
Gate–drain capacitance bapp06ue017
Gate–substrate capacitance bapp06ue018
n-Channel JFET VP < 0
p-Channel JFET VP > 0

METAL–OXIDE SEMICONDUCTOR FIELD-EFFECT TRANSISTOR (MOSFET) PARAMETERS

Description Formula
Saturation region drain
current
bapp06ue019
  VDS VGSVt
Ohmic region drain current bapp06ue020
  VDS < VGSVt
Oxide capacitance bapp06ue021
Transconductance bapp06ue022
Output resistance bapp06ue023
Input capacitance Cin = CGS + CGD = CoxLW
Transition frequency bapp06ue024
Surface mobility holes μs = 200 cm2/V−s
Surface mobility electrons μs = cm2/V−s
n-Channel JFET p-Channel JFET
IDSS > 0 IDSS < 0
VP < 0 VP > 0
bapp06ue025 bapp06ue026
bapp06ue027 bapp06ue028
VP < VGS for |IDS| > 0 VGS < VP for |IDS| > 0
NMOS Enhancement PMOS Enhancement
Vt > 0 Vt < 0
V GS > V t V GS < V t
bapp06ue029 bapp06ue030
NMOS Depletion PMOS Depletion
Vt < 0 Vt > 0
VGS > Vt < 0 for |IDS| > 0 VGS < Vt for |IDS|
bapp06ue031 bapp06ue032

SMALL-SIGNAL SINGLE-TRANSISTOR AMPLIFIER CONFIGURATIONS

MOSFET BJT
Common Source Common Emitter
Rin = RB = R1x2016_TimesTen-Roman_10n_000100R2 Rin = (rπ + rb)x2016_TimesTen-Roman_10n_000100RBrπ
Rout = RDx2016_TimesTen-Roman_10n_000100ro Rout = Rcx2016_TimesTen-Roman_10n_000100ro
bapp06ue033 AV = −gm (Rcx2016_TimesTen-Roman_10n_000100rox2016_TimesTen-Roman_10n_000100RL)
Source Degeneration Emitter Degeneration
Rin = RB = R1x2016_TimesTen-Roman_10n_000100R2 Rin = RBx2016_TimesTen-Roman_10n_000100[rπ + RE (β + 1)]
  ≈ rπ (1 + gmRE)
Rout = ro[1 + (gm + gmb)RS] + RS Rout = REx2016_TimesTen-Roman_10n_000100rπ + ro [1 + gm (rπx2016_TimesTen-Roman_10n_000100RE)]
  ≈ ro (1 + gmRE)
bapp06ue034 bapp06ue035
Common Gate Common Base
bapp06ue036 bapp06ue037
Rout = RDx2016_TimesTen-Roman_10n_000100[ro + Rgen + Rgenro (gm + gmb)] bapp06ue038
Gm = gm + gmb bapp06ue039
  AV = gm (RC|RL)
  bapp06ue040
Common Drain (Source Follower) Common Collector (Emitter Follower)
Rin = R1x2016_TimesTen-Roman_10n_000100R2 Rin = RBx2016_TimesTen-Roman_10n_000100[rπ + rb + (β + 1)(rox2016_TimesTen-Roman_10n_000100RE)]
bapp06ue041 bapp06ue042
bapp06ue043 bapp06ue044
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